Commit fbf0d6ba authored by Andreas Zwinkau's avatar Andreas Zwinkau
Browse files

Include primary cache size

parent daaf227d
......@@ -240,6 +240,7 @@ def generate_spec_config(options):
contents.append("hw_ncoresperchip = %d" % cores_per_chip)
contents.append("hw_vendor = %s" % cpuinfo["vendor_id"])
contents.append("hw_memory = %s" % meminfo["MemTotal"])
contents.append("hw_pcache = %s" % cpuinfo["cache size"])
contents.append("")
contents.append("CC = %s" % options.c_compiler)
contents.append("CXX = %s" % options.cpp_compiler)
......
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