Commit c9c78976 authored by uepls's avatar uepls 💬
Browse files

Upload Klassenbibliotheken

parent 2ca956a6
/*
* ADC.h
*
* Author: Max Zuidberg
* Email: m.zuidberg@icloud.com
*/
#ifndef ADC_H_
#define ADC_H_
/*
* stdbool.h: Boolean definitions for the C99 standard
* stdint.h: Variable definitions for the C99 standard
* inc/hw_types.h: Macros for hardware access, both direct and via the
* bit-band region.
* inc/hw_memmap.h: Macros defining the memory map of the Tiva C Series
* device. This includes defines such as peripheral
* base address locations such as GPIO_PORTF_BASE.
* inc/hw_ints.h: Macros defining the interrupt assignments
* driverlib/sysctl.h: Defines and macros for the System Control API of
* DriverLib. This includes API functions such as
* SysCtlClockSet.
* driverlib/gpio.h: Defines and macros for GPIO API of DriverLib. This
* includes API functions such as GPIOPinConfigure.
* driverlib/adc.h Definitions for using the ADC driver
* System.h: Access to current CPU clock and other functions.
*/
#include <stdbool.h>
#include <stdint.h>
#include "inc/hw_types.h"
#include "inc/hw_memmap.h"
#include "inc/hw_ints.h"
#include "driverlib/sysctl.h"
#include "driverlib/gpio.h"
#include "driverlib/adc.h"
#include "System.h"
// Defines for direct register access
// Base address for the System Control Registers (Datasheet page 237)
#define SYS_CTL_BASE 0x400FE000
// Offset to add to SYS_CTL_BASE to access RCGCADC Register.
// (Datasheet page 352)
#define SYS_CTL_RCGCADC_OFFSET 0x638
// Actual RCGCADC Register
#define SYS_CTL_RCGCADC_REG HWREG(SYS_CTL_BASE + SYS_CTL_RCGCADC_OFFSET)
// Defines for readability using adcInputPinMapping
#define AIN_PERIPH 0
#define AIN_PORT 1
#define AIN_PIN 2
class ADC
{
public:
ADC();
virtual ~ADC();
void init(System *sys, uint32_t base, uint32_t sampleSeq, uint32_t analogInput);
void setHWAveraging(uint32_t averaging);
uint32_t read();
float readVolt();
private:
bool adcEnabled;
uint32_t adcBase, adcSampleSeq, adcInput, adcReading[1];
const uint32_t adcInputPinMapping[12][3] =
{{SYSCTL_PERIPH_GPIOE, GPIO_PORTE_BASE, GPIO_PIN_3},
{SYSCTL_PERIPH_GPIOE, GPIO_PORTE_BASE, GPIO_PIN_2},
{SYSCTL_PERIPH_GPIOE, GPIO_PORTE_BASE, GPIO_PIN_1},
{SYSCTL_PERIPH_GPIOE, GPIO_PORTE_BASE, GPIO_PIN_0},
{SYSCTL_PERIPH_GPIOD, GPIO_PORTD_BASE, GPIO_PIN_3},
{SYSCTL_PERIPH_GPIOD, GPIO_PORTD_BASE, GPIO_PIN_2},
{SYSCTL_PERIPH_GPIOD, GPIO_PORTD_BASE, GPIO_PIN_1},
{SYSCTL_PERIPH_GPIOD, GPIO_PORTD_BASE, GPIO_PIN_0},
{SYSCTL_PERIPH_GPIOE, GPIO_PORTE_BASE, GPIO_PIN_5},
{SYSCTL_PERIPH_GPIOE, GPIO_PORTE_BASE, GPIO_PIN_4},
{SYSCTL_PERIPH_GPIOB, GPIO_PORTB_BASE, GPIO_PIN_4},
{SYSCTL_PERIPH_GPIOB, GPIO_PORTB_BASE, GPIO_PIN_5}};
};
#endif /* ADC_H_ */
/*
* PWM.h
*
* Author: Max Zuidberg
* Email: m.zuidberg@icloud.com
*/
#ifndef PWM_H_
#define PWM_H_
/*
* stdbool.h: Boolean definitions for the C99 standard
* stdint.h: Variable definitions for the C99 standard
* inc/hw_types.h: Macros for hardware access, both direct and via the
* bit-band region.
* inc/hw_memmap.h: Macros defining the memory map of the Tiva C Series
* device. This includes defines such as peripheral
* base address locations such as GPIO_PORTF_BASE.
* inc/hw_pinmap.h: Mapping of peripherals to pins for all parts.
* driverlib/sysctl.h: Defines and macros for the System Control API of
* DriverLib. This includes API functions such as
* SysCtlClockSet.
* driverlib/gpio.h: Defines and macros for GPIO API of DriverLib. This
* includes API functions such as GPIOPinConfigure.
* driverlib/pwm.h: Defines and macros for PWM API of DriverLib. This
* includes API function such as PWMPulseWidthSet.
* System.h: Access to current CPU clock and other functions.
*/
#include <stdbool.h>
#include <stdint.h>
#include "inc/hw_types.h"
#include "inc/hw_memmap.h"
#include "driverlib/pin_map.h"
#include "driverlib/sysctl.h"
#include "driverlib/gpio.h"
#include "driverlib/pwm.h"
#include "System.h"
// Defines for direct register access
// Base address for the System Control Registers (Datasheet page 237)
#define SYS_CTL_BASE 0x400FE000
// Offset to add to SYS_CTL_BASE to access RCGCPWM Register.
// (Datasheet page 354)
#define SYS_CTL_RCGCPWM_OFFSET 0x640
// Actual RCGCPWM Register
#define SYS_CTL_RCGCPWM_REG HWREG(SYS_CTL_BASE + SYS_CTL_RCGCPWM_OFFSET)
class PWM
{
public:
PWM();
virtual ~PWM();
void init(System *sys,uint32_t portBase, uint32_t pin1, uint32_t pin2,
bool invert = false, uint32_t freq = 5000);
void setFreq(uint32_t freq);
void setDuty(float duty);
private:
System *pwmSystem;
float pwmDuty;
int32_t pwmComp;
bool pwmInvert;
uint32_t pwmBase, pwmGen, pwmClockFreq, pwmPeriod, pwmForwardOut,
pwmReverseOut, pwmForwardOutBit, pwmReverseOutBit;
};
#endif /* PWM_H_ */
/*
* Timer.h
*
* Author: Max Zuidberg
* Email: m.zuidberg@icloud.com
*/
#ifndef TIMER_H_
#define TIMER_H_
/*
* stdbool.h: Boolean definitions for the C99 standard
* stdint.h: Variable definitions for the C99 standard
* inc/hw_types.h: Macros for hardware access, both direct and via the
* bit-band region.
* inc/hw_memmap.h: Macros defining the memory map of the Tiva C Series
* device. This includes defines such as peripheral
* base address locations such as GPIO_PORTF_BASE.
* inc/hw_ints.h: Macros defining the interrupt assignments
* driverlib/sysctl.h: Defines and macros for the System Control API of
* DriverLib. This includes API functions such as
* SysCtlClockSet.
* driverlib/interrupt.h: Defines and macros for NVIC Controller (Interrupt)
* API of driverLib. This includes API functions such
* as IntEnable and IntPrioritySet.
* driverlib/timer.h: Defines and macros for Timer API of driverLib.
* This includes API functions such as TimerConfigure.
* System.h: Access to current CPU clock and other functions.
*/
#include <stdbool.h>
#include <stdint.h>
#include "inc/hw_types.h"
#include "inc/hw_memmap.h"
#include "inc/hw_ints.h"
#include "driverlib/sysctl.h"
#include "driverlib/interrupt.h"
#include "driverlib/timer.h"
#include "System.h"
// Defines for direct register access
// Base address for the System Control Registers (Datasheet page 237)
#define SYS_CTL_BASE 0x400FE000
// Offset to add to SYS_CTL_BASE to access RCGCTIMER Register.
// (Datasheet page 338)
#define SYS_CTL_RCGCTIMER_OFFSET 0x604
// Actual RCGCTIMER Register
#define SYS_CTL_RCGCTIMER_REG HWREG(SYS_CTL_BASE + SYS_CTL_RCGCTIMER_OFFSET)
class Timer
{
public:
Timer();
virtual ~Timer();
void init(System* sys, uint32_t base, void (*ISR)(void), uint32_t freq = 0);
void start();
void stop();
void clearInterruptFlag();
void setPeriodUS(uint32_t periodUS);
void setFreq(uint32_t frequency);
uint32_t getFreq();
uint32_t getPeriodUS();
private:
uint32_t timerBase;
uint32_t timerLoadValue, timerPrescale, timerPeriodUS = 0, timerFreq = 0;
uint_fast8_t timerNumber;
System* timerSys;
};
#endif /* TIMER_H_ */
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment