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/*
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 * Copyright (C) 1995-2008 University of Karlsruhe.  All right reserved.
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 *
 * This file is part of libFirm.
 *
 * This file may be distributed and/or modified under the terms of the
 * GNU General Public License version 2 as published by the Free Software
 * Foundation and appearing in the file LICENSE.GPL included in the
 * packaging of this file.
 *
 * Licensees holding valid libFirm Professional Edition licenses may use
 * this file in accordance with the libFirm Commercial License.
 * Agreement provided with the Software.
 *
 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE.
 */

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/**
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 * @file
 * @brief       Processor architecture specification.
 * @author      Sebastian Hack
 * @version     $Id$
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 */
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#include "config.h"
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#include <string.h>

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#include "bearch_t.h"
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#include "benode_t.h"
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#include "ircons_t.h"
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#include "irnode_t.h"
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#include "bitset.h"
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#include "pset.h"
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#include "raw_bitset.h"
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#include "irprintf.h"

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/* Initialize the architecture environment struct. */
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arch_env_t *arch_env_init(const arch_isa_if_t *isa_if, FILE *file_handle, be_main_env_t *main_env)
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{
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	arch_env_t *arch_env = isa_if->init(file_handle);
	arch_env->main_env   = main_env;
	return arch_env;
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}

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/**
 * Put all registers in a class into a bitset.
 * @param cls The class.
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 * @param bs The bitset.
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 * @return The number of registers in the class.
 */
static int arch_register_class_put(const arch_register_class_t *cls, bitset_t *bs)
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{
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	int i, n = cls->n_regs;
	for (i = n - 1; i >= 0; --i)
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		bitset_set(bs, i);
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	return n;
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}

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/**
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 * Get the isa responsible for a node.
 * @param irn The node to get the responsible isa for.
 * @return The irn operations given by the responsible isa.
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 */
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static inline const arch_irn_ops_t *get_irn_ops(const ir_node *irn)
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{
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	const ir_op          *ops;
	const arch_irn_ops_t *be_ops;

	if (is_Proj(irn)) {
		irn = get_Proj_pred(irn);
		assert(!is_Proj(irn));
	}
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	ops    = get_irn_op(irn);
	be_ops = get_op_ops(ops)->be_ops;
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	assert(be_ops);
	return be_ops;
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}

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const arch_register_req_t *arch_get_register_req(const ir_node *irn, int pos)
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{
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	const arch_irn_ops_t *ops = get_irn_ops(irn);
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	return ops->get_irn_reg_req(irn, pos);
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}

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void arch_set_frame_offset(ir_node *irn, int offset)
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{
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	const arch_irn_ops_t *ops = get_irn_ops(irn);
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	ops->set_frame_offset(irn, offset);
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}

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ir_entity *arch_get_frame_entity(const ir_node *irn)
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{
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	const arch_irn_ops_t *ops = get_irn_ops(irn);
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	return ops->get_frame_entity(irn);
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}

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void arch_set_frame_entity(ir_node *irn, ir_entity *ent)
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{
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	const arch_irn_ops_t *ops = get_irn_ops(irn);
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	ops->set_frame_entity(irn, ent);
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}

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int arch_get_sp_bias(ir_node *irn)
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{
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	const arch_irn_ops_t *ops = get_irn_ops(irn);
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	return ops->get_sp_bias(irn);
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}

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arch_inverse_t *arch_get_inverse(const ir_node *irn, int i, arch_inverse_t *inverse, struct obstack *obstack)
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{
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	const arch_irn_ops_t *ops = get_irn_ops(irn);
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	if(ops->get_inverse) {
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		return ops->get_inverse(irn, i, inverse, obstack);
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	} else {
		return NULL;
	}
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}

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int arch_possible_memory_operand(const ir_node *irn, unsigned int i)
{
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	const arch_irn_ops_t *ops = get_irn_ops(irn);
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	if(ops->possible_memory_operand) {
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		return ops->possible_memory_operand(irn, i);
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	} else {
		return 0;
	}
}

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void arch_perform_memory_operand(ir_node *irn, ir_node *spill, unsigned int i)
{
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	const arch_irn_ops_t *ops = get_irn_ops(irn);
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	if(ops->perform_memory_operand) {
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		ops->perform_memory_operand(irn, spill, i);
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	} else {
		return;
	}
}

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int arch_get_op_estimated_cost(const ir_node *irn)
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{
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	const arch_irn_ops_t *ops = get_irn_ops(irn);
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	if(ops->get_op_estimated_cost) {
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		return ops->get_op_estimated_cost(irn);
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	} else {
		return 1;
	}
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}

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int arch_get_allocatable_regs(const ir_node *irn, int pos, bitset_t *bs)
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{
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	const arch_irn_ops_t *ops = get_irn_ops(irn);
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	const arch_register_req_t *req = ops->get_irn_reg_req(irn, pos);
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	if(req->type == arch_register_req_type_none) {
		bitset_clear_all(bs);
		return 0;
	}

	if(arch_register_req_is(req, limited)) {
		rbitset_copy_to_bitset(req->limited, bs);
		return bitset_popcnt(bs);
	}

	arch_register_class_put(req->cls, bs);
	return req->cls->n_regs;
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}

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void arch_put_non_ignore_regs(const arch_register_class_t *cls, bitset_t *bs)
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{
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	unsigned i;
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	for(i = 0; i < cls->n_regs; ++i) {
		if(!arch_register_type_is(&cls->regs[i], ignore))
			bitset_set(bs, i);
	}
}

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int arch_reg_is_allocatable(const ir_node *irn, int pos, const arch_register_t *reg)
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{
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	const arch_register_req_t *req = arch_get_register_req(irn, pos);
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	if(req->type == arch_register_req_type_none)
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		return 0;

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	if(arch_register_req_is(req, limited)) {
		assert(arch_register_get_class(reg) == req->cls);
		return rbitset_is_set(req->limited, arch_register_get_index(reg));
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	}

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	return req->cls == reg->reg_class;
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}

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const arch_register_class_t *arch_get_irn_reg_class(const ir_node *irn, int pos)
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{
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	const arch_irn_ops_t *ops = get_irn_ops(irn);
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	const arch_register_req_t *req = ops->get_irn_reg_req(irn, pos);
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	assert(req->type != arch_register_req_type_none || req->cls == NULL);

	return req->cls;
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}

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const arch_register_t *arch_get_irn_register(const ir_node *irn)
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{
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	const arch_irn_ops_t *ops = get_irn_ops(irn);
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	return ops->get_irn_reg(irn);
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}
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void arch_set_irn_register(ir_node *irn, const arch_register_t *reg)
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{
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	const arch_irn_ops_t *ops = get_irn_ops(irn);
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	ops->set_irn_reg(irn, reg);
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}
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arch_irn_class_t arch_irn_classify(const ir_node *irn)
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{
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	const arch_irn_ops_t *ops = get_irn_ops(irn);
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	return ops->classify(irn);
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}
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arch_irn_flags_t arch_irn_get_flags(const ir_node *irn)
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{
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	const arch_irn_ops_t *ops = get_irn_ops(irn);
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	return ops->get_flags(irn);
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}
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extern char *arch_register_req_format(char *buf, size_t len,
                                      const arch_register_req_t *req,
                                      const ir_node *node)
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{
	char tmp[128];
	snprintf(buf, len, "class: %s", req->cls->name);

	if(arch_register_req_is(req, limited)) {
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		unsigned n_regs = req->cls->n_regs;
		unsigned i;

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		strncat(buf, " limited:", len);
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		for(i = 0; i < n_regs; ++i) {
			if(rbitset_is_set(req->limited, i)) {
				const arch_register_t *reg = &req->cls->regs[i];
				strncat(buf, " ", len);
				strncat(buf, reg->name, len);
			}
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		}
	}

	if(arch_register_req_is(req, should_be_same)) {
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		const unsigned other = req->other_same;
		int i;

		ir_snprintf(tmp, sizeof(tmp), " same to:");
		for (i = 0; 1U << i <= other; ++i) {
			if (other & (1U << i)) {
				ir_snprintf(tmp, sizeof(tmp), " %+F", get_irn_n(skip_Proj_const(node), i));
				strncat(buf, tmp, len);
			}
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		}
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	}

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	if (arch_register_req_is(req, must_be_different)) {
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		const unsigned other = req->other_different;
		int i;

		ir_snprintf(tmp, sizeof(tmp), " different from:");
		for (i = 0; 1U << i <= other; ++i) {
			if (other & (1U << i)) {
				ir_snprintf(tmp, sizeof(tmp), " %+F", get_irn_n(skip_Proj_const(node), i));
				strncat(buf, tmp, len);
			}
		}
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	}

	return buf;
}
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static const arch_register_req_t no_requirement = {
	arch_register_req_type_none,
	NULL,
	NULL,
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	0,
	0
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};
const arch_register_req_t *arch_no_register_req = &no_requirement;