benode.c 22.8 KB
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/**
 * @file   benode.c
 * @date   17.05.2005
 * @author Sebastian Hack
 *
 * Backend node support.
 *
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 * This file provdies Perm, Copy, Spill and Reload nodes.
 *
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 * Copyright (C) 2005 Universitaet Karlsruhe
 * Released under the GPL
 */
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#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
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#include <stdlib.h>

#include "obst.h"
#include "set.h"
#include "pmap.h"
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#include "util.h"
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#include "debug.h"
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#include "fourcc.h"
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#include "irop_t.h"
#include "irmode_t.h"
#include "irnode_t.h"
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#include "ircons_t.h"
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#include "irprintf.h"
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#include "be_t.h"
#include "belive_t.h"
#include "besched_t.h"
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#include "benode_t.h"

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#include "beirgmod.h"

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/* Sometimes we want to put const nodes into get_irn_generic_attr ... */
#define get_irn_attr(irn) get_irn_generic_attr((ir_node *) (irn))
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static unsigned be_node_tag = FOURCC('B', 'E', 'N', 'O');
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typedef enum _node_kind_t {
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	node_kind_spill,
	node_kind_reload,
	node_kind_perm,
	node_kind_copy,
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	node_kind_kill,
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	node_kind_last
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} node_kind_t;

typedef struct {
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	node_kind_t kind;
	const arch_register_class_t *cls;
	ir_op *op;
	int n_pos;
	int *pos;
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} be_op_t;

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typedef enum {
	be_req_kind_old_limited,
	be_req_kind_negate_old_limited,
	be_req_kind_single_reg
} be_req_kind_t;

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typedef struct {
	arch_register_req_t req;
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	be_req_kind_t       kind;
	union {
		struct {
			void (*old_limited)(void *ptr, bitset_t *bs);
			void *old_limited_env;
		} old_limited;

		const arch_register_t *single_reg;
	} x;
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} be_req_t;

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typedef struct {
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	const arch_register_t *reg;
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	be_req_t              req;
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	be_req_t              in_req;
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} be_reg_data_t;

typedef struct {
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	int                         max_reg_data;
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	arch_irn_flags_t            flags;
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	const arch_register_class_t *cls;
	be_reg_data_t               *reg_data;
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} be_node_attr_t;

typedef struct {
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	be_node_attr_t node_attr;
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	ir_node *spill_ctx;  /**< The node in whose context this spill was introduced. */
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	entity *ent;     /**< The entity in the stack frame the spill writes to. */
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} be_spill_attr_t;

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typedef struct {
	be_node_attr_t node_attr;
	int offset;           /**< The offset by which the stack shall be increased/decreased. */
	be_stack_dir_t dir;   /**< The direction in which the stack shall be modified (along or in the other direction). */
} be_stack_attr_t;

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static ir_op *op_Spill;
static ir_op *op_Reload;
static ir_op *op_Perm;
static ir_op *op_Copy;
static ir_op *op_Keep;
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static ir_op *op_Call;
static ir_op *op_IncSP;
static ir_op *op_AddSP;
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static ir_op *op_RegParams;
static ir_op *op_StackParam;
static ir_op *op_NoReg;
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static int beo_base = -1;
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static const ir_op_ops be_node_op_ops;
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#define N   irop_flag_none
#define L   irop_flag_labeled
#define C   irop_flag_commutative
#define X   irop_flag_cfopcode
#define I   irop_flag_ip_cfopcode
#define F   irop_flag_fragile
#define Y   irop_flag_forking
#define H   irop_flag_highlevel
#define c   irop_flag_constlike
#define K   irop_flag_keep

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void be_node_init(void) {
	static int inited = 0;
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	if(inited)
		return;
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	inited = 1;
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	/* Acquire all needed opcodes. */
	beo_base = get_next_ir_opcodes(beo_Last - 1);
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	op_Spill      = new_ir_op(beo_base + beo_Spill,  "Spill",      op_pin_state_mem_pinned, N, oparity_unary,    0, sizeof(be_spill_attr_t), &be_node_op_ops);
	op_Reload     = new_ir_op(beo_base + beo_Reload, "Reload",     op_pin_state_mem_pinned, N, oparity_zero,     0, sizeof(be_node_attr_t),  &be_node_op_ops);
	op_Perm       = new_ir_op(beo_base + beo_Perm,   "Perm",       op_pin_state_pinned,     N, oparity_variable, 0, sizeof(be_node_attr_t),  &be_node_op_ops);
	op_Copy       = new_ir_op(beo_base + beo_Copy,   "Copy",       op_pin_state_pinned,     N, oparity_unary,    0, sizeof(be_node_attr_t),  &be_node_op_ops);
	op_Keep       = new_ir_op(beo_base + beo_Keep,   "Keep",       op_pin_state_pinned,     K, oparity_variable, 0, sizeof(be_node_attr_t),  &be_node_op_ops);
	op_NoReg      = new_ir_op(beo_base + beo_Keep,   "NoReg",      op_pin_state_pinned,     K, oparity_variable, 0, sizeof(be_node_attr_t),  &be_node_op_ops);
	op_Call       = new_ir_op(beo_base + beo_Keep,   "Call",       op_pin_state_pinned,     K, oparity_variable, 0, sizeof(be_node_attr_t),  &be_node_op_ops);
	op_AddSP      = new_ir_op(beo_base + beo_Keep,   "AddSP",      op_pin_state_pinned,     K, oparity_variable, 0, sizeof(be_stack_attr_t), &be_node_op_ops);
	op_IncSP      = new_ir_op(beo_base + beo_Keep,   "IncSP",      op_pin_state_pinned,     K, oparity_variable, 0, sizeof(be_stack_attr_t), &be_node_op_ops);
	op_RegParams  = new_ir_op(beo_base + beo_Keep,   "RegParams",  op_pin_state_pinned,     K, oparity_variable, 0, sizeof(be_node_attr_t),  &be_node_op_ops);
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	op_StackParam = new_ir_op(beo_base + beo_Keep,   "StackParam", op_pin_state_pinned,     K, oparity_variable, 0, sizeof(be_stack_attr_t), &be_node_op_ops);
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	set_op_tag(op_Spill,      &be_node_tag);
	set_op_tag(op_Reload,     &be_node_tag);
	set_op_tag(op_Perm,       &be_node_tag);
	set_op_tag(op_Copy,       &be_node_tag);
	set_op_tag(op_Keep,       &be_node_tag);
	set_op_tag(op_NoReg,      &be_node_tag);
	set_op_tag(op_Call,       &be_node_tag);
	set_op_tag(op_AddSP,      &be_node_tag);
	set_op_tag(op_IncSP,      &be_node_tag);
	set_op_tag(op_RegParams,  &be_node_tag);
	set_op_tag(op_StackParam, &be_node_tag);
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}
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static void *init_node_attr(ir_node* irn, const arch_register_class_t *cls, ir_graph *irg, int max_reg_data)
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{
	be_node_attr_t *a = get_irn_attr(irn);

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	a->max_reg_data = max_reg_data;
	a->flags        = arch_irn_flags_none;
	a->cls          = cls;
	a->reg_data     = NULL;
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	if(max_reg_data > 0) {
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		int i;

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		a->reg_data = NEW_ARR_D(be_reg_data_t, get_irg_obstack(irg), max_reg_data);
		memset(a->reg_data, 0, max_reg_data * sizeof(a->reg_data[0]));
		for(i = 0; i < max_reg_data; ++i) {
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			a->reg_data[i].req.req.cls  = cls;
			a->reg_data[i].req.req.type = arch_register_req_type_normal;
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		}
	}

	return a;
}
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static INLINE int is_be_node(const ir_node *irn)
{
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	return get_op_tag(get_irn_op(irn)) == &be_node_tag;
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}

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be_opcode_t get_irn_be_opcode(const ir_node *irn)
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{
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	return is_be_node(irn) ? get_irn_opcode(irn) - beo_base : beo_NoBeOp;
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}

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static int redir_proj(const ir_node **node, int pos)
{
	const ir_node *n = *node;

	if(is_Proj(n)) {
		assert(pos == -1 && "Illegal pos for a Proj");
		*node = get_Proj_pred(n);
		return get_Proj_proj(n);
	}

	return 0;
}

static void
be_node_set_irn_reg(const void *_self, ir_node *irn, const arch_register_t *reg)
{
	int out_pos;
	be_node_attr_t *a;

	out_pos = redir_proj((const ir_node **) &irn, -1);
	a       = get_irn_attr(irn);

	assert(is_be_node(irn));
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	assert(out_pos < a->max_reg_data && "position too high");
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	a->reg_data[out_pos].reg = reg;
}


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ir_node *be_new_Spill(const arch_register_class_t *cls, ir_graph *irg, ir_node *bl, ir_node *to_spill, ir_node *ctx)
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{
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	be_spill_attr_t *a;
	ir_node *in[1];
	ir_node *res;
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	in[0] = to_spill;
	res   = new_ir_node(NULL, irg, bl, op_Spill, mode_M, 1, in);
	a     = init_node_attr(res, cls, irg, 0);
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	a->ent       = NULL;
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	a->spill_ctx = ctx;
	return res;
}
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ir_node *be_new_Reload(const arch_register_class_t *cls, ir_graph *irg, ir_node *bl, ir_mode *mode, ir_node *mem)
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{
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	ir_node *in[1];
	ir_node *res;
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	in[0] = mem;
	res   = new_ir_node(NULL, irg, bl, op_Reload, mode, 1, in);
	init_node_attr(res, cls, irg, 1);
	return res;
}
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ir_node *be_new_Perm(const arch_register_class_t *cls, ir_graph *irg, ir_node *bl, int n, ir_node *in[])
{
	ir_node *irn = new_ir_node(NULL, irg, bl, op_Perm, mode_T, n, in);
	init_node_attr(irn, cls, irg, n);
	return irn;
}
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ir_node *be_new_Copy(const arch_register_class_t *cls, ir_graph *irg, ir_node *bl, ir_node *op)
{
	ir_node *in[1];
	ir_node *res;
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	in[0] = op;
	res   = new_ir_node(NULL, irg, bl, op_Copy, get_irn_mode(op), 1, in);
	init_node_attr(res, cls, irg, 1);
	return res;
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}

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ir_node *be_new_Keep(const arch_register_class_t *cls, ir_graph *irg, ir_node *bl, int n, ir_node *in[])
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{
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	ir_node *irn;
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	irn = new_ir_node(NULL, irg, bl, op_Keep, mode_ANY, n, in);
	init_node_attr(irn, cls, irg, 0);
	keep_alive(irn);
	return irn;
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}

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ir_node *be_new_Call(ir_graph *irg, ir_node *bl, ir_node *mem, ir_node *sp, ir_node *ptr, int n_outs, int n, ir_node *in[])
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{
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	int real_n = 3 + n;
	ir_node *irn;
	ir_node **real_in;
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	real_in = malloc(sizeof(real_in[0]) * (real_n));

	real_in[0] = mem;
	real_in[1] = sp;
	real_in[2] = ptr;
	memcpy(&real_in[3], in, n * sizeof(in[0]));

	irn = new_ir_node(NULL, irg, bl, op_Call, mode_T, real_n, real_in);
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	init_node_attr(irn, NULL, irg, (n_outs > real_n ? n_outs : real_n));
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	return irn;
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}

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ir_node *be_new_IncSP(const arch_register_t *sp, ir_graph *irg, ir_node *bl, ir_node *old_sp, unsigned offset, be_stack_dir_t dir)
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{
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	be_stack_attr_t *a;
	ir_node *irn;
	ir_node *in[1];

	in[0]     = old_sp;
	irn       = new_ir_node(NULL, irg, bl, op_IncSP, sp->reg_class->mode, 1, in);
	a         = init_node_attr(irn, sp->reg_class, irg, 1);
	a->dir    = dir;
	a->offset = offset;

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	a->node_attr.flags |= arch_irn_flags_ignore;

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	/* Set output constraint to stack register. */
	be_set_constr_single_reg(irn, -1, sp);
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	be_node_set_irn_reg(NULL, irn, sp);
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	return irn;
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}
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ir_node *be_new_AddSP(const arch_register_t *sp, ir_graph *irg, ir_node *bl, ir_node *old_sp, ir_node *op)
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{
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	be_node_attr_t *a;
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	ir_node *irn;
	ir_node *in[2];

	in[0]    = old_sp;
	in[1]    = op;
	irn      = new_ir_node(NULL, irg, bl, op_AddSP, sp->reg_class->mode, 2, in);
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	a        = init_node_attr(irn, sp->reg_class, irg, 1);
	a->flags |= arch_irn_flags_ignore;
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	/* Set output constraint to stack register. */
	be_set_constr_single_reg(irn, -1, sp);
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	be_node_set_irn_reg(NULL, irn, sp);
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	return irn;
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}
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ir_node *be_new_NoReg(const arch_register_t *reg, ir_graph *irg, ir_node *bl)
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{
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	be_node_attr_t *a;
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	ir_node *irn;
	ir_node *in[1];

	irn = new_ir_node(NULL, irg, bl, op_NoReg, reg->reg_class->mode, 0, in);
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	a   = init_node_attr(irn, reg->reg_class, irg, 1);
	a->flags |= arch_irn_flags_ignore;
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	be_set_constr_single_reg(irn, -1, reg);
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	be_node_set_irn_reg(NULL, irn, reg);
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	return irn;
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}
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ir_node *be_new_StackParam(const arch_register_class_t *cls, ir_graph *irg, ir_node *bl, ir_mode *mode, ir_node *frame_pointer, unsigned offset)
{
	be_stack_attr_t *a;
	ir_node *irn;
	ir_node *in[1];

	in[0] = frame_pointer;
	irn = new_ir_node(NULL, irg, bl, op_StackParam, mode, 1, in);
	a = init_node_attr(irn, cls, irg, 1);
	a->offset = offset;
	return irn;
}

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int be_is_Spill         (const ir_node *irn) { return get_irn_be_opcode(irn) == beo_Spill          ; }
int be_is_Reload        (const ir_node *irn) { return get_irn_be_opcode(irn) == beo_Reload         ; }
int be_is_Copy          (const ir_node *irn) { return get_irn_be_opcode(irn) == beo_Copy           ; }
int be_is_Perm          (const ir_node *irn) { return get_irn_be_opcode(irn) == beo_Perm           ; }
int be_is_Keep          (const ir_node *irn) { return get_irn_be_opcode(irn) == beo_Keep           ; }
int be_is_Call          (const ir_node *irn) { return get_irn_be_opcode(irn) == beo_Call           ; }
int be_is_IncSP         (const ir_node *irn) { return get_irn_be_opcode(irn) == beo_IncSP          ; }
int be_is_AddSP         (const ir_node *irn) { return get_irn_be_opcode(irn) == beo_AddSP          ; }
int be_is_RegParams     (const ir_node *irn) { return get_irn_be_opcode(irn) == beo_RegParams      ; }
int be_is_StackParam    (const ir_node *irn) { return get_irn_be_opcode(irn) == beo_StackParam     ; }
int be_is_NoReg         (const ir_node *irn) { return get_irn_be_opcode(irn) == beo_NoReg          ; }

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static void be_limited(void *data, bitset_t *bs)
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{
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	be_req_t *req = data;

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	switch(req->kind) {
	case be_req_kind_negate_old_limited:
	case be_req_kind_old_limited:
		req->x.old_limited.old_limited(req->x.old_limited.old_limited_env, bs);
		if(req->kind == be_req_kind_negate_old_limited)
			bitset_flip_all(bs);
		break;
	case be_req_kind_single_reg:
		bitset_clear_all(bs);
		bitset_set(bs, req->x.single_reg->index);
		break;
	}
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}

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void be_set_constr_single_reg(ir_node *irn, int pos, const arch_register_t *reg)
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{
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	int idx           = pos < 0 ? -(pos - 1) : pos;
	be_node_attr_t *a = get_irn_attr(irn);
	be_reg_data_t *rd = &a->reg_data[idx];
	be_req_t       *r = pos < 0 ? &rd->req : &rd->in_req;

	assert(is_be_node(irn));
	assert(!(pos >= 0) || pos < get_irn_arity(irn));
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	assert(!(pos < 0)  || -(pos + 1) <= a->max_reg_data);
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	r->kind            = be_req_kind_single_reg;
	r->x.single_reg    = reg;
	r->req.limited     = be_limited;
	r->req.limited_env = r;
	r->req.type        = arch_register_req_type_limited;
	r->req.cls         = reg->reg_class;
}

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void be_set_constr_limited(ir_node *irn, int pos, const arch_register_req_t *req)
{
	int idx           = pos < 0 ? -(pos - 1) : pos;
	be_node_attr_t *a = get_irn_attr(irn);
	be_reg_data_t *rd = &a->reg_data[idx];
	be_req_t       *r = pos < 0 ? &rd->req : &rd->in_req;

	assert(is_be_node(irn));
	assert(!(pos >= 0) || pos < get_irn_arity(irn));
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	assert(!(pos < 0)  || -(pos + 1) <= a->max_reg_data);
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	assert(arch_register_req_is(req, limited));

	r->kind            = be_req_kind_old_limited;
	r->req.limited     = be_limited;
	r->req.limited_env = r;
	r->req.type        = arch_register_req_type_limited;
	r->req.cls         = req->cls;

	r->x.old_limited.old_limited     = req->limited;
	r->x.old_limited.old_limited_env = req->limited_env;
}

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void be_set_IncSP_offset(ir_node *irn, unsigned offset)
{
	be_stack_attr_t *a = get_irn_attr(irn);
	assert(be_is_IncSP(irn));
	a->offset = offset;
}
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unsigned be_get_IncSP_offset(ir_node *irn)
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{
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	be_stack_attr_t *a = get_irn_attr(irn);
	assert(be_is_IncSP(irn));
	return a->offset;
}
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void be_set_IncSP_direction(ir_node *irn, be_stack_dir_t dir)
{
	be_stack_attr_t *a = get_irn_attr(irn);
	assert(be_is_IncSP(irn));
	a->dir = dir;
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}

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be_stack_dir_t be_get_IncSP_direction(ir_node *irn)
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{
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	be_stack_attr_t *a = get_irn_attr(irn);
	assert(be_is_IncSP(irn));
	return a->dir;
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}

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void be_set_Spill_entity(ir_node *irn, entity *ent)
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{
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	be_spill_attr_t *a = get_irn_attr(irn);
	assert(be_is_Spill(irn));
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	a->ent = ent;
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}

static ir_node *find_a_spill_walker(ir_node *irn, unsigned visited_nr)
{
	if(get_irn_visited(irn) < visited_nr) {
		set_irn_visited(irn, visited_nr);

		if(is_Phi(irn)) {
			int i, n;
			for(i = 0, n = get_irn_arity(irn); i < n; ++i) {
				ir_node *n = find_a_spill_walker(get_irn_n(irn, i), visited_nr);
				if(n != NULL)
					return n;
			}
		}

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		else if(get_irn_be_opcode(irn) == beo_Spill)
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			return irn;
	}

	return NULL;
}

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ir_node *be_get_Spill_context(const ir_node *irn) {
	const be_spill_attr_t *a = get_irn_attr(irn);
	assert(be_is_Spill(irn));
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	return a->spill_ctx;
}

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/**
 * Finds a spill for a reload.
 * If the reload is directly using the spill, this is simple,
 * else we perform DFS from the reload (over all PhiMs) and return
 * the first spill node we find.
 */
static INLINE ir_node *find_a_spill(ir_node *irn)
{
	ir_graph *irg       = get_irn_irg(irn);
	unsigned visited_nr = get_irg_visited(irg) + 1;

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	assert(be_is_Reload(irn));
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	set_irg_visited(irg, visited_nr);
	return find_a_spill_walker(irn, visited_nr);
}

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entity *be_get_spill_entity(ir_node *irn)
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{
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	int opc           = get_irn_opcode(irn);
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	switch(get_irn_be_opcode(irn)) {
	case beo_Reload:
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		return be_get_spill_entity(find_a_spill(irn));
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	case beo_Spill:
		{
			be_spill_attr_t *a = get_irn_attr(irn);
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			return a->ent;
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		}
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	default:
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		assert(0 && "Must give spill/reload node");
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	}

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	return NULL;
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}

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ir_node *be_spill(const arch_env_t *arch_env, ir_node *irn, ir_node *ctx)
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{
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	const arch_register_class_t *cls = arch_get_irn_reg_class(arch_env, irn, -1);
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	ir_node *bl    = get_nodes_block(irn);
	ir_graph *irg  = get_irn_irg(bl);
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	ir_node *spill = be_new_Spill(cls, irg, bl, irn, ctx);
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	ir_node *insert;

	/*
	 * search the right insertion point. a spill of a phi cannot be put
	 * directly after the phi, if there are some phis behind the one which
	 * is spilled.
	 */
	insert = sched_next(irn);
	while(is_Phi(insert) && !sched_is_end(insert))
		insert = sched_next(insert);

	sched_add_before(insert, spill);
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	return spill;
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}

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ir_node *be_reload(const arch_env_t *arch_env,
				   const arch_register_class_t *cls,
				   ir_node *irn, int pos, ir_mode *mode, ir_node *spill)
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{
	ir_node *reload;

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	ir_node *bl   = get_nodes_block(irn);
	ir_graph *irg = get_irn_irg(bl);
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	assert(be_is_Spill(spill) || (is_Phi(spill) && get_irn_mode(spill) == mode_M));
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	reload = be_new_Reload(cls, irg, bl, mode, spill);
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	set_irn_n(irn, pos, reload);
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	sched_add_before(irn, reload);
	return reload;
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}
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static void *put_out_reg_req(arch_register_req_t *req, const ir_node *irn, int out_pos)
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{
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	const be_node_attr_t *a = get_irn_attr(irn);
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	if(out_pos < a->max_reg_data)
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		memcpy(req, &a->reg_data[out_pos].req, sizeof(req[0]));
	else {
		req->type = arch_register_req_type_none;
		req->cls  = NULL;
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	}
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	return req;
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}

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static void *put_in_reg_req(arch_register_req_t *req, const ir_node *irn, int pos)
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{
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	const be_node_attr_t *a = get_irn_attr(irn);
	int n                   = get_irn_arity(irn);

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	if(pos < get_irn_arity(irn))
		memcpy(req, &a->reg_data[pos].in_req, sizeof(req[0]));
	else {
		req->type = arch_register_req_type_none;
		req->cls  = NULL;
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	}

	return req;
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}

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static const arch_register_req_t *
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be_node_get_irn_reg_req(const void *self, arch_register_req_t *req, const ir_node *irn, int pos)
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{
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	int out_pos = pos;
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	if(pos < 0) {
		if(get_irn_mode(irn) == mode_T)
			return NULL;
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		out_pos = redir_proj((const ir_node **) &irn, pos);
		assert(is_be_node(irn));
		return put_out_reg_req(req, irn, out_pos);
	}
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	else {
		return is_be_node(irn) ? put_in_reg_req(req, irn, pos) : NULL;
	}
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	return req;
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}

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const arch_register_t *
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be_node_get_irn_reg(const void *_self, const ir_node *irn)
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{
	int out_pos;
	be_node_attr_t *a;
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	out_pos = redir_proj((const ir_node **) &irn, -1);
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	a       = get_irn_attr(irn);
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	assert(is_be_node(irn));
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	assert(out_pos < a->max_reg_data && "position too high");
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	return a->reg_data[out_pos].reg;
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}

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arch_irn_class_t be_node_classify(const void *_self, const ir_node *irn)
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{
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	redir_proj((const ir_node **) &irn, -1);
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	switch(get_irn_be_opcode(irn)) {
#define XXX(a,b) case beo_ ## a: return arch_irn_class_ ## b;
		XXX(Spill, spill)
		XXX(Reload, reload)
		XXX(Perm, perm)
		XXX(Copy, copy)
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#undef XXX
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		default:
		return 0;
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	}

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	return 0;
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}

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arch_irn_flags_t be_node_get_flags(const void *_self, const ir_node *irn)
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{
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	be_node_attr_t *a = get_irn_attr(irn);
	return a->flags;
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}

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static const arch_irn_ops_if_t be_node_irn_ops_if = {
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	be_node_get_irn_reg_req,
	be_node_set_irn_reg,
	be_node_get_irn_reg,
	be_node_classify,
	be_node_get_flags,
};
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static const arch_irn_ops_t be_node_irn_ops = {
	&be_node_irn_ops_if
};

const void *be_node_get_arch_ops(const arch_irn_handler_t *self, const ir_node *irn)
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{
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	redir_proj((const ir_node **) &irn, -1);
	return is_be_node(irn) ? &be_node_irn_ops : NULL;
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}

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const arch_irn_handler_t be_node_irn_handler = {
	be_node_get_arch_ops
};
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static int dump_node(ir_node *irn, FILE *f, dump_reason_t reason)
{
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	be_node_attr_t *at = get_irn_attr(irn);
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	int i;

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	assert(is_be_node(irn));

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	switch(reason) {
		case dump_node_opcode_txt:
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			fprintf(f, get_op_name(get_irn_op(irn)));
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			break;
		case dump_node_mode_txt:
			fprintf(f, get_mode_name(get_irn_mode(irn)));
			break;
		case dump_node_nodeattr_txt:
			break;
		case dump_node_info_txt:
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			fprintf(f, "reg class: %s\n", at->cls->name);
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			for(i = 0; i < at->max_reg_data; ++i) {
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				const arch_register_t *reg = at->reg_data[i].reg;
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				fprintf(f, "reg #%d: %s\n", i, reg ? reg->name : "n/a");
			}

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			switch(get_irn_be_opcode(irn)) {
			case beo_Spill:
				{
					be_spill_attr_t *a = (be_spill_attr_t *) at;

					ir_fprintf(f, "spill context: %+F\n", a->spill_ctx);
					if (a->ent) {
						unsigned ofs = get_entity_offset_bytes(a->ent);
						ir_fprintf(f, "spill entity: %+F offset %x (%d)\n", a->ent, ofs, ofs);
					}
					else {
						ir_fprintf(f, "spill entity: n/a\n");
					}
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				}
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				break;

			case beo_IncSP:
				{
					be_stack_attr_t *a = (be_stack_attr_t *) at;
					fprintf(f, "offset: %u\n", a->offset);
					fprintf(f, "direction: %s\n", a->dir == be_stack_dir_along ? "along" : "against");
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				}
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				break;
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			}
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	}

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	return 0;
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}

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void copy_attr(const ir_node *old_node, ir_node *new_node)
{
	be_node_attr_t *old_attr = get_irn_attr(old_attr);
	be_node_attr_t *new_attr = get_irn_attr(new_node);

	assert(is_be_node(old_node));
	assert(is_be_node(new_node));

	memcpy(new_attr, old_attr, old_node->op->attr_size);

	new_attr->reg_data = NEW_ARR_D(be_reg_data_t, get_irg_obstack(get_irn_irg(new_node)), new_attr->max_reg_data);
	memcpy(new_attr->reg_data, old_attr->reg_data, new_attr->max_reg_data * sizeof(be_reg_data_t));
}

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static const ir_op_ops be_node_op_ops = {
	NULL,
	NULL,
	NULL,
	NULL,
	NULL,
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	copy_attr,
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	NULL,
	NULL,
	NULL,
	NULL,
	NULL,
	dump_node,
	NULL
};

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pset *nodes_live_at(const arch_env_t *arch_env, const arch_register_class_t *cls, const ir_node *pos, pset *live)
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{
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	firm_dbg_module_t *dbg = firm_dbg_register("firm.be.node");
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	const ir_node *bl      = is_Block(pos) ? pos : get_nodes_block(pos);
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	ir_node *irn;
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	irn_live_t *li;
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	live_foreach(bl, li) {
		ir_node *irn = (ir_node *) li->irn;
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		if(live_is_end(li) && arch_irn_consider_in_reg_alloc(arch_env, cls, irn))
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			pset_insert_ptr(live, irn);
	}

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	sched_foreach_reverse(bl, irn) {
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		int i, n;
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		ir_node *x;
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		/*
		 * If we encounter the node we want to insert the Perm after,
		* exit immediately, so that this node is still live
		*/
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		if(irn == pos)
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			return live;
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		DBG((dbg, LEVEL_1, "%+F\n", irn));
		for(x = pset_first(live); x; x = pset_next(live))
			DBG((dbg, LEVEL_1, "\tlive: %+F\n", x));
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		if(arch_irn_has_reg_class(arch_env, irn, -1, cls))
			pset_remove_ptr(live, irn);
800

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		for(i = 0, n = get_irn_arity(irn); i < n; ++i) {
			ir_node *op = get_irn_n(irn, i);
803

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			if(arch_irn_consider_in_reg_alloc(arch_env, cls, op))
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				pset_insert_ptr(live, op);
		}
	}
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	return live;
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}

ir_node *insert_Perm_after(const arch_env_t *arch_env,
						   const arch_register_class_t *cls,
						   dom_front_info_t *dom_front,
						   ir_node *pos)
{
	ir_node *bl                 = is_Block(pos) ? pos : get_nodes_block(pos);
	ir_graph *irg               = get_irn_irg(bl);
	pset *live                  = pset_new_ptr_default();
	firm_dbg_module_t *dbg      = firm_dbg_register("be.node");

	ir_node *curr, *irn, *perm, **nodes;
	int i, n;

	DBG((dbg, LEVEL_1, "Insert Perm after: %+F\n", pos));

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	if(!nodes_live_at(arch_env, cls, pos, live));
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	n = pset_count(live);
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	if(n == 0)
		return NULL;

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	nodes = malloc(n * sizeof(nodes[0]));
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	DBG((dbg, LEVEL_1, "live:\n"));
	for(irn = pset_first(live), i = 0; irn; irn = pset_next(live), i++) {
		DBG((dbg, LEVEL_1, "\t%+F\n", irn));
		nodes[i] = irn;
	}
841

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	perm = be_new_Perm(cls, irg, bl, n, nodes);
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	sched_add_after(pos, perm);
	free(nodes);
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	curr = perm;
	for(i = 0; i < n; ++i) {
		ir_node *copies[1];
		ir_node *perm_op = get_irn_n(perm, i);
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		const arch_register_t *reg = arch_get_irn_register(arch_env, perm_op);
851

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		ir_mode *mode = get_irn_mode(perm_op);
		ir_node *proj = new_r_Proj(irg, bl, perm, mode, i);
		arch_set_irn_register(arch_env, proj, reg);
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		sched_add_after(curr, proj);
		curr = proj;
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		copies[0] = proj;
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		be_ssa_constr_single(dom_front, perm_op, 1, copies);
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	}
	return perm;
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}