ia32_common_transform.c 28.3 KB
Newer Older
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
/*
 * Copyright (C) 1995-2008 University of Karlsruhe.  All right reserved.
 *
 * This file is part of libFirm.
 *
 * This file may be distributed and/or modified under the terms of the
 * GNU General Public License version 2 as published by the Free Software
 * Foundation and appearing in the file LICENSE.GPL included in the
 * packaging of this file.
 *
 * Licensees holding valid libFirm Professional Edition licenses may use
 * this file in accordance with the libFirm Commercial License.
 * Agreement provided with the Software.
 *
 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE.
 */

/**
 * @file
 * @brief       This file implements the common parts of IR transformation from
 *              firm into ia32-Firm.
Matthias Braun's avatar
Matthias Braun committed
24
 * @author      Matthias Braun, Sebastian Buchwald
25
26
 * @version     $Id: ia32_common_transform.c 21012 2008-08-06 13:35:17Z beck $
 */
27
#include "config.h"
28
29
30
31
32

#include "error.h"
#include "ircons.h"
#include "irprintf.h"
#include "typerep.h"
33
#include "bitset.h"
34
35

#include "../betranshlp.h"
36
37
#include "../beirg.h"
#include "../beabi.h"
38
39
40
41
42
43
44
45
46

#include "ia32_architecture.h"
#include "ia32_common_transform.h"
#include "ia32_new_nodes.h"

#include "gen_ia32_new_nodes.h"
#include "gen_ia32_regalloc_if.h"

/** hold the current code generator during transformation */
47
48
49
ia32_code_gen_t *env_cg = NULL;

heights_t *heights = NULL;
50
51
52
53
54
55
56
57
58
59
60
61

static const arch_register_req_t no_register_req = {
	arch_register_req_type_none,
	NULL,                         /* regclass */
	NULL,                         /* limit bitset */
	0,                            /* same pos */
	0                             /* different pos */
};

static int check_immediate_constraint(long val, char immediate_constraint_type)
{
	switch (immediate_constraint_type) {
62
63
64
65
66
67
68
69
70
71
72
73
		case 0:
		case 'i': return 1;

		case 'I': return    0 <= val && val <=  31;
		case 'J': return    0 <= val && val <=  63;
		case 'K': return -128 <= val && val <= 127;
		case 'L': return val == 0xff || val == 0xffff;
		case 'M': return    0 <= val && val <=   3;
		case 'N': return    0 <= val && val <= 255;
		case 'O': return    0 <= val && val <= 127;

		default: panic("Invalid immediate constraint found");
74
75
76
	}
}

77
78
/* creates a unique ident by adding a number to a tag */
ident *ia32_unique_id(const char *tag)
79
80
81
82
83
84
85
86
87
{
	static unsigned id = 0;
	char str[256];

	snprintf(str, sizeof(str), tag, ++id);
	return new_id_from_str(str);
}

/**
88
 * Get a primitive type for a mode with alignment 16.
89
90
91
92
93
94
95
 */
static ir_type *ia32_get_prim_type(pmap *types, ir_mode *mode)
{
	pmap_entry *e = pmap_find(types, mode);
	ir_type *res;

	if (! e) {
96
		res = new_type_primitive(mode);
97
		if (get_mode_size_bits(mode) >= 80) {
98
99
			set_type_alignment_bytes(res, 16);
		}
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
		pmap_insert(types, mode, res);
	}
	else
		res = e->value;
	return res;
}

ir_entity *create_float_const_entity(ir_node *cnst)
{
	ia32_isa_t *isa = env_cg->isa;
	tarval *key     = get_Const_tarval(cnst);
	pmap_entry *e   = pmap_find(isa->tv_ent, key);
	ir_entity *res;
	ir_graph *rem;

	if (e == NULL) {
		tarval  *tv   = key;
		ir_mode *mode = get_tarval_mode(tv);
		ir_type *tp;

		if (! ia32_cg_config.use_sse2) {
			/* try to reduce the mode to produce smaller sized entities */
			if (mode != mode_F) {
				if (tarval_ieee754_can_conv_lossless(tv, mode_F)) {
					mode = mode_F;
					tv = tarval_convert_to(tv, mode);
				} else if (mode != mode_D) {
					if (tarval_ieee754_can_conv_lossless(tv, mode_D)) {
						mode = mode_D;
						tv = tarval_convert_to(tv, mode);
					}
				}
			}
		}

		if (mode == get_irn_mode(cnst)) {
			/* mode was not changed */
			tp = get_Const_type(cnst);
			if (tp == firm_unknown_type)
				tp = ia32_get_prim_type(isa->types, mode);
		} else
			tp = ia32_get_prim_type(isa->types, mode);

143
		res = new_entity(get_glob_type(), ia32_unique_id(".LC%u"), tp);
144
145

		set_entity_ld_ident(res, get_entity_ident(res));
146
147
		set_entity_visibility(res, ir_visibility_local);
		add_entity_linkage(res, IR_LINKAGE_CONSTANT);
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163

		 /* we create a new entity here: It's initialization must resist on the
		    const code irg */
		rem = current_ir_graph;
		current_ir_graph = get_const_code_irg();
		set_atomic_ent_value(res, new_Const_type(tv, tp));
		current_ir_graph = rem;

		pmap_insert(isa->tv_ent, key, res);
	} else {
		res = e->value;
	}

	return res;
}

164
ir_node *ia32_create_Immediate(ir_entity *symconst, int symconst_sign, long val)
165
166
167
{
	ir_graph *irg         = current_ir_graph;
	ir_node  *start_block = get_irg_start_block(irg);
168
	ir_node  *immediate   = new_bd_ia32_Immediate(NULL, start_block, symconst,
169
			symconst_sign, no_pic_adjust, val);
170
	arch_set_irn_register(immediate, &ia32_gp_regs[REG_GP_NOREG]);
171
172
173
174
175
176
177
178
179
180
181
182
183

	return immediate;
}

const arch_register_t *ia32_get_clobber_register(const char *clobber)
{
	const arch_register_t       *reg = NULL;
	int                          c;
	size_t                       r;
	const arch_register_class_t *cls;

	/* TODO: construct a hashmap instead of doing linear search for clobber
	 * register */
184
	for (c = 0; c < N_CLASSES; ++c) {
185
		cls = & ia32_reg_classes[c];
186
		for (r = 0; r < cls->n_regs; ++r) {
187
			const arch_register_t *temp_reg = arch_register_for_index(cls, r);
Michael Beck's avatar
Michael Beck committed
188
			if (strcmp(temp_reg->name, clobber) == 0
189
190
191
192
193
					|| (c == CLASS_ia32_gp && strcmp(temp_reg->name+1, clobber) == 0)) {
				reg = temp_reg;
				break;
			}
		}
Michael Beck's avatar
Michael Beck committed
194
		if (reg != NULL)
195
196
197
198
199
200
			break;
	}

	return reg;
}

201
202
int ia32_mode_needs_gp_reg(ir_mode *mode)
{
Michael Beck's avatar
Michael Beck committed
203
	if (mode == mode_fpcw)
204
		return 0;
Michael Beck's avatar
Michael Beck committed
205
	if (get_mode_size_bits(mode) > 32)
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
		return 0;
	return mode_is_int(mode) || mode_is_reference(mode) || mode == mode_b;
}

static void parse_asm_constraints(constraint_t *constraint, const char *c,
                           int is_output)
{
	char                         immediate_type     = '\0';
	unsigned                     limited            = 0;
	const arch_register_class_t *cls                = NULL;
	int                          memory_possible       = 0;
	int                          all_registers_allowed = 0;
	int                          p;
	int                          same_as = -1;

	memset(constraint, 0, sizeof(constraint[0]));
	constraint->same_as = -1;

Michael Beck's avatar
Michael Beck committed
224
	if (*c == 0) {
225
226
227
228
229
230
231
232
		/* a memory constraint: no need to do anything in backend about it
		 * (the dependencies are already respected by the memory edge of
		 * the node) */
		return;
	}

	/* TODO: improve error messages with node and source info. (As users can
	 * easily hit these) */
233
234
	while (*c != 0) {
		switch (*c) {
235
236
237
238
239
		case ' ':
		case '\t':
		case '\n':
			break;

240
241
242
		/* Skip out/in-out marker */
		case '=': break;
		case '+': break;
243

244
245
		case '&': break;

246
247
248
249
		case '*':
			++c;
			break;
		case '#':
250
			while (*c != 0 && *c != ',')
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
				++c;
			break;

		case 'a':
			assert(cls == NULL || cls == &ia32_reg_classes[CLASS_ia32_gp]);
			cls      = &ia32_reg_classes[CLASS_ia32_gp];
			limited |= 1 << REG_EAX;
			break;
		case 'b':
			assert(cls == NULL || cls == &ia32_reg_classes[CLASS_ia32_gp]);
			cls      = &ia32_reg_classes[CLASS_ia32_gp];
			limited |= 1 << REG_EBX;
			break;
		case 'c':
			assert(cls == NULL || cls == &ia32_reg_classes[CLASS_ia32_gp]);
			cls      = &ia32_reg_classes[CLASS_ia32_gp];
			limited |= 1 << REG_ECX;
			break;
		case 'd':
			assert(cls == NULL || cls == &ia32_reg_classes[CLASS_ia32_gp]);
			cls      = &ia32_reg_classes[CLASS_ia32_gp];
			limited |= 1 << REG_EDX;
			break;
		case 'D':
			assert(cls == NULL || cls == &ia32_reg_classes[CLASS_ia32_gp]);
			cls      = &ia32_reg_classes[CLASS_ia32_gp];
			limited |= 1 << REG_EDI;
			break;
		case 'S':
			assert(cls == NULL || cls == &ia32_reg_classes[CLASS_ia32_gp]);
			cls      = &ia32_reg_classes[CLASS_ia32_gp];
			limited |= 1 << REG_ESI;
			break;
		case 'Q':
		case 'q':
			/* q means lower part of the regs only, this makes no
			 * difference to Q for us (we only assign whole registers) */
			assert(cls == NULL || cls == &ia32_reg_classes[CLASS_ia32_gp]);
			cls      = &ia32_reg_classes[CLASS_ia32_gp];
			limited |= 1 << REG_EAX | 1 << REG_EBX | 1 << REG_ECX |
			           1 << REG_EDX;
			break;
		case 'A':
			assert(cls == NULL || cls == &ia32_reg_classes[CLASS_ia32_gp]);
			cls      = &ia32_reg_classes[CLASS_ia32_gp];
			limited |= 1 << REG_EAX | 1 << REG_EDX;
			break;
		case 'l':
			assert(cls == NULL || cls == &ia32_reg_classes[CLASS_ia32_gp]);
			cls      = &ia32_reg_classes[CLASS_ia32_gp];
			limited |= 1 << REG_EAX | 1 << REG_EBX | 1 << REG_ECX |
			           1 << REG_EDX | 1 << REG_ESI | 1 << REG_EDI |
			           1 << REG_EBP;
			break;

		case 'R':
		case 'r':
		case 'p':
			if (cls != NULL && cls != &ia32_reg_classes[CLASS_ia32_gp])
				panic("multiple register classes not supported");
			cls                   = &ia32_reg_classes[CLASS_ia32_gp];
			all_registers_allowed = 1;
			break;

		case 'f':
		case 't':
		case 'u':
			/* TODO: mark values so the x87 simulator knows about t and u */
			if (cls != NULL && cls != &ia32_reg_classes[CLASS_ia32_vfp])
				panic("multiple register classes not supported");
			cls                   = &ia32_reg_classes[CLASS_ia32_vfp];
			all_registers_allowed = 1;
			break;

		case 'Y':
		case 'x':
			if (cls != NULL && cls != &ia32_reg_classes[CLASS_ia32_xmm])
				panic("multiple register classes not supproted");
			cls                   = &ia32_reg_classes[CLASS_ia32_xmm];
			all_registers_allowed = 1;
			break;

		case 'I':
		case 'J':
		case 'K':
		case 'L':
		case 'M':
		case 'N':
		case 'O':
			if (cls != NULL && cls != &ia32_reg_classes[CLASS_ia32_gp])
				panic("multiple register classes not supported");
			if (immediate_type != '\0')
				panic("multiple immediate types not supported");
			cls            = &ia32_reg_classes[CLASS_ia32_gp];
			immediate_type = *c;
			break;
		case 'n':
		case 'i':
			if (cls != NULL && cls != &ia32_reg_classes[CLASS_ia32_gp])
				panic("multiple register classes not supported");
			if (immediate_type != '\0')
				panic("multiple immediate types not supported");
			cls            = &ia32_reg_classes[CLASS_ia32_gp];
			immediate_type = 'i';
			break;

		case 'X':
		case 'g':
			if (cls != NULL && cls != &ia32_reg_classes[CLASS_ia32_gp])
				panic("multiple register classes not supported");
			if (immediate_type != '\0')
				panic("multiple immediate types not supported");
			immediate_type        = 'i';
			cls                   = &ia32_reg_classes[CLASS_ia32_gp];
			all_registers_allowed = 1;
			memory_possible       = 1;
			break;

		case '0':
		case '1':
		case '2':
		case '3':
		case '4':
		case '5':
		case '6':
		case '7':
		case '8':
		case '9':
			if (is_output)
				panic("can only specify same constraint on input");

			sscanf(c, "%d%n", &same_as, &p);
Michael Beck's avatar
Michael Beck committed
383
			if (same_as >= 0) {
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
				c += p;
				continue;
			}
			break;

		case 'm':
		case 'o':
		case 'V':
			/* memory constraint no need to do anything in backend about it
			 * (the dependencies are already respected by the memory edge of
			 * the node) */
			memory_possible = 1;
			break;

		case 'E': /* no float consts yet */
		case 'F': /* no float consts yet */
		case 's': /* makes no sense on x86 */
		case '<': /* no autodecrement on x86 */
		case '>': /* no autoincrement on x86 */
		case 'C': /* sse constant not supported yet */
		case 'G': /* 80387 constant not supported yet */
		case 'y': /* we don't support mmx registers yet */
		case 'Z': /* not available in 32 bit mode */
		case 'e': /* not available in 32 bit mode */
			panic("unsupported asm constraint '%c' found in (%+F)",
			      *c, current_ir_graph);
			break;
		default:
			panic("unknown asm constraint '%c' found in (%+F)", *c,
			      current_ir_graph);
			break;
		}
		++c;
	}

Michael Beck's avatar
Michael Beck committed
419
	if (same_as >= 0) {
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
		if (cls != NULL)
			panic("same as and register constraint not supported");
		if (immediate_type != '\0')
			panic("same as and immediate constraint not supported");
	}

	if (cls == NULL && same_as < 0) {
		if (!memory_possible)
			panic("no constraint specified for assembler input");
	}

	constraint->same_as               = same_as;
	constraint->cls                   = cls;
	constraint->allowed_registers     = limited;
	constraint->all_registers_allowed = all_registers_allowed;
	constraint->memory_possible       = memory_possible;
	constraint->immediate_type        = immediate_type;
}

439
440
441
442
443
444
445
446
447
448
449
450
static bool can_match(const arch_register_req_t *in,
                      const arch_register_req_t *out)
{
	if (in->cls != out->cls)
		return false;
	if ( (in->type & arch_register_req_type_limited) == 0
		|| (out->type & arch_register_req_type_limited) == 0 )
		return true;

	return (*in->limited & *out->limited) != 0;
}

451
452
453
454
455
456
457
458
459
460
461
462
463
static inline ir_node *get_new_node(ir_node *node)
{
#ifdef FIRM_GRGEN_BE
	if (be_transformer == TRANSFORMER_DEFAULT) {
		return be_transform_node(node);
	} else {
		return node;
	}
#else
	return be_transform_node(node);
#endif
}

464
465
ir_node *gen_ASM(ir_node *node)
{
466
467
	ir_node                    *block     = get_nodes_block(node);
	ir_node                    *new_block = get_new_node(block);
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
	dbg_info                   *dbgi      = get_irn_dbg_info(node);
	int                         i, arity;
	int                         out_idx;
	ir_node                   **in;
	ir_node                    *new_node;
	int                         out_arity;
	int                         n_out_constraints;
	int                         n_clobbers;
	const arch_register_req_t **out_reg_reqs;
	const arch_register_req_t **in_reg_reqs;
	ia32_asm_reg_t             *register_map;
	unsigned                    reg_map_size = 0;
	struct obstack             *obst;
	const ir_asm_constraint    *in_constraints;
	const ir_asm_constraint    *out_constraints;
	ident                     **clobbers;
	int                         clobbers_flags = 0;
485
	unsigned                    clobber_bits[N_CLASSES];
486
	int                         out_size;
487
	backend_info_t             *info;
488
489

	memset(&clobber_bits, 0, sizeof(clobber_bits));
490
491
492
493
494
495
496
497
498

	/* workaround for lots of buggy code out there as most people think volatile
	 * asm is enough for everything and forget the flags (linux kernel, etc.)
	 */
	if (get_irn_pinned(node) == op_pin_state_pinned) {
		clobbers_flags = 1;
	}

	arity = get_irn_arity(node);
499
	in    = ALLOCANZ(ir_node*, arity);
500
501
502

	clobbers   = get_ASM_clobbers(node);
	n_clobbers = 0;
Michael Beck's avatar
Michael Beck committed
503
	for (i = 0; i < get_ASM_n_clobbers(node); ++i) {
504
505
506
		const arch_register_req_t *req;
		const char                *c = get_id_str(clobbers[i]);

507
508
509
510
511
512
		if (strcmp(c, "memory") == 0)
			continue;
		if (strcmp(c, "cc") == 0) {
			clobbers_flags = 1;
			continue;
		}
513
514

		req = parse_clobber(c);
515
		clobber_bits[req->cls->index] |= *req->limited;
516

517
518
519
520
521
522
523
524
525
		n_clobbers++;
	}
	n_out_constraints = get_ASM_n_output_constraints(node);
	out_arity         = n_out_constraints + n_clobbers;

	in_constraints  = get_ASM_input_constraints(node);
	out_constraints = get_ASM_output_constraints(node);

	/* determine size of register_map */
Michael Beck's avatar
Michael Beck committed
526
	for (out_idx = 0; out_idx < n_out_constraints; ++out_idx) {
527
528
529
530
		const ir_asm_constraint *constraint = &out_constraints[out_idx];
		if (constraint->pos > reg_map_size)
			reg_map_size = constraint->pos;
	}
Michael Beck's avatar
Michael Beck committed
531
	for (i = 0; i < arity; ++i) {
532
		const ir_asm_constraint   *constraint = &in_constraints[i];
Michael Beck's avatar
Michael Beck committed
533
		if (constraint->pos > reg_map_size)
534
535
536
537
			reg_map_size = constraint->pos;
	}
	++reg_map_size;

538
	obst         = get_irg_obstack(current_ir_graph);
539
540
541
542
	register_map = NEW_ARR_D(ia32_asm_reg_t, obst, reg_map_size);
	memset(register_map, 0, reg_map_size * sizeof(register_map[0]));

	/* construct output constraints */
543
544
	out_size = out_arity + 1;
	out_reg_reqs = obstack_alloc(obst, out_size * sizeof(out_reg_reqs[0]));
545

Michael Beck's avatar
Michael Beck committed
546
	for (out_idx = 0; out_idx < n_out_constraints; ++out_idx) {
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
		const ir_asm_constraint   *constraint = &out_constraints[out_idx];
		const char                *c       = get_id_str(constraint->constraint);
		unsigned                   pos        = constraint->pos;
		constraint_t               parsed_constraint;
		const arch_register_req_t *req;

		parse_asm_constraints(&parsed_constraint, c, 1);
		req = make_register_req(&parsed_constraint, n_out_constraints,
		                        out_reg_reqs, out_idx);
		out_reg_reqs[out_idx] = req;

		register_map[pos].use_input = 0;
		register_map[pos].valid     = 1;
		register_map[pos].memory    = 0;
		register_map[pos].inout_pos = out_idx;
		register_map[pos].mode      = constraint->mode;
	}

	/* inputs + input constraints */
	in_reg_reqs = obstack_alloc(obst, arity * sizeof(in_reg_reqs[0]));
Michael Beck's avatar
Michael Beck committed
567
	for (i = 0; i < arity; ++i) {
568
569
570
571
572
573
574
		ir_node                   *pred         = get_irn_n(node, i);
		const ir_asm_constraint   *constraint   = &in_constraints[i];
		ident                     *constr_id    = constraint->constraint;
		const char                *c            = get_id_str(constr_id);
		unsigned                   pos          = constraint->pos;
		int                        is_memory_op = 0;
		ir_node                   *input        = NULL;
575
		unsigned                   r_clobber_bits;
576
577
578
579
		constraint_t               parsed_constraint;
		const arch_register_req_t *req;

		parse_asm_constraints(&parsed_constraint, c, 0);
Matthias Braun's avatar
Matthias Braun committed
580
581
582
583
584
585
586
587
588
589
		if (parsed_constraint.cls != NULL) {
			r_clobber_bits = clobber_bits[parsed_constraint.cls->index];
			if (r_clobber_bits != 0) {
				if (parsed_constraint.all_registers_allowed) {
					parsed_constraint.all_registers_allowed = 0;
					be_abi_set_non_ignore_regs(env_cg->birg->abi,
							parsed_constraint.cls,
							&parsed_constraint.allowed_registers);
				}
				parsed_constraint.allowed_registers &= ~r_clobber_bits;
590
591
592
			}
		}

593
594
595
596
597
598
599
600
601
602
		req = make_register_req(&parsed_constraint, n_out_constraints,
		                        out_reg_reqs, i);
		in_reg_reqs[i] = req;

		if (parsed_constraint.immediate_type != '\0') {
			char imm_type = parsed_constraint.immediate_type;
			input = try_create_Immediate(pred, imm_type);
		}

		if (input == NULL) {
603
604
			ir_node *pred = get_irn_n(node, i);
			input = get_new_node(pred);
605

606
607
608
			if (parsed_constraint.cls == NULL
					&& parsed_constraint.same_as < 0) {
				is_memory_op = 1;
Michael Beck's avatar
Michael Beck committed
609
			} else if (parsed_constraint.memory_possible) {
610
611
612
613
614
615
616
617
618
619
620
621
622
				/* TODO: match Load or Load/Store if memory possible is set */
			}
		}
		in[i] = input;

		register_map[pos].use_input = 1;
		register_map[pos].valid     = 1;
		register_map[pos].memory    = is_memory_op;
		register_map[pos].inout_pos = i;
		register_map[pos].mode      = constraint->mode;
	}

	/* parse clobbers */
Michael Beck's avatar
Michael Beck committed
623
	for (i = 0; i < get_ASM_n_clobbers(node); ++i) {
624
625
626
627
628
629
630
631
632
633
634
		const char                *c = get_id_str(clobbers[i]);
		const arch_register_req_t *req;

		if (strcmp(c, "memory") == 0 || strcmp(c, "cc") == 0)
			continue;

		req = parse_clobber(c);
		out_reg_reqs[out_idx] = req;
		++out_idx;
	}

yb9976's avatar
typos    
yb9976 committed
635
	/* Attempt to make ASM node register pressure faithful.
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
	 * (This does not work for complicated cases yet!)
	 *
	 * Algorithm: Check if there are fewer inputs or outputs (I will call this
	 * the smaller list). Then try to match each constraint of the smaller list
	 * to 1 of the other list. If we can't match it, then we have to add a dummy
	 * input/output to the other list
	 *
	 * FIXME: This is still broken in lots of cases. But at least better than
	 *        before...
	 * FIXME: need to do this per register class...
	 */
	if (out_arity <= arity) {
		int       orig_arity = arity;
		int       in_size    = arity;
		int       o;
		bitset_t *used_ins = bitset_alloca(arity);
		for (o = 0; o < out_arity; ++o) {
			int   i;
			const arch_register_req_t *outreq = out_reg_reqs[o];

			if (outreq->cls == NULL) {
				continue;
			}

			for (i = 0; i < orig_arity; ++i) {
				const arch_register_req_t *inreq;
				if (bitset_is_set(used_ins, i))
					continue;
				inreq = in_reg_reqs[i];
				if (!can_match(outreq, inreq))
					continue;
				bitset_set(used_ins, i);
				break;
			}
			/* did we find any match? */
			if (i < orig_arity)
				continue;

			/* we might need more space in the input arrays */
			if (arity >= in_size) {
				const arch_register_req_t **new_in_reg_reqs;
				ir_node             **new_in;

				in_size *= 2;
				new_in_reg_reqs
					= obstack_alloc(obst, in_size*sizeof(in_reg_reqs[0]));
				memcpy(new_in_reg_reqs, in_reg_reqs, arity * sizeof(new_in_reg_reqs[0]));
				new_in = ALLOCANZ(ir_node*, in_size);
				memcpy(new_in, in, arity*sizeof(new_in[0]));

				in_reg_reqs = new_in_reg_reqs;
				in          = new_in;
			}

			/* add a new (dummy) input which occupies the register */
			assert(outreq->type & arch_register_req_type_limited);
			in_reg_reqs[arity] = outreq;
			in[arity]          = new_bd_ia32_ProduceVal(NULL, block);
			be_dep_on_frame(in[arity]);
			++arity;
		}
	} else {
		int       i;
		bitset_t *used_outs = bitset_alloca(out_arity);
		int       orig_out_arity = out_arity;
		for (i = 0; i < arity; ++i) {
			int   o;
			const arch_register_req_t *inreq = in_reg_reqs[i];

			if (inreq->cls == NULL) {
				continue;
			}

			for (o = 0; o < orig_out_arity; ++o) {
				const arch_register_req_t *outreq;
				if (bitset_is_set(used_outs, o))
					continue;
				outreq = out_reg_reqs[o];
				if (!can_match(outreq, inreq))
					continue;
				bitset_set(used_outs, i);
				break;
			}
			/* did we find any match? */
			if (o < orig_out_arity)
				continue;

			/* we might need more space in the output arrays */
			if (out_arity >= out_size) {
				const arch_register_req_t **new_out_reg_reqs;

				out_size *= 2;
				new_out_reg_reqs
					= obstack_alloc(obst, out_size*sizeof(out_reg_reqs[0]));
				memcpy(new_out_reg_reqs, out_reg_reqs,
				       out_arity * sizeof(new_out_reg_reqs[0]));
				out_reg_reqs = new_out_reg_reqs;
			}

			/* add a new (dummy) output which occupies the register */
			assert(inreq->type & arch_register_req_type_limited);
			out_reg_reqs[out_arity] = inreq;
			++out_arity;
		}
	}

742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
	/* append none register requirement for the memory output */
	if (out_arity + 1 >= out_size) {
		const arch_register_req_t **new_out_reg_reqs;

		out_size = out_arity + 1;
		new_out_reg_reqs
			= obstack_alloc(obst, out_size*sizeof(out_reg_reqs[0]));
		memcpy(new_out_reg_reqs, out_reg_reqs,
			   out_arity * sizeof(new_out_reg_reqs[0]));
		out_reg_reqs = new_out_reg_reqs;
	}

	/* add a new (dummy) output which occupies the register */
	out_reg_reqs[out_arity] = arch_no_register_req;
	++out_arity;

758
	new_node = new_bd_ia32_Asm(dbgi, new_block, arity, in, out_arity,
759
760
	                           get_ASM_text(node), register_map);

761
762
	if (arity == 0)
		be_dep_on_frame(new_node);
763

764
765
766
767
	info = be_get_info(new_node);
	for (i = 0; i < out_arity; ++i) {
		info->out_infos[i].req = out_reg_reqs[i];
	}
768
769
	set_ia32_in_req_all(new_node, in_reg_reqs);

770
	SET_IA32_ORIG_NODE(new_node, node);
771
772
773
774

	return new_node;
}

775
776
ir_node *gen_CopyB(ir_node *node)
{
777
778
779
780
781
782
783
	ir_node  *block    = get_new_node(get_nodes_block(node));
	ir_node  *src      = get_CopyB_src(node);
	ir_node  *new_src  = get_new_node(src);
	ir_node  *dst      = get_CopyB_dst(node);
	ir_node  *new_dst  = get_new_node(dst);
	ir_node  *mem      = get_CopyB_mem(node);
	ir_node  *new_mem  = get_new_node(mem);
784
785
786
787
788
789
790
791
792
793
794
	ir_node  *res      = NULL;
	dbg_info *dbgi     = get_irn_dbg_info(node);
	int      size      = get_type_size_bytes(get_CopyB_type(node));
	int      rem;

	/* If we have to copy more than 32 bytes, we use REP MOVSx and */
	/* then we need the size explicitly in ECX.                    */
	if (size >= 32 * 4) {
		rem = size & 0x3; /* size % 4 */
		size >>= 2;

795
		res = new_bd_ia32_Const(dbgi, block, NULL, 0, 0, size);
796
		be_dep_on_frame(res);
797

798
		res = new_bd_ia32_CopyB(dbgi, block, new_dst, new_src, res, new_mem, rem);
799
	} else {
Michael Beck's avatar
Michael Beck committed
800
		if (size == 0) {
801
802
803
			ir_fprintf(stderr, "Optimization warning copyb %+F with size <4\n",
			           node);
		}
804
		res = new_bd_ia32_CopyB_i(dbgi, block, new_dst, new_src, new_mem, size);
805
806
	}

807
	SET_IA32_ORIG_NODE(res, node);
808
809
810
811

	return res;
}

812
813
ir_node *gen_Proj_tls(ir_node *node)
{
814
815
	ir_node *block = get_new_node(get_nodes_block(node));
	ir_node *res   = NULL;
816

817
	res = new_bd_ia32_LdTls(NULL, block, mode_Iu);
818
819
820
821

	return res;
}

822
823
ir_node *gen_Unknown(ir_node *node)
{
824
825
826
827
828
	ir_mode  *mode  = get_irn_mode(node);
	ir_graph *irg   = current_ir_graph;
	dbg_info *dbgi  = get_irn_dbg_info(node);
	ir_node  *block = get_irg_start_block(irg);
	ir_node  *res   = NULL;
829
830
831

	if (mode_is_float(mode)) {
		if (ia32_cg_config.use_sse2) {
832
			res = new_bd_ia32_xZero(dbgi, block);
833
		} else {
834
			res = new_bd_ia32_vfldz(dbgi, block);
835
836
		}
	} else if (ia32_mode_needs_gp_reg(mode)) {
837
		res = new_bd_ia32_Const(dbgi, block, NULL, 0, 0, 0);
838
839
840
	} else {
		panic("unsupported Unknown-Mode");
	}
841
842
843

	be_dep_on_frame(res);
	return res;
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
}

const arch_register_req_t *make_register_req(const constraint_t *constraint,
		int n_outs, const arch_register_req_t **out_reqs, int pos)
{
	struct obstack      *obst    = get_irg_obstack(current_ir_graph);
	int                  same_as = constraint->same_as;
	arch_register_req_t *req;

	if (same_as >= 0) {
		const arch_register_req_t *other_constr;

		if (same_as >= n_outs)
			panic("invalid output number in same_as constraint");

859
860
861
862
863
864
		other_constr     = out_reqs[same_as];

		req              = obstack_alloc(obst, sizeof(req[0]));
		*req             = *other_constr;
		req->type       |= arch_register_req_type_should_be_same;
		req->other_same  = 1U << pos;
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905

		/* switch constraints. This is because in firm we have same_as
		 * constraints on the output constraints while in the gcc asm syntax
		 * they are specified on the input constraints */
		out_reqs[same_as] = req;
		return other_constr;
	}

	/* pure memory ops */
	if (constraint->cls == NULL) {
		return &no_register_req;
	}

	if (constraint->allowed_registers != 0
			&& !constraint->all_registers_allowed) {
		unsigned *limited_ptr;

		req         = obstack_alloc(obst, sizeof(req[0]) + sizeof(unsigned));
		memset(req, 0, sizeof(req[0]));
		limited_ptr = (unsigned*) (req+1);

		req->type    = arch_register_req_type_limited;
		*limited_ptr = constraint->allowed_registers;
		req->limited = limited_ptr;
	} else {
		req       = obstack_alloc(obst, sizeof(req[0]));
		memset(req, 0, sizeof(req[0]));
		req->type = arch_register_req_type_normal;
	}
	req->cls = constraint->cls;

	return req;
}

const arch_register_req_t *parse_clobber(const char *clobber)
{
	struct obstack        *obst = get_irg_obstack(current_ir_graph);
	const arch_register_t *reg  = ia32_get_clobber_register(clobber);
	arch_register_req_t   *req;
	unsigned              *limited;

Michael Beck's avatar
Michael Beck committed
906
	if (reg == NULL) {
907
		panic("Register '%s' mentioned in asm clobber is unknown", clobber);
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
	}

	assert(reg->index < 32);

	limited  = obstack_alloc(obst, sizeof(limited[0]));
	*limited = 1 << reg->index;

	req          = obstack_alloc(obst, sizeof(req[0]));
	memset(req, 0, sizeof(req[0]));
	req->type    = arch_register_req_type_limited;
	req->cls     = arch_register_get_class(reg);
	req->limited = limited;

	return req;
}

924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962

int prevents_AM(ir_node *const block, ir_node *const am_candidate,
                       ir_node *const other)
{
	if (get_nodes_block(other) != block)
		return 0;

	if (is_Sync(other)) {
		int i;

		for (i = get_Sync_n_preds(other) - 1; i >= 0; --i) {
			ir_node *const pred = get_Sync_pred(other, i);

			if (get_nodes_block(pred) != block)
				continue;

			/* Do not block ourselves from getting eaten */
			if (is_Proj(pred) && get_Proj_pred(pred) == am_candidate)
				continue;

			if (!heights_reachable_in_block(heights, pred, am_candidate))
				continue;

			return 1;
		}

		return 0;
	} else {
		/* Do not block ourselves from getting eaten */
		if (is_Proj(other) && get_Proj_pred(other) == am_candidate)
			return 0;

		if (!heights_reachable_in_block(heights, other, am_candidate))
			return 0;

		return 1;
	}
}

963
964
965
966
967
968
969
970
971
972
ir_node *try_create_Immediate(ir_node *node, char immediate_constraint_type)
{
	long         val = 0;
	ir_entity   *symconst_ent  = NULL;
	ir_mode     *mode;
	ir_node     *cnst          = NULL;
	ir_node     *symconst      = NULL;
	ir_node     *new_node;

	mode = get_irn_mode(node);
Michael Beck's avatar
Michael Beck committed
973
	if (!mode_is_int(mode) && !mode_is_reference(mode)) {
974
975
976
		return NULL;
	}

Michael Beck's avatar
Michael Beck committed
977
	if (is_Const(node)) {
978
979
980
981
982
		cnst     = node;
		symconst = NULL;
	} else if (is_Global(node)) {
		cnst     = NULL;
		symconst = node;
Michael Beck's avatar
Michael Beck committed
983
	} else if (is_Add(node)) {
984
985
		ir_node *left  = get_Add_left(node);
		ir_node *right = get_Add_right(node);
986
987
988
989
990
991
		if (is_Const(left) && is_Global(right)) {
			cnst     = left;
			symconst = right;
		} else if (is_Global(left) && is_Const(right)) {
			cnst     = right;
			symconst = left;
992
993
994
995
996
		}
	} else {
		return NULL;
	}

Michael Beck's avatar
Michael Beck committed
997
	if (cnst != NULL) {
998
		tarval *offset = get_Const_tarval(cnst);
999
1000
		if (!tarval_is_long(offset)) {
			ir_fprintf(stderr, "Optimisation Warning: tarval of %+F is not a long?\n", cnst);
For faster browsing, not all history is shown. View entire blame