bearch_sparc.c 16.3 KB
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/*
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 * Copyright (C) 1995-2010 University of Karlsruhe.  All right reserved.
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 *
 * This file is part of libFirm.
 *
 * This file may be distributed and/or modified under the terms of the
 * GNU General Public License version 2 as published by the Free Software
 * Foundation and appearing in the file LICENSE.GPL included in the
 * packaging of this file.
 *
 * Licensees holding valid libFirm Professional Edition licenses may use
 * this file in accordance with the libFirm Commercial License.
 * Agreement provided with the Software.
 *
 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE.
 */

/**
 * @file
 * @brief    The main sparc backend driver file.
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 * @version  $Id$
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 */
#include "config.h"

#include "lc_opts.h"
#include "lc_opts_enum.h"

#include "irgwalk.h"
#include "irprog.h"
#include "irprintf.h"
#include "ircons.h"
#include "irgmod.h"
#include "irgopt.h"
#include "iroptimize.h"
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#include "irtools.h"
#include "irdump.h"
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#include "lowering.h"

#include "bitset.h"
#include "debug.h"
#include "array_t.h"
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#include "error.h"
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#include "../bearch.h"
#include "../benode.h"
#include "../belower.h"
#include "../besched.h"
#include "be.h"
#include "../bemachine.h"
#include "../beilpsched.h"
#include "../bemodule.h"
#include "../beirg.h"
#include "../bespillslots.h"
#include "../begnuas.h"
#include "../belistsched.h"
#include "../beflags.h"

#include "bearch_sparc_t.h"

#include "sparc_new_nodes.h"
#include "gen_sparc_regalloc_if.h"
#include "sparc_transform.h"
#include "sparc_emitter.h"
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DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)

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static arch_irn_class_t sparc_classify(const ir_node *node)
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{
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	(void) node;
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	return 0;
}

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static ir_entity *sparc_get_frame_entity(const ir_node *node)
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{
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	if (is_sparc_FrameAddr(node)) {
		const sparc_attr_t *attr = get_sparc_attr_const(node);
		return attr->immediate_value_entity;
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	}

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	if (sparc_has_load_store_attr(node)) {
		const sparc_load_store_attr_t *load_store_attr
			= get_sparc_load_store_attr_const(node);
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		if (load_store_attr->is_frame_entity) {
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			return load_store_attr->base.immediate_value_entity;
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		}
	}

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	return NULL;
}

/**
 * This function is called by the generic backend to correct offsets for
 * nodes accessing the stack.
 */
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static void sparc_set_frame_offset(ir_node *node, int offset)
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{
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	sparc_attr_t *attr = get_sparc_attr(node);
	attr->immediate_value += offset;

	/* must be a FrameAddr or a load/store node with frame_entity */
	assert(is_sparc_FrameAddr(node) ||
			get_sparc_load_store_attr_const(node)->is_frame_entity);
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}

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static int sparc_get_sp_bias(const ir_node *node)
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{
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	if (is_sparc_Save(node)) {
		const sparc_save_attr_t *attr = get_sparc_save_attr_const(node);
		/* Note we do not retport the change of the SPARC_MIN_STACKSIZE
		 * size, since we have additional magic in the emitter which
		 * calculates that! */
		assert(attr->initial_stacksize >= SPARC_MIN_STACKSIZE);
		return attr->initial_stacksize - SPARC_MIN_STACKSIZE;
	}
	return 0;
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}

/* fill register allocator interface */

static const arch_irn_ops_t sparc_irn_ops = {
	get_sparc_in_req,
	sparc_classify,
	sparc_get_frame_entity,
	sparc_set_frame_offset,
	sparc_get_sp_bias,
	NULL,    /* get_inverse             */
	NULL,    /* get_op_estimated_cost   */
	NULL,    /* possible_memory_operand */
	NULL,    /* perform_memory_operand  */
};



/**
 * Transforms the standard firm graph into
 * a SPARC firm graph
 */
static void sparc_prepare_graph(void *self)
{
	sparc_code_gen_t *cg = self;

	/* transform FIRM into SPARC asm nodes */
	sparc_transform_graph(cg);

	if (cg->dump)
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		dump_ir_graph(cg->irg, "transformed");
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}

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static bool sparc_modifies_flags(const ir_node *node)
{
	return arch_irn_get_flags(node) & sparc_arch_irn_flag_modifies_flags;
}

static bool sparc_modifies_fp_flags(const ir_node *node)
{
	return arch_irn_get_flags(node) & sparc_arch_irn_flag_modifies_fp_flags;
}

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static void sparc_before_ra(void *self)
{
	sparc_code_gen_t *cg = self;
	/* fixup flags register */
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	be_sched_fix_flags(cg->irg, &sparc_reg_classes[CLASS_sparc_flags_class],
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	                   NULL, sparc_modifies_flags);
	be_sched_fix_flags(cg->irg, &sparc_reg_classes[CLASS_sparc_fpflags_class],
	                   NULL, sparc_modifies_fp_flags);
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}

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/**
 * transform reload node => load
 */
static void transform_Reload(ir_node *node)
{
	ir_node   *block  = get_nodes_block(node);
	dbg_info  *dbgi   = get_irn_dbg_info(node);
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	ir_node   *ptr    = get_irn_n(node, be_pos_Spill_frame);
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	ir_node   *mem    = get_irn_n(node, be_pos_Reload_mem);
	ir_mode   *mode   = get_irn_mode(node);
	ir_entity *entity = be_get_frame_entity(node);
	const arch_register_t *reg;
	ir_node   *proj;
	ir_node   *load;

	ir_node  *sched_point = sched_prev(node);

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	load = new_bd_sparc_Ld_imm(dbgi, block, ptr, mem, mode, entity, 0, true);
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	sched_add_after(sched_point, load);
	sched_remove(node);

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	proj = new_rd_Proj(dbgi, load, mode, pn_sparc_Ld_res);
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	reg = arch_get_irn_register(node);
	arch_set_irn_register(proj, reg);

	exchange(node, proj);
}

/**
 * transform spill node => store
 */
static void transform_Spill(ir_node *node)
{
	ir_node   *block  = get_nodes_block(node);
	dbg_info  *dbgi   = get_irn_dbg_info(node);
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	ir_node   *ptr    = get_irn_n(node, be_pos_Spill_frame);
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	ir_node   *mem    = new_NoMem();
	ir_node   *val    = get_irn_n(node, be_pos_Spill_val);
	ir_mode   *mode   = get_irn_mode(val);
	ir_entity *entity = be_get_frame_entity(node);
	ir_node   *sched_point;
	ir_node   *store;

	sched_point = sched_prev(node);
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	store = new_bd_sparc_St_imm(dbgi, block, val, ptr, mem, mode, entity, 0, true);
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	sched_remove(node);
	sched_add_after(sched_point, store);

	exchange(node, store);
}

/**
 * walker to transform be_Spill and be_Reload nodes
 */
static void sparc_after_ra_walker(ir_node *block, void *data)
{
	ir_node *node, *prev;
	(void) data;

	for (node = sched_last(block); !sched_is_begin(node); node = prev) {
		prev = sched_prev(node);

		if (be_is_Reload(node)) {
			transform_Reload(node);
		} else if (be_is_Spill(node)) {
			transform_Spill(node);
		}
	}
}

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static void sparc_collect_frame_entity_nodes(ir_node *node, void *data)
{
	be_fec_env_t  *env = data;
	const ir_mode *mode;
	int            align;
	ir_entity     *entity;
	const sparc_load_store_attr_t *attr;

	if (be_is_Reload(node) && be_get_frame_entity(node) == NULL) {
		mode  = get_irn_mode(node);
		align = get_mode_size_bytes(mode);
		be_node_needs_frame_entity(env, node, mode, align);
		return;
	}

	if (!is_sparc_Ld(node) && !is_sparc_Ldf(node))
		return;

	attr   = get_sparc_load_store_attr_const(node);
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	entity = attr->base.immediate_value_entity;
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	mode   = attr->load_store_mode;
	if (entity != NULL)
		return;
	if (!attr->is_frame_entity)
		return;
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	if (arch_irn_get_flags(node) & sparc_arch_irn_flag_needs_64bit_spillslot)
		mode = mode_Lu;
	align  = get_mode_size_bytes(mode);
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	be_node_needs_frame_entity(env, node, mode, align);
}

static void sparc_set_frame_entity(ir_node *node, ir_entity *entity)
{
	if (is_be_node(node)) {
		be_node_set_frame_entity(node, entity);
	} else {
		/* we only say be_node_needs_frame_entity on nodes with load_store
		 * attributes, so this should be fine */
		sparc_load_store_attr_t *attr = get_sparc_load_store_attr(node);
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		assert(attr->is_frame_entity);
		assert(attr->base.immediate_value_entity == NULL);
		attr->base.immediate_value_entity = entity;
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	}
}

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static void sparc_after_ra(void *self)
{
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	sparc_code_gen_t *cg      = self;
	ir_graph         *irg     = cg->irg;
	be_fec_env_t     *fec_env = be_new_frame_entity_coalescer(irg);

	irg_walk_graph(irg, NULL, sparc_collect_frame_entity_nodes, fec_env);
	be_assign_entities(fec_env, sparc_set_frame_entity);
	be_free_frame_entity_coalescer(fec_env);
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	irg_block_walk_graph(cg->irg, NULL, sparc_after_ra_walker, NULL);
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}



/**
 * Emits the code, closes the output file and frees
 * the code generator interface.
 */
static void sparc_emit_and_done(void *self)
{
	sparc_code_gen_t *cg = self;
	ir_graph           *irg = cg->irg;

	sparc_gen_routine(cg, irg);

	/* de-allocate code generator */
	free(cg);
}

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static void *sparc_cg_init(ir_graph *irg);
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static const arch_code_generator_if_t sparc_code_gen_if = {
	sparc_cg_init,
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	NULL,                 /* get_pic_base hook */
	NULL,                 /* before abi introduce hook */
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	sparc_prepare_graph,
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	NULL,                 /* spill hook */
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	sparc_before_ra,      /* before register allocation hook */
	sparc_after_ra,       /* after register allocation hook */
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	NULL,
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	sparc_emit_and_done
};

/**
 * Initializes the code generator.
 */
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static void *sparc_cg_init(ir_graph *irg)
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{
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	sparc_isa_t      *isa = (sparc_isa_t *) be_get_irg_arch_env(irg);
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	sparc_code_gen_t *cg  = XMALLOCZ(sparc_code_gen_t);
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	cg->impl      = &sparc_code_gen_if;
	cg->irg       = irg;
	cg->isa       = isa;
	cg->dump      = (be_get_irg_options(irg)->dump_flags & DUMP_BE) != 0;
	cg->constants = pmap_create();
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	/* enter the current code generator */
	isa->cg = cg;

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	return (arch_code_generator_t*) cg;
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}

const arch_isa_if_t sparc_isa_if;
static sparc_isa_t sparc_isa_template = {
	{
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		&sparc_isa_if,                      /* isa interface implementation */
		&sparc_gp_regs[REG_SP],             /* stack pointer register */
		&sparc_gp_regs[REG_FRAME_POINTER],  /* base pointer register */
		&sparc_reg_classes[CLASS_sparc_gp], /* link pointer register class */
		-1,                                 /* stack direction */
		3,                                  /* power of two stack alignment
		                                       for calls */
		NULL,                               /* main environment */
		7,                                  /* costs for a spill instruction */
		5,                                  /* costs for a reload instruction */
		true,                               /* custom abi handling */
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	},
	NULL						/* current code generator */
};

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static void sparc_handle_intrinsics(void)
{
	ir_type *tp, *int_tp, *uint_tp;
	i_record records[8];
	int n_records = 0;

	runtime_rt rt_iMod, rt_uMod;

#define ID(x) new_id_from_chars(x, sizeof(x)-1)

	int_tp  = new_type_primitive(mode_Is);
	uint_tp = new_type_primitive(mode_Iu);


	/* SPARC has no signed mod instruction ... */
	{
		i_instr_record *map_Mod = &records[n_records++].i_instr;

		tp = new_type_method(2, 1);
		set_method_param_type(tp, 0, int_tp);
		set_method_param_type(tp, 1, int_tp);
		set_method_res_type(tp, 0, int_tp);

		rt_iMod.ent             = new_entity(get_glob_type(), ID(".rem"), tp);
		set_entity_ld_ident(rt_iMod.ent, ID(".rem"));
		rt_iMod.mode            = mode_T;
		rt_iMod.res_mode        = mode_Is;
		rt_iMod.mem_proj_nr     = pn_Mod_M;
		rt_iMod.regular_proj_nr = pn_Mod_X_regular;
		rt_iMod.exc_proj_nr     = pn_Mod_X_except;
		rt_iMod.exc_mem_proj_nr = pn_Mod_M;
		rt_iMod.res_proj_nr     = pn_Mod_res;

		set_entity_visibility(rt_iMod.ent, ir_visibility_external);

		map_Mod->kind     = INTRINSIC_INSTR;
		map_Mod->op       = op_Mod;
		map_Mod->i_mapper = (i_mapper_func)i_mapper_RuntimeCall;
		map_Mod->ctx      = &rt_iMod;
	}
	/* ... nor an unsigned mod. */
	{
		i_instr_record *map_Mod = &records[n_records++].i_instr;

		tp = new_type_method(2, 1);
		set_method_param_type(tp, 0, uint_tp);
		set_method_param_type(tp, 1, uint_tp);
		set_method_res_type(tp, 0, uint_tp);

		rt_uMod.ent             = new_entity(get_glob_type(), ID(".urem"), tp);
		set_entity_ld_ident(rt_uMod.ent, ID(".urem"));
		rt_uMod.mode            = mode_T;
		rt_uMod.res_mode        = mode_Iu;
		rt_uMod.mem_proj_nr     = pn_Mod_M;
		rt_uMod.regular_proj_nr = pn_Mod_X_regular;
		rt_uMod.exc_proj_nr     = pn_Mod_X_except;
		rt_uMod.exc_mem_proj_nr = pn_Mod_M;
		rt_uMod.res_proj_nr     = pn_Mod_res;

		set_entity_visibility(rt_uMod.ent, ir_visibility_external);

		map_Mod->kind     = INTRINSIC_INSTR;
		map_Mod->op       = op_Mod;
		map_Mod->i_mapper = (i_mapper_func)i_mapper_RuntimeCall;
		map_Mod->ctx      = &rt_uMod;
	}

	if (n_records > 0)
		lower_intrinsics(records, n_records, /*part_block_used=*/0);
}


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/**
 * Initializes the backend ISA
 */
static arch_env_t *sparc_init(FILE *outfile)
{
	static int run_once = 0;
	sparc_isa_t *isa;

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	if (run_once)
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		return NULL;
	run_once = 1;

	isa = XMALLOC(sparc_isa_t);
	memcpy(isa, &sparc_isa_template, sizeof(*isa));

	be_emit_init(outfile);

	sparc_register_init();
	sparc_create_opcodes(&sparc_irn_ops);
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	sparc_handle_intrinsics();
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	return &isa->base;
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}



/**
 * Closes the output file and frees the ISA structure.
 */
static void sparc_done(void *self)
{
	sparc_isa_t *isa = self;

	/* emit now all global declarations */
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	be_gas_emit_decls(isa->base.main_env);
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	be_emit_exit();
	free(self);
}


static unsigned sparc_get_n_reg_class(void)
{
	return N_CLASSES;
}

static const arch_register_class_t *sparc_get_reg_class(unsigned i)
{
	assert(i < N_CLASSES);
	return &sparc_reg_classes[i];
}



/**
 * Get the register class which shall be used to store a value of a given mode.
 * @param self The this pointer.
 * @param mode The mode in question.
 * @return A register class which can hold values of the given mode.
 */
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static const arch_register_class_t *sparc_get_reg_class_for_mode(const ir_mode *mode)
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{
	if (mode_is_float(mode))
		return &sparc_reg_classes[CLASS_sparc_fp];
	else
		return &sparc_reg_classes[CLASS_sparc_gp];
}

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static int sparc_to_appear_in_schedule(void *block_env, const ir_node *irn)
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{
	(void) block_env;

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	if (!is_sparc_irn(irn))
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		return -1;

	return 1;
}

/**
 * Initializes the code generator interface.
 */
static const arch_code_generator_if_t *sparc_get_code_generator_if(
		void *self)
{
	(void) self;
	return &sparc_code_gen_if;
}

list_sched_selector_t sparc_sched_selector;

/**
 * Returns the reg_pressure scheduler with to_appear_in_schedule() overloaded
 */
static const list_sched_selector_t *sparc_get_list_sched_selector(
		const void *self, list_sched_selector_t *selector)
{
	(void) self;
	(void) selector;

	sparc_sched_selector = trivial_selector;
	sparc_sched_selector.to_appear_in_schedule = sparc_to_appear_in_schedule;
	return &sparc_sched_selector;
}

static const ilp_sched_selector_t *sparc_get_ilp_sched_selector(
		const void *self)
{
	(void) self;
	return NULL;
}

/**
 * Returns the necessary byte alignment for storing a register of given class.
 */
static int sparc_get_reg_class_alignment(const arch_register_class_t *cls)
{
	ir_mode *mode = arch_register_class_mode(cls);
	return get_mode_size_bytes(mode);
}

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static void sparc_lower_for_target(void)
{
	/* TODO, doubleword lowering and others */
}

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/**
 * Returns the libFirm configuration parameter for this backend.
 */
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static const backend_params *sparc_get_backend_params(void)
{
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	static backend_params p = {
		0,     /* no inline assembly */
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		0,     /* no support for RotL nodes */
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		sparc_lower_for_target, /* lowering callback */
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		NULL,  /* will be set later */
		NULL,  /* parameter for if conversion */
		NULL,  /* float arithmetic mode */
		0,     /* no trampoline support: size 0 */
		0,     /* no trampoline support: align 0 */
		NULL,  /* no trampoline support: no trampoline builder */
		4      /* alignment of stack parameter: typically 4 (32bit) or 8 (64bit) */
	};
	return &p;
}

static const be_execution_unit_t ***sparc_get_allowed_execution_units(
		const ir_node *irn)
{
	(void) irn;
	/* TODO */
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	panic("sparc_get_allowed_execution_units not implemented yet");
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}

static const be_machine_t *sparc_get_machine(const void *self)
{
	(void) self;
	/* TODO */
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	panic("sparc_get_machine not implemented yet");
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}

static ir_graph **sparc_get_backend_irg_list(const void *self,
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                                             ir_graph ***irgs)
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{
	(void) self;
	(void) irgs;
	return NULL;
}

static asm_constraint_flags_t sparc_parse_asm_constraint(const char **c)
{
	(void) c;
	return ASM_CONSTRAINT_FLAG_INVALID;
}

static int sparc_is_valid_clobber(const char *clobber)
{
	(void) clobber;
	return 0;
}

const arch_isa_if_t sparc_isa_if = {
	sparc_init,
	sparc_done,
	NULL,                /* handle intrinsics */
	sparc_get_n_reg_class,
	sparc_get_reg_class,
	sparc_get_reg_class_for_mode,
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	NULL,
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	sparc_get_code_generator_if,
	sparc_get_list_sched_selector,
	sparc_get_ilp_sched_selector,
	sparc_get_reg_class_alignment,
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	sparc_get_backend_params,
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	sparc_get_allowed_execution_units,
	sparc_get_machine,
	sparc_get_backend_irg_list,
	NULL,                    /* mark remat */
	sparc_parse_asm_constraint,
	sparc_is_valid_clobber
};

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BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_sparc);
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void be_init_arch_sparc(void)
{
	be_register_isa_if("sparc", &sparc_isa_if);
	FIRM_DBG_REGISTER(dbg, "firm.be.sparc.cg");
	sparc_init_transform();
	sparc_init_emitter();
}