Commit 00239708 authored by Matthias Braun's avatar Matthias Braun
Browse files

ia32/amd64: slightly cleanup reg emitting

parent dfba4a36
......@@ -82,71 +82,71 @@ static void amd64_emit_xmm_mode_suffix(const amd64_insn_mode_t mode)
be_emit_char(get_xmm_mode_suffix(mode));
}
static const char *get_8bit_name(const arch_register_t *reg)
{
switch (reg->index) {
case REG_GP_RAX: return "al";
case REG_GP_RBX: return "bl";
case REG_GP_RCX: return "cl";
case REG_GP_RDX: return "dl";
case REG_GP_RSP: return "spl";
case REG_GP_RBP: return "bpl";
case REG_GP_RSI: return "sil";
case REG_GP_RDI: return "dil";
case REG_GP_R8: return "r8b";
case REG_GP_R9: return "r9b";
case REG_GP_R10: return "r10b";
case REG_GP_R11: return "r11b";
case REG_GP_R12: return "r12b";
case REG_GP_R13: return "r13b";
case REG_GP_R14: return "r14b";
case REG_GP_R15: return "r15b";
static const char *get_register_name_8bit(const arch_register_t *reg)
{
switch (reg->global_index) {
case REG_RAX: return "al";
case REG_RBX: return "bl";
case REG_RCX: return "cl";
case REG_RDX: return "dl";
case REG_RSP: return "spl";
case REG_RBP: return "bpl";
case REG_RSI: return "sil";
case REG_RDI: return "dil";
case REG_R8: return "r8b";
case REG_R9: return "r9b";
case REG_R10: return "r10b";
case REG_R11: return "r11b";
case REG_R12: return "r12b";
case REG_R13: return "r13b";
case REG_R14: return "r14b";
case REG_R15: return "r15b";
}
panic("unexpected register number");
}
static const char *get_16bit_name(const arch_register_t *reg)
{
switch (reg->index) {
case REG_GP_RAX: return "ax";
case REG_GP_RBX: return "bx";
case REG_GP_RCX: return "cx";
case REG_GP_RDX: return "dx";
case REG_GP_RSP: return "sp";
case REG_GP_RBP: return "bp";
case REG_GP_RSI: return "si";
case REG_GP_RDI: return "di";
case REG_GP_R8: return "r8w";
case REG_GP_R9: return "r9w";
case REG_GP_R10: return "r10w";
case REG_GP_R11: return "r11w";
case REG_GP_R12: return "r12w";
case REG_GP_R13: return "r13w";
case REG_GP_R14: return "r14w";
case REG_GP_R15: return "r15w";
static const char *get_register_name_16bit(const arch_register_t *reg)
{
switch (reg->global_index) {
case REG_RAX: return "ax";
case REG_RBX: return "bx";
case REG_RCX: return "cx";
case REG_RDX: return "dx";
case REG_RSP: return "sp";
case REG_RBP: return "bp";
case REG_RSI: return "si";
case REG_RDI: return "di";
case REG_R8: return "r8w";
case REG_R9: return "r9w";
case REG_R10: return "r10w";
case REG_R11: return "r11w";
case REG_R12: return "r12w";
case REG_R13: return "r13w";
case REG_R14: return "r14w";
case REG_R15: return "r15w";
}
panic("unexpected register number");
}
static const char *get_32bit_name(const arch_register_t *reg)
{
switch (reg->index) {
case REG_GP_RAX: return "eax";
case REG_GP_RBX: return "ebx";
case REG_GP_RCX: return "ecx";
case REG_GP_RDX: return "edx";
case REG_GP_RSP: return "esp";
case REG_GP_RBP: return "ebp";
case REG_GP_RSI: return "esi";
case REG_GP_RDI: return "edi";
case REG_GP_R8: return "r8d";
case REG_GP_R9: return "r9d";
case REG_GP_R10: return "r10d";
case REG_GP_R11: return "r11d";
case REG_GP_R12: return "r12d";
case REG_GP_R13: return "r13d";
case REG_GP_R14: return "r14d";
case REG_GP_R15: return "r15d";
static const char *get_register_name_32bit(const arch_register_t *reg)
{
switch (reg->global_index) {
case REG_RAX: return "eax";
case REG_RBX: return "ebx";
case REG_RCX: return "ecx";
case REG_RDX: return "edx";
case REG_RSP: return "esp";
case REG_RBP: return "ebp";
case REG_RSI: return "esi";
case REG_RDI: return "edi";
case REG_R8: return "r8d";
case REG_R9: return "r9d";
case REG_R10: return "r10d";
case REG_R11: return "r11d";
case REG_R12: return "r12d";
case REG_R13: return "r13d";
case REG_R14: return "r14d";
case REG_R15: return "r15d";
}
panic("unexpected register number");
}
......@@ -161,9 +161,9 @@ static const char *get_register_name_mode(const arch_register_t *reg,
const amd64_insn_mode_t mode)
{
switch (mode) {
case INSN_MODE_8: return get_8bit_name(reg);
case INSN_MODE_16: return get_16bit_name(reg);
case INSN_MODE_32: return get_32bit_name(reg);
case INSN_MODE_8: return get_register_name_8bit(reg);
case INSN_MODE_16: return get_register_name_16bit(reg);
case INSN_MODE_32: return get_register_name_32bit(reg);
case INSN_MODE_64:
case INSN_MODE_128: return reg->name;
case INSN_MODE_INVALID:
......
......@@ -128,57 +128,67 @@ static char *get_unique_label(char *buf, size_t buflen, const char *prefix)
return buf;
}
/**
* Emit the name of the 8bit low register
*/
static void emit_8bit_register(const arch_register_t *reg)
static const char *get_register_name_8bit_low(const arch_register_t *reg)
{
assert(reg->index == REG_GP_EAX || reg->index == REG_GP_EBX
|| reg->index == REG_GP_ECX || reg->index == REG_GP_EDX);
be_emit_char('%');
be_emit_char(reg->name[1]); /* get the basic name of the register */
be_emit_char('l');
switch (reg->global_index) {
case REG_EAX: return "al";
case REG_EBX: return "bl";
case REG_ECX: return "cl";
case REG_EDX: return "dl";
}
panic("unexpected register");
}
/**
* Emit the name of the 8bit high register
*/
static void emit_8bit_register_high(const arch_register_t *reg)
static const char *get_register_name_8bit_high(const arch_register_t *reg)
{
assert(reg->index == REG_GP_EAX || reg->index == REG_GP_EBX
|| reg->index == REG_GP_ECX || reg->index == REG_GP_EDX);
switch (reg->global_index) {
case REG_EAX: return "ah";
case REG_EBX: return "bh";
case REG_ECX: return "ch";
case REG_EDX: return "dh";
}
panic("unexpected register");
}
be_emit_char('%');
be_emit_char(reg->name[1]); /* get the basic name of the register */
be_emit_char('h');
static const char *get_register_name_16bit(const arch_register_t *reg)
{
switch (reg->global_index) {
case REG_EAX: return "ax";
case REG_EBX: return "bx";
case REG_ECX: return "cx";
case REG_EDX: return "dx";
case REG_ESI: return "si";
case REG_EDI: return "di";
case REG_ESP: return "sp";
case REG_EBP: return "bp";
}
panic("unexpected register");
}
static void emit_16bit_register(const arch_register_t *reg)
static const char *get_register_name_mode(const arch_register_t *reg,
ir_mode *mode)
{
be_emit_char('%');
be_emit_string(reg->name + 1); /* skip the 'e' prefix of the 32bit names */
if (mode == NULL)
return reg->name;
unsigned size = get_mode_size_bits(mode);
if (size == 8)
return get_register_name_8bit_low(reg);
else if (size == 16)
return get_register_name_16bit(reg);
else
return reg->name;
}
/**
* emit a register, possible shortened by a mode
*
* @param reg the register
* @param mode the mode of the register or NULL for full register
*/
static void emit_register(const arch_register_t *reg, const ir_mode *mode)
static void emit_register(const arch_register_t *reg, ir_mode *mode)
{
if (mode != NULL) {
unsigned size = get_mode_size_bits(mode);
switch (size) {
case 8: emit_8bit_register(reg); return;
case 16: emit_16bit_register(reg); return;
}
assert(mode_is_float(mode) || size == 32);
}
const char *name = get_register_name_mode(reg, mode);
be_emit_char('%');
be_emit_string(reg->name);
be_emit_string(name);
}
static void ia32_emit_entity(ir_entity *entity, int no_pic_adjust)
......@@ -621,15 +631,20 @@ emit_I:
emit_R:
if (mod & EMIT_ALTERNATE_AM)
be_emit_char('*');
const char *name;
if (mod & EMIT_HIGH_REG) {
emit_8bit_register_high(reg);
name = get_register_name_8bit_high(reg);
} else if (mod & EMIT_LOW_REG) {
emit_8bit_register(reg);
name = get_register_name_8bit_low(reg);
} else if (mod & EMIT_16BIT_REG) {
emit_16bit_register(reg);
name = get_register_name_16bit(reg);
} else {
emit_register(reg, mod & EMIT_RESPECT_LS ? get_ia32_ls_mode(node) : NULL);
name = mod & EMIT_RESPECT_LS
? get_register_name_mode(reg, get_ia32_ls_mode(node))
: reg->name;
}
be_emit_char('%');
be_emit_string(name);
if (mod & EMIT_SHIFT_COMMA) {
be_emit_char(',');
}
......@@ -988,13 +1003,16 @@ static const char* emit_asm_operand(const ir_node *node, const char *s)
emit_register(reg, NULL);
be_emit_char(')');
} else {
const char *name;
switch (modifier) {
case '\0': emit_register(reg, asm_reg->mode); break;
case 'b': emit_8bit_register(reg); break;
case 'h': emit_8bit_register_high(reg); break;
case 'w': emit_16bit_register(reg); break;
case '\0': name = get_register_name_mode(reg, asm_reg->mode); break;
case 'b': name = get_register_name_8bit_low(reg); break;
case 'h': name = get_register_name_8bit_high(reg); break;
case 'w': name = get_register_name_16bit(reg); break;
default: panic("invalid asm op modifier");
}
be_emit_char('%');
be_emit_string(name);
}
return s;
......
......@@ -192,7 +192,7 @@ struct ia32_asm_reg_t {
unsigned dummy_fill : 13;
unsigned inout_pos : 16; /* in/out pos where the
register is assigned */
const ir_mode *mode;
ir_mode *mode;
};
/**
......
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment