Commit 026ec52a authored by Christoph Mallon's avatar Christoph Mallon
Browse files

Remove arch_get_allocatable_regs().

[r22928]
parent a1c500a0
......@@ -156,24 +156,6 @@ int arch_get_op_estimated_cost(const ir_node *irn)
}
}
int arch_get_allocatable_regs(const ir_node *irn, int pos, bitset_t *bs)
{
const arch_register_req_t *req = arch_get_register_req(irn, pos);
if(req->type == arch_register_req_type_none) {
bitset_clear_all(bs);
return 0;
}
if(arch_register_req_is(req, limited)) {
rbitset_copy_to_bitset(req->limited, bs);
return bitset_popcnt(bs);
}
arch_register_class_put(req->cls, bs);
return req->cls->n_regs;
}
void arch_put_non_ignore_regs(const arch_register_class_t *cls, bitset_t *bs)
{
unsigned i;
......
......@@ -132,16 +132,6 @@ const arch_register_req_t *arch_get_register_req(const ir_node *irn, int pos);
#define arch_get_register_req_out(irn) arch_get_register_req(irn, -1)
/**
* Get the number of allocatable registers concerning
* a register class for an operand of a node.
* @param irn The node.
* @param pos The position of the node's operand.
* @param bs The bitset all allocatable registers shall be put into.
* @return The amount of registers allocatable for that operand.
*/
int arch_get_allocatable_regs(const ir_node *irn, int pos, bitset_t *bs);
/**
* Put all registers which shall not be ignored by the register
* allocator in a bit set.
......
......@@ -530,11 +530,13 @@ static inline void ou_insert_qnode(unit_t *ou, qnode_t *qn) {
* nodes. (All other phi classes are reduced to this case.)
*/
static void ou_optimize(unit_t *ou) {
int i;
qnode_t *curr = NULL, *tmp;
const arch_register_class_t *cls = ou->co->cls;
bitset_pos_t idx;
bitset_t *pos_regs = bitset_alloca(cls->n_regs);
qnode_t *curr = NULL;
qnode_t *tmp;
const arch_register_req_t *req;
bitset_t const* ignore;
bitset_pos_t n_regs;
bitset_pos_t idx;
int i;
DBG((dbg, LEVEL_1, "\tOptimizing unit:\n"));
for (i=0; i<ou->node_count; ++i)
......@@ -543,16 +545,28 @@ static void ou_optimize(unit_t *ou) {
/* init queue */
INIT_LIST_HEAD(&ou->queue);
arch_get_allocatable_regs(ou->nodes[0], -1, pos_regs);
req = arch_get_register_req_out(ou->nodes[0]);
ignore = ou->co->cenv->ignore_colors;
n_regs = req->cls->n_regs;
if (arch_register_req_is(req, limited)) {
rawbs_base_t const* limited = req->limited;
/* exclude ignore colors */
bitset_andnot(pos_regs, ou->co->cenv->ignore_colors);
for (idx = 0; idx != n_regs; ++idx) {
if (bitset_is_set(ignore, idx))
continue;
if (!rbitset_is_set(limited, idx))
continue;
assert(bitset_popcnt(pos_regs) != 0 && "No register is allowed for this node !!?");
ou_insert_qnode(ou, new_qnode(ou, idx));
}
} else {
for (idx = 0; idx != n_regs; ++idx) {
if (bitset_is_set(ignore, idx))
continue;
/* create new qnode */
bitset_foreach(pos_regs, idx)
ou_insert_qnode(ou, new_qnode(ou, idx));
ou_insert_qnode(ou, new_qnode(ou, idx));
}
}
/* search best */
for (;;) {
......
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