Commit 05364e0b authored by Matthias Braun's avatar Matthias Braun
Browse files

remove some unused l_ nodes

[r15745]
parent 117f6947
......@@ -522,9 +522,10 @@ static int map_Abs(ir_node *call, void *ctx) {
*/
sign = new_rd_ia32_l_Sar(dbg, irg, block, a_h, new_Const_long(l_mode, 31), l_mode);
sub_l = new_rd_ia32_l_Xor(dbg, irg, block, a_l, sign, l_mode);
sub_h = new_rd_ia32_l_Xor(dbg, irg, block, a_h, sign, l_mode);
/* TODO: give a hint to the backend somehow to not create a cltd here... */
sign = new_rd_Shrs(dbg, irg, block, a_h, new_Const_long(l_mode, 31), l_mode);
sub_l = new_rd_Eor(dbg, irg, block, a_l, sign, l_mode);
sub_h = new_rd_Eor(dbg, irg, block, a_h, sign, l_mode);
res = new_rd_ia32_Sub64Bit(dbg, irg, block, sub_l, sub_h, sign, sign);
l_res = new_r_Proj(irg, block, res, l_mode, pn_ia32_Sub64Bit_low_res);
h_res = new_r_Proj(irg, block, res, l_mode, pn_ia32_Sub64Bit_high_res);
......
......@@ -441,7 +441,8 @@ AddMem => {
},
Adc => {
reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] },
reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "flags" ], out => [ "in_r3" ] },
ins => [ "base", "index", "left", "right", "mem", "eflags" ],
emit => '. adc%M %binop',
am => "full,binary",
units => [ "GP" ],
......@@ -464,19 +465,6 @@ Add64Bit => {
modified_flags => $status_flags
},
l_Add => {
op_flags => "C",
irn_flags => "R",
cmp_attr => "return 1;",
arity => 2,
},
l_Adc => {
op_flags => "C",
cmp_attr => "return 1;",
arity => 2,
},
Mul => {
# we should not rematrialize this node. It produces 2 results and has
# very strict constrains
......@@ -594,13 +582,6 @@ XorMem => {
modified_flags => $status_flags
},
l_Xor => {
op_flags => "C",
cmp_attr => "return 1;",
arity => 2,
modified_flags => $status_flags
},
# not commutative operations
Sub => {
......@@ -649,17 +630,6 @@ Sub64Bit => {
modified_flags => $status_flags
},
l_Sub => {
irn_flags => "R",
cmp_attr => "return 1;",
arity => 2,
},
l_Sbb => {
cmp_attr => "return 1;",
arity => 2,
},
IDiv => {
op_flags => "F|L",
state => "exc_pinned",
......
......@@ -3581,11 +3581,6 @@ static ir_node *gen_lowered_Store(ir_node *node, construct_store_func func)
get_irn_n(node, 1), new_rd_ia32_##op); \
}
GEN_LOWERED_OP(Adc)
GEN_LOWERED_OP(Add)
GEN_LOWERED_OP(Sbb)
GEN_LOWERED_OP(Sub)
GEN_LOWERED_OP(Xor)
GEN_LOWERED_x87_OP(vfprem)
GEN_LOWERED_x87_OP(vfmul)
GEN_LOWERED_x87_OP(vfsub)
......@@ -4465,14 +4460,9 @@ static void register_transformers(void)
/* transform ops from intrinsic lowering */
GEN(ia32_Add64Bit);
GEN(ia32_Sub64Bit);
GEN(ia32_l_Add);
GEN(ia32_l_Adc);
GEN(ia32_l_Sub);
GEN(ia32_l_Sbb);
GEN(ia32_l_Neg);
GEN(ia32_l_Mul);
GEN(ia32_l_IMul);
GEN(ia32_l_Xor);
GEN(ia32_l_ShlDep);
GEN(ia32_l_ShrDep);
GEN(ia32_l_Sar);
......
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