Commit 11dd3591 authored by Christian Würdig's avatar Christian Würdig
Browse files

adapted to some new backend structures

parent abf293cb
......@@ -499,7 +499,7 @@ arm_shift_modifier get_arm_shift_modifier(ir_node *node) {
/* Set the ARM machine node attributes to default values. */
void init_arm_attributes(ir_node *node, int flags, const arm_register_req_t ** in_reqs,
const arm_register_req_t ** out_reqs, int n_res) {
const arm_register_req_t ** out_reqs, int n_res, unsigned latency) {
arm_attr_t *attr = get_arm_attr(node);
attr->in_req = in_reqs;
attr->out_req = out_reqs;
......@@ -588,7 +588,7 @@ ir_node *new_r_arm_StoreStackMInc(ir_graph *irg, ir_node *block, ir_node *mem, i
flags |= arch_irn_flags_rematerializable; /* op can be easily recalculated */
/* init node attributes */
init_arm_attributes(res, flags, _in_req_arm_StoreStackM4Inc, NULL, 0);
init_arm_attributes(res, flags, _in_req_arm_StoreStackM4Inc, NULL, 0, 1);
res = optimize_node(res);
irn_vrfy_irg(res, irg);
......
......@@ -104,7 +104,7 @@ int get_arm_n_res(const ir_node *node);
* Set the ARM machine node attributes to default values.
*/
void init_arm_attributes(ir_node *node, int flags, const arm_register_req_t ** in_reqs,
const arm_register_req_t ** out_reqs, int n_res);
const arm_register_req_t ** out_reqs, int n_res, unsigned latency);
/**
* Returns the tarval
......
......@@ -387,7 +387,7 @@ int get_mips_n_res(const ir_node *node) {
* Initializes the nodes attributes.
*/
void init_mips_attributes(ir_node *node, arch_irn_flags_t flags, const mips_register_req_t **in_reqs,
const mips_register_req_t **out_reqs, int n_res)
const mips_register_req_t **out_reqs, int n_res, unsigned latency)
{
mips_attr_t *attr = get_mips_attr(node);
......
......@@ -99,7 +99,7 @@ int get_mips_n_res(const ir_node *node);
* Initializes the nodes attributes.
*/
void init_mips_attributes(ir_node *node, arch_irn_flags_t flags, const mips_register_req_t **in_reqs,
const mips_register_req_t **out_reqs, int n_res);
const mips_register_req_t **out_reqs, int n_res, unsigned latency);
/**
* Initialize transform ops for the mips opcodes
......
......@@ -513,7 +513,7 @@ ppc32_attr_offset_mode get_ppc32_offset_mode(const ir_node *node) {
* Initializes ppc specific node attributes
*/
void init_ppc32_attributes(ir_node *node, int flags,
const ppc32_register_req_t **in_reqs, const ppc32_register_req_t **out_reqs, int n_res) {
const ppc32_register_req_t **in_reqs, const ppc32_register_req_t **out_reqs, int n_res, unsigned latency) {
ppc32_attr_t *attr = get_ppc32_attr(node);
attr->flags = flags;
......
......@@ -118,7 +118,7 @@ void set_ppc32_offset_mode(const ir_node *node, ppc32_attr_offset_mode mode);
ppc32_attr_offset_mode get_ppc32_offset_mode(const ir_node *node);
void init_ppc32_attributes(ir_node *node, int flags,
const ppc32_register_req_t **in_reqs, const ppc32_register_req_t **out_reqs, int n_res);
const ppc32_register_req_t **in_reqs, const ppc32_register_req_t **out_reqs, int n_res, unsigned latency);
void ppc32_register_additional_opcodes(int opcode_num);
......
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