added new nodes for intrinsic lowering

added transformation of those nodes into "real" ia32 nodes

ir/be/ia32/ia32_spec.pl

@@ -213,10 +213,31 @@ $comment_string = "/*";
   "comment"   => "construct Add: Add(a, b) = Add(b, a) = a + b",
   "cmp_attr"  => "  return ia32_compare_immop_attr(attr_a, attr_b);\n",
   "reg_req"   => { "in" => [ "gp", "gp", "gp", "gp", "none" ], "out" => [ "in_r3" ] },
-  "emit"      => '. add %ia32_emit_binop /* Add(%A1, %A2) -> %D1 */',
+  "emit"      => '. add %ia32_emit_binop /* Add(%A3, %A4) -> %D1 */',
   "outs"      => [ "res", "M" ],
 },
 
+"AddC" => {
+  "comment"   => "construct Add with Carry: AddC(a, b) = Add(b, a) = a + b + carry",
+  "cmp_attr"  => "  return ia32_compare_immop_attr(attr_a, attr_b);\n",
+  "reg_req"   => { "in" => [ "gp", "gp", "gp", "gp", "none" ], "out" => [ "in_r3" ] },
+  "emit"      => '. adc %ia32_emit_binop /* AddC(%A3, %A4) -> %D1 */',
+  "outs"      => [ "res", "M" ],
+},
+
+"l_Add" => {
+  "op_flags"  => "C",
+  "irn_flags" => "R",
+  "comment"   => "construct lowered Add: Add(a, b) = Add(b, a) = a + b",
+  "arity"     => 2,
+},
+
+"l_AddC" => {
+  "op_flags"  => "C",
+  "comment"   => "construct lowered Add with Carry: AddC(a, b) = Add(b, a) = a + b + carry",
+  "arity"     => 2,
+},
+
 "Mul" => {
   "irn_flags" => "R",
   "comment"   => "construct Mul: Mul(a, b) = Mul(b, a) = a * b",
@@ -299,10 +320,29 @@ $comment_string = "/*";
   "comment"   => "construct Sub: Sub(a, b) = a - b",
   "cmp_attr"  => "  return ia32_compare_immop_attr(attr_a, attr_b);\n",
   "reg_req"   => { "in" => [ "gp", "gp", "gp", "gp", "none" ], "out" => [ "in_r3" ] },
-  "emit"      => '. sub %ia32_emit_binop /* Sub(%A1, %A2) -> %D1 */',
+  "emit"      => '. sub %ia32_emit_binop /* Sub(%A3, %A4) -> %D1 */',
   "outs"      => [ "res", "M" ],
 },
 
+"SubC" => {
+  "comment"   => "construct Sub with Carry: SubC(a, b) = a - b - carry",
+  "cmp_attr"  => "  return ia32_compare_immop_attr(attr_a, attr_b);\n",
+  "reg_req"   => { "in" => [ "gp", "gp", "gp", "gp", "none" ], "out" => [ "in_r3" ] },
+  "emit"      => '. sbb %ia32_emit_binop /* SubC(%A3, %A4) -> %D1 */',
+  "outs"      => [ "res", "M" ],
+},
+
+"l_Sub" => {
+  "irn_flags" => "R",
+  "comment"   => "construct lowered Sub: Sub(a, b) = a - b",
+  "arity"     => 2,
+},
+
+"l_SubC" => {
+  "comment"   => "construct lowered Sub with Carry: SubC(a, b) = a - b - carry",
+  "arity"     => 2,
+},
+
 "DivMod" => {
   "op_flags"  => "F|L",
   "state"     => "exc_pinned",

ir/be/ia32/ia32_transform.c

@@ -574,6 +574,26 @@ static ir_node *gen_Add(ia32_transform_env_t *env) {
 	return new_rd_Proj(dbg, irg, block, new_op, mode, pn_ia32_Add_res);
 }
 
+/**
+ * Transforms an ia32_l_AddC (created in intrinsic lowering) into a "real" AddC
+ *
+ * @param env   The transformation environment
+ * @return the created ia32 Add node
+ */
+static ir_node *gen_ia32_l_AddC(ia32_transform_env_t *env) {
+	return gen_binop(env, get_binop_left(env->irn), get_binop_right(env->irn), new_rd_ia32_AddC);
+}
+
+/**
+ * Transforms an ia32_l_Add (created in intrinsic lowering) into a "real" Add
+ *
+ * @param env   The transformation environment
+ * @return the created ia32 Add node
+ */
+static ir_node *gen_ia32_l_Add(ia32_transform_env_t *env) {
+	return gen_binop(env, get_binop_left(env->irn), get_binop_right(env->irn), new_rd_ia32_Add);
+}
+
 
 
 /**
@@ -898,6 +918,26 @@ static ir_node *gen_Sub(ia32_transform_env_t *env) {
 	return new_rd_Proj(dbg, irg, block, new_op, mode, pn_ia32_Sub_res);
 }
 
+/**
+ * Transforms an ia32_l_SubC (created in intrinsic lowering) into a "real" SubC
+ *
+ * @param env   The transformation environment
+ * @return the created ia32 SubC node
+ */
+static ir_node *gen_ia32_l_SubC(ia32_transform_env_t *env) {
+	return gen_binop(env, get_binop_left(env->irn), get_binop_right(env->irn), new_rd_ia32_SubC);
+}
+
+/**
+ * Transforms an ia32_l_Sub (created in intrinsic lowering) into a "real" Sub
+ *
+ * @param env   The transformation environment
+ * @return the created ia32 Sub node
+ */
+static ir_node *gen_ia32_l_Sub(ia32_transform_env_t *env) {
+	return gen_binop(env, get_binop_left(env->irn), get_binop_right(env->irn), new_rd_ia32_Sub);
+}
+
 
 
 /**
@@ -2468,7 +2508,11 @@ void ia32_register_transformers(void) {
 #define IGN(a)
 
 	GEN(Add);
+	GEN(ia32_l_Add);
+	GEN(ia32_l_AddC);
 	GEN(Sub);
+	GEN(ia32_l_Sub);
+	GEN(ia32_l_SubC);
 	GEN(Mul);
 	GEN(And);
 	GEN(Or);