Commit 1289d1b6 authored by Christoph Mallon's avatar Christoph Mallon
Browse files

be: Remove the pointer to the isa interface from the arch env.

Just use the selected isa interface directly.
parent 87447272
......@@ -56,10 +56,8 @@ static void TEMPLATE_before_ra(ir_graph *irg)
}
extern const arch_isa_if_t TEMPLATE_isa_if;
static TEMPLATE_isa_t TEMPLATE_isa_template = {
.base = {
.impl = &TEMPLATE_isa_if,
.n_registers = N_TEMPLATE_REGISTERS,
.registers = TEMPLATE_registers,
.n_register_classes = N_TEMPLATE_CLASSES,
......@@ -160,7 +158,7 @@ static ir_node *TEMPLATE_new_reload(ir_node *value, ir_node *spill,
panic("reload not implemented yet");
}
const arch_isa_if_t TEMPLATE_isa_if = {
static arch_isa_if_t const TEMPLATE_isa_if = {
.init = TEMPLATE_init,
.finish = TEMPLATE_finish,
.get_params = TEMPLATE_get_backend_params,
......
......@@ -639,10 +639,8 @@ static void amd64_finish_graph(ir_graph *irg)
amd64_emit_function(irg);
}
extern const arch_isa_if_t amd64_isa_if;
static amd64_isa_t amd64_isa_template = {
.base = {
.impl = &amd64_isa_if,
.n_registers = N_AMD64_REGISTERS,
.registers = amd64_registers,
.n_register_classes = N_AMD64_CLASSES,
......@@ -794,7 +792,7 @@ static void amd64_init(void)
x86_set_be_asm_constraint_support(&amd64_asm_constraints);
}
const arch_isa_if_t amd64_isa_if = {
static arch_isa_if_t const amd64_isa_if = {
.init = amd64_init,
.finish = amd64_finish,
.get_params = amd64_get_backend_params,
......
......@@ -173,10 +173,8 @@ static void arm_handle_intrinsics(ir_graph *irg)
irg_walk_graph(irg, handle_intrinsic, NULL, NULL);
}
extern const arch_isa_if_t arm_isa_if;
static arm_isa_t arm_isa_template = {
.base = {
.impl = &arm_isa_if,
.n_registers = N_ARM_REGISTERS,
.registers = arm_registers,
.n_register_classes = N_ARM_CLASSES,
......@@ -310,7 +308,7 @@ static void arm_init(void)
arm_init_backend_params();
}
const arch_isa_if_t arm_isa_if = {
static arch_isa_if_t const arm_isa_if = {
.init = arm_init,
.finish = arm_finish,
.get_params = arm_get_libfirm_params,
......
......@@ -21,6 +21,8 @@
#include "timing.h"
#include "irdump.h"
extern arch_isa_if_t const *isa_if;
typedef enum be_dump_flags_t {
DUMP_NONE = 0,
DUMP_INITIAL = 1 << 0,
......
......@@ -390,18 +390,10 @@ struct arch_isa_if_t {
void (*emit)(ir_graph *irg);
};
#define arch_env_end_codegeneration(env) ((env)->impl->end_codegeneration(env))
#define arch_env_mark_remat(env,node) \
do { if ((env)->impl->mark_remat != NULL) (env)->impl->mark_remat((node)); } while(0)
#define arch_env_new_spill(env,value,after) ((env)->impl->new_spill(value, after))
#define arch_env_new_reload(env,value,spilled,before) ((env)->impl->new_reload(value, spilled, before))
/**
* ISA base class.
*/
struct arch_env_t {
const arch_isa_if_t *impl;
unsigned n_registers; /**< number of registers */
const arch_register_t *registers; /**< register array */
/** number of register classes*/
......
......@@ -70,7 +70,7 @@ be_options_t be_options = {
};
/* back end instruction set architecture to use */
static const arch_isa_if_t *isa_if = NULL;
arch_isa_if_t const *isa_if = NULL;
/* possible dumping options */
static const lc_opt_enum_mask_items_t dump_items[] = {
......@@ -346,6 +346,7 @@ static be_main_env_t *be_init_env(be_main_env_t *const env,
*/
static void be_done_env(be_main_env_t *env)
{
isa_if->end_codegeneration(env->arch_env);
pmap_destroy(env->ent_trampoline_map);
pmap_destroy(env->ent_pic_symbol_map);
free_type(env->pic_trampolines_type);
......@@ -471,7 +472,6 @@ static void be_main_loop(FILE *file_handle, const char *cup_name)
be_main_env_t env;
be_init_env(&env, cup_name);
be_info_init();
arch_env_t *arch_env = env.arch_env;
be_gas_begin_compilation_unit(&env);
......@@ -484,8 +484,8 @@ static void be_main_loop(FILE *file_handle, const char *cup_name)
if (get_entity_linkage(entity) & IR_LINKAGE_NO_CODEGEN)
continue;
initialize_birg(&birgs[num_birgs++], irg, &env);
if (arch_env->impl->handle_intrinsics)
arch_env->impl->handle_intrinsics(irg);
if (isa_if->handle_intrinsics)
isa_if->handle_intrinsics(irg);
be_dump(DUMP_INITIAL, irg, "prepared");
}
......@@ -552,7 +552,7 @@ static void be_main_loop(FILE *file_handle, const char *cup_name)
}
/* prepare and perform codeselection */
arch_env->impl->prepare_graph(irg);
isa_if->prepare_graph(irg);
/* schedule the irg */
be_timer_push(T_SCHED);
......@@ -572,7 +572,7 @@ static void be_main_loop(FILE *file_handle, const char *cup_name)
/* stuff needs to be done after scheduling but before register allocation */
be_timer_push(T_RA_PREPARATION);
arch_env->impl->before_ra(irg);
isa_if->before_ra(irg);
be_timer_pop(T_RA_PREPARATION);
if (stat_ev_enabled) {
......@@ -606,7 +606,7 @@ static void be_main_loop(FILE *file_handle, const char *cup_name)
/* emit assembler code */
be_timer_push(T_EMIT);
arch_env->impl->emit(irg);
isa_if->emit(irg);
be_timer_pop(T_EMIT);
if (stat_ev_enabled) {
......@@ -649,8 +649,6 @@ static void be_main_loop(FILE *file_handle, const char *cup_name)
be_gas_end_compilation_unit(&env);
be_emit_exit();
arch_env_end_codegeneration(arch_env);
be_done_env(&env);
be_info_free();
......
......@@ -76,7 +76,6 @@ struct spill_info_t {
};
struct spill_env_t {
const arch_env_t *arch_env;
ir_graph *irg;
ir_nodehashmap_t spillmap;
spill_info_t *spills;
......@@ -116,7 +115,6 @@ spill_env_t *be_new_spill_env(ir_graph *irg)
spill_env_t *env = XMALLOCZ(spill_env_t);
env->irg = irg;
env->arch_env = arch_env;
env->spill_cost = arch_env->spill_cost;
env->reload_cost = arch_env->reload_cost;
ir_nodehashmap_init(&env->spillmap);
......@@ -272,7 +270,7 @@ static void spill_irn(spill_env_t *env, spill_info_t *spillinfo)
for (spill_t *spill = spillinfo->spills; spill != NULL;
spill = spill->next) {
ir_node *const after = be_move_after_schedule_first(spill->after);
spill->spill = arch_env_new_spill(env->arch_env, to_spill, after);
spill->spill = isa_if->new_spill(to_spill, after);
DB((dbg, LEVEL_1, "\t%+F after %+F\n", spill->spill, after));
env->spill_count++;
}
......@@ -440,7 +438,8 @@ static ir_node *do_remat(spill_env_t *env, ir_node *spilled, ir_node *reloader)
/* create a copy of the node */
ir_node *const bl = get_nodes_block(reloader);
ir_node *const res = new_similar_node(spilled, bl, ins);
arch_env_mark_remat(env->arch_env, res);
if (isa_if->mark_remat)
isa_if->mark_remat(res);
DBG((dbg, LEVEL_1, "Insert remat %+F of %+F before reloader %+F\n", res,
spilled, reloader));
......@@ -671,8 +670,7 @@ void be_insert_spills_reloads(spill_env_t *env)
/* create a reload, use the first spill for now SSA
* reconstruction for memory comes below */
assert(si->spills != NULL);
copy = arch_env_new_reload(env->arch_env, si->to_spill,
si->spills->spill, rld->reloader);
copy = isa_if->new_reload(si->to_spill, si->spills->spill, rld->reloader);
env->reload_count++;
}
......
......@@ -1182,8 +1182,6 @@ static void ia32_prepare_graph(ir_graph *irg)
be_dump(DUMP_BE, irg, "place");
}
extern const arch_isa_if_t ia32_isa_if;
/**
* Check if Mux(sel, mux_true, mux_false) would represent a Max or Min operation
*/
......@@ -1448,7 +1446,6 @@ static void ia32_finish(void)
*/
static ia32_isa_t ia32_isa_template = {
.base = {
.impl = &ia32_isa_if,
.n_registers = N_IA32_REGISTERS,
.registers = ia32_registers,
.n_register_classes = N_IA32_CLASSES,
......@@ -1590,7 +1587,7 @@ static const lc_opt_table_entry_t ia32_options[] = {
LC_OPT_LAST
};
const arch_isa_if_t ia32_isa_if = {
static arch_isa_if_t const ia32_isa_if = {
.init = ia32_init,
.finish = ia32_finish,
.get_params = ia32_get_libfirm_params,
......
......@@ -38,10 +38,8 @@
DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
extern const arch_isa_if_t sparc_isa_if;
static sparc_isa_t sparc_isa_template = {
.base = {
.impl = &sparc_isa_if,
.n_registers = N_SPARC_REGISTERS,
.registers = sparc_registers,
.n_register_classes = N_SPARC_CLASSES,
......@@ -556,7 +554,7 @@ static ir_node *sparc_new_reload(ir_node *value, ir_node *spill,
return res;
}
const arch_isa_if_t sparc_isa_if = {
static arch_isa_if_t const sparc_isa_if = {
.init = sparc_init,
.finish = sparc_finish,
.get_params = sparc_get_backend_params,
......
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