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Zwinkau
libfirm
Commits
1b980518
Commit
1b980518
authored
Nov 13, 2012
by
Christoph Mallon
Browse files
Let be_foreach_definition() declare the value variable.
parent
a9132de4
Changes
6
Hide whitespace changes
Inline
Side-by-side
ir/be/bearch.h
View file @
1b980518
...
...
@@ -609,16 +609,15 @@ static inline bool arch_irn_consider_in_reg_alloc(
do { \
if (get_irn_mode(node) == mode_T) { \
foreach_out_edge(node, edge_) { \
const arch_register_req_t *req_; \
value = get_edge_src_irn(edge_); \
req_ = arch_get_irn_register_req(value); \
ir_node *const value = get_edge_src_irn(edge_); \
arch_register_req_t const *const req_ = arch_get_irn_register_req(value); \
if (req_->cls != ccls) \
continue; \
code \
} \
} else { \
const
arch_register_req_t
*
req_ = arch_get_irn_register_req(node); \
value = node;
\
arch_register_req_t
const *const
req_
= arch_get_irn_register_req(node); \
ir_node *const value = node;
\
if (req_->cls == ccls) { \
code \
} \
...
...
ir/be/belive.c
View file @
1b980518
...
...
@@ -513,7 +513,6 @@ void be_liveness_transfer(const arch_register_class_t *cls,
* function. */
assert
(
!
is_Phi
(
node
)
&&
"liveness_transfer produces invalid results for phi nodes"
);
ir_node
*
value
;
be_foreach_definition
(
node
,
cls
,
value
,
ir_nodeset_remove
(
nodeset
,
value
);
);
...
...
ir/be/beprefalloc.c
View file @
1b980518
...
...
@@ -306,7 +306,6 @@ static void analyze_block(ir_node *block, void *data)
if
(
is_Phi
(
node
))
break
;
ir_node
*
value
;
be_foreach_definition
(
node
,
cls
,
value
,
check_defs
(
&
live_nodes
,
weight
,
value
);
);
...
...
@@ -410,7 +409,6 @@ static void create_congruence_class(ir_node *block, void *data)
/* check should be same constraints */
ir_node
*
last_phi
=
NULL
;
sched_foreach_reverse
(
block
,
node
)
{
ir_node
*
value
;
if
(
is_Phi
(
node
))
{
last_phi
=
node
;
break
;
...
...
@@ -1200,9 +1198,9 @@ static void enforce_constraints(ir_nodeset_t *live_nodes, ir_node *node,
}
/* is any of the live-throughs using a constrained output register? */
ir_node
*
value
;
unsigned
*
live_through_regs
=
NULL
;
be_foreach_definition
(
node
,
cls
,
value
,
(
void
)
value
;
if
(
req_
->
width
>
1
)
double_width
=
true
;
if
(
!
(
req_
->
type
&
arch_register_req_type_limited
))
...
...
@@ -1696,7 +1694,6 @@ static void allocate_coalesce_block(ir_node *block, void *data)
free_last_uses
(
&
live_nodes
,
node
);
/* assign output registers */
ir_node
*
value
;
be_foreach_definition_
(
node
,
cls
,
value
,
assign_reg
(
block
,
value
,
forbidden_regs
);
);
...
...
ir/be/bespill.c
View file @
1b980518
...
...
@@ -63,7 +63,6 @@ static void prepare_constr_insn(be_pre_spill_env_t *env, ir_node *node)
unsigned
*
tmp
=
NULL
;
unsigned
*
def_constr
=
NULL
;
int
arity
=
get_irn_arity
(
node
);
ir_node
*
def
;
int
i
,
i2
;
...
...
@@ -153,6 +152,7 @@ static void prepare_constr_insn(be_pre_spill_env_t *env, ir_node *node)
/* collect all registers occurring in out constraints. */
be_foreach_definition
(
node
,
cls
,
def
,
(
void
)
def
;
if
(
!
(
req_
->
type
&
arch_register_req_type_limited
))
continue
;
if
(
def_constr
==
NULL
)
{
...
...
ir/be/bespillbelady.c
View file @
1b980518
...
...
@@ -805,7 +805,6 @@ static void process_block(ir_node *block)
sched_foreach
(
block
,
irn
)
{
int
i
,
arity
;
ir_node
*
value
;
assert
(
workset_get_length
(
ws
)
<=
n_regs
);
/* Phis are no real instr (see insert_starters()) */
...
...
ir/be/bespilldaemel.c
View file @
1b980518
...
...
@@ -140,9 +140,9 @@ static unsigned get_value_width(const ir_node *node)
*/
static
void
do_spilling
(
ir_nodeset_t
*
live_nodes
,
ir_node
*
node
)
{
size_t
values_defined
=
0
;
ir_node
*
value
;
size_t
values_defined
=
0
;
be_foreach_definition
(
node
,
cls
,
value
,
(
void
)
value
;
assert
(
req_
->
width
>=
1
);
values_defined
+=
req_
->
width
;
);
...
...
@@ -228,7 +228,6 @@ static void remove_defs(ir_node *node, ir_nodeset_t *nodeset)
/* You must break out of your loop when hitting the first phi function. */
assert
(
!
is_Phi
(
node
));
ir_node
*
value
;
be_foreach_definition
(
node
,
cls
,
value
,
ir_nodeset_remove
(
nodeset
,
value
);
);
...
...
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