Commit 2008b06d authored by Christoph Mallon's avatar Christoph Mallon
Browse files

Use turn_back_am() to implement peephole_ia32_Imul_split().

[r22471]
parent 15edc2de
......@@ -1022,7 +1022,7 @@ static void ia32_before_sched(void *self) {
(void) self;
}
static void turn_back_am(ir_node *node)
ir_node *turn_back_am(ir_node *node)
{
ir_graph *irg = current_ir_graph;
dbg_info *dbgi = get_irn_dbg_info(node);
......@@ -1047,8 +1047,6 @@ static void turn_back_am(ir_node *node)
case ia32_am_binary:
if (is_ia32_Immediate(get_irn_n(node, n_ia32_binary_right))) {
assert(is_ia32_Cmp(node) || is_ia32_Cmp8Bit(node) ||
is_ia32_Test(node) || is_ia32_Test8Bit(node));
set_irn_n(node, n_ia32_binary_left, load_res);
} else {
set_irn_n(node, n_ia32_binary_right, load_res);
......@@ -1082,6 +1080,8 @@ static void turn_back_am(ir_node *node)
set_ia32_op_type(node, ia32_Normal);
if (sched_is_scheduled(node))
sched_add_before(node, load);
return load_res;
}
static ir_node *flags_remat(ir_node *node, ir_node *after)
......
......@@ -152,6 +152,12 @@ ir_node *ia32_new_Unknown_vfp(ia32_code_gen_t *cg);
*/
ir_node *ia32_new_Fpu_truncate(ia32_code_gen_t *cg);
/**
* Split instruction with source AM into Load and separate instruction.
* @return result of the Load
*/
ir_node *turn_back_am(ir_node *node);
/**
* Maps all intrinsic calls that the backend support
* and map all instructions the backend did not support
......
......@@ -1147,14 +1147,13 @@ exchange:
/**
* Split a Imul mem, imm into a Load mem and Imul reg, imm if possible.
*/
static void peephole_ia32_Imul_split(ir_node *imul) {
static void peephole_ia32_Imul_split(ir_node *imul)
{
const ir_node *right = get_irn_n(imul, n_ia32_IMul_right);
const arch_register_t *reg;
ir_node *load, *block, *base, *index, *mem, *res, *noreg;
dbg_info *dbgi;
ir_graph *irg;
ir_node *res;
if (! is_ia32_Immediate(right) || get_ia32_op_type(imul) != ia32_AddrModeS) {
if (!is_ia32_Immediate(right) || get_ia32_op_type(imul) != ia32_AddrModeS) {
/* no memory, imm form ignore */
return;
}
......@@ -1164,38 +1163,8 @@ static void peephole_ia32_Imul_split(ir_node *imul) {
return;
/* fine, we can rebuild it */
dbgi = get_irn_dbg_info(imul);
block = get_nodes_block(imul);
irg = current_ir_graph;
base = get_irn_n(imul, n_ia32_IMul_base);
index = get_irn_n(imul, n_ia32_IMul_index);
mem = get_irn_n(imul, n_ia32_IMul_mem);
load = new_rd_ia32_Load(dbgi, irg, block, base, index, mem);
/* copy all attributes */
set_irn_pinned( load, get_irn_pinned(imul));
set_ia32_op_type( load, ia32_AddrModeS);
ia32_copy_am_attrs(load, imul);
set_ia32_am_offs_int( imul, 0);
set_ia32_am_sc( imul, NULL);
set_ia32_am_scale( imul, 0);
clear_ia32_am_sc_sign(imul);
sched_add_before(imul, load);
mem = new_rd_Proj(dbgi, irg, block, load, mode_M, pn_ia32_Load_M);
res = new_rd_Proj(dbgi, irg, block, load, mode_Iu, pn_ia32_Load_res);
res = turn_back_am(imul);
arch_set_irn_register(arch_env, res, reg);
be_peephole_new_node(res);
set_irn_n(imul, n_ia32_IMul_mem, mem);
noreg = get_irn_n(imul, n_ia32_IMul_left);
set_irn_n(imul, n_ia32_IMul_base, noreg);
set_irn_n(imul, n_ia32_IMul_index, noreg);
set_irn_n(imul, n_ia32_IMul_left, res);
set_ia32_op_type(imul, ia32_Normal);
}
/**
......
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