Commit 24bb1070 authored by Matthias Braun's avatar Matthias Braun
Browse files

remove arm_Mla_t node

You can simply build a Add(Mul,...) pattern now as codeselection will match
this to an Mla now.
parent 09955c4e
......@@ -86,16 +86,17 @@ static void lower64_mul(ir_node *node, ir_mode *mode)
ir_node *right_low = get_lowered_low(right);
ir_node *right_high = get_lowered_high(right);
ir_node *conv_l_low = new_rd_Conv(dbgi, block, left_low, mode);
ir_node *mul = new_rd_Mul(dbgi, block, conv_l_low, right_high,
ir_node *mul1 = new_rd_Mul(dbgi, block, conv_l_low, right_high,
mode);
ir_node *umull = new_bd_arm_UMulL_t(dbgi, block, left_low, right_low);
ir_mode *umode = get_irn_mode(right_low);
ir_node *umull_low = new_r_Proj(umull, umode, pn_arm_UMulL_t_low);
ir_node *umull_high = new_r_Proj(umull, mode, pn_arm_UMulL_t_high);
ir_node *mla = new_bd_arm_Mla_t(dbgi, block, right_low, left_high,
mul, mode);
ir_node *add = new_rd_Add(dbgi, block, mla, umull_high, mode);
ir_set_dw_lowered(node, umull_low, add);
ir_node *conv_r_low = new_rd_Conv(dbgi, block, right_low, mode);
ir_node *mul2 = new_rd_Mul(dbgi, block, conv_r_low, left_high, mode);
ir_node *add1 = new_rd_Add(dbgi, block, mul2, mul1, mode);
ir_node *add2 = new_rd_Add(dbgi, block, add1, umull_high, mode);
ir_set_dw_lowered(node, umull_low, add2);
}
static ir_entity *ldivmod;
......
......@@ -740,12 +740,6 @@ SMulL_t => {
dump_func => "NULL",
},
Mla_t => {
ins => [ "left", "right", "add" ],
attr_type => "",
dump_func => "NULL",
},
OrPl_t => {
ins => [ "falseval", "flags", "left", "right" ],
attr_type => "",
......
......@@ -736,19 +736,6 @@ static ir_node *gen_Proj_arm_UMulL_t(ir_node *node)
panic("%+F: Invalid proj number", node);
}
static ir_node *gen_arm_Mla_t(ir_node *node)
{
ir_node *block = be_transform_node(get_nodes_block(node));
ir_node *left = get_irn_n(node, n_arm_Mla_t_left);
ir_node *new_left = be_transform_node(left);
ir_node *right = get_irn_n(node, n_arm_Mla_t_right);
ir_node *new_right = be_transform_node(right);
ir_node *add = get_irn_n(node, n_arm_Mla_t_add);
ir_node *new_add = be_transform_node(add);
dbg_info *dbgi = get_irn_dbg_info(node);
return new_bd_arm_Mla(dbgi, block, new_left, new_right, new_add);
}
static ir_node *gen_Div(ir_node *node)
{
ir_node *block = be_transform_node(get_nodes_block(node));
......@@ -2094,7 +2081,6 @@ static void arm_register_transformers(void)
be_set_transform_function(op_And, gen_And);
be_set_transform_function(op_arm_AdC_t, gen_arm_AdC_t);
be_set_transform_function(op_arm_AddS_t, gen_arm_AddS_t);
be_set_transform_function(op_arm_Mla_t, gen_arm_Mla_t);
be_set_transform_function(op_arm_OrPl_t, gen_arm_OrPl_t);
be_set_transform_function(op_arm_SbC_t, gen_arm_SbC_t);
be_set_transform_function(op_arm_SubS_t, gen_arm_SubS_t);
......
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