Commit 2b31fff4 authored by Christoph Mallon's avatar Christoph Mallon
Browse files

Let panic() print file, line and function.

Remove now redundant (and sometimes wrong) location info from the panic messages.
parent 79b1f6ae
......@@ -128,7 +128,7 @@ void hungarian_prepare_cost_matrix(hungarian_problem_t *p,
} else if (mode == HUNGARIAN_MODE_MINIMIZE_COST) {
/* nothing to do */
} else {
panic("Unknown hungarian problem mode\n");
panic("Unknown hungarian problem mode");
}
}
......
......@@ -154,7 +154,7 @@ void TEMPLATE_emitf(const ir_node *node, const char *format, ...)
default:
unknown:
panic("unknown format conversion in arm_emitf()");
panic("unknown format conversion");
}
}
va_end(ap);
......
......@@ -87,7 +87,7 @@ static ir_node *gen_Shl(ir_node *node)
{
ir_mode *mode = get_irn_mode(node);
if (get_mode_modulo_shift(mode) != 32)
panic("modulo shift!=32 not supported by TEMPLATE backend");
panic("modulo shift!=32 not supported");
return transform_binop(node, new_bd_TEMPLATE_Shl);
}
......@@ -95,7 +95,7 @@ static ir_node *gen_Shr(ir_node *node)
{
ir_mode *mode = get_irn_mode(node);
if (get_mode_modulo_shift(mode) != 32)
panic("modulo shift!=32 not supported by TEMPLATE backend");
panic("modulo shift!=32 not supported");
return transform_binop(node, new_bd_TEMPLATE_Shr);
}
......
......@@ -328,7 +328,7 @@ static void emit_be_Copy(const ir_node *irn)
}
if (mode_is_float(mode)) {
panic("emit_be_Copy: move not supported for FP");
panic("move not supported for FP");
} else if (mode_is_data(mode)) {
be_emit_cstring("\tmov ");
amd64_emit_source_register(irn, 0);
......@@ -336,7 +336,7 @@ static void emit_be_Copy(const ir_node *irn)
amd64_emit_dest_register(irn, 0);
be_emit_finish_line_gas(irn);
} else {
panic("emit_be_Copy: move not supported for this mode");
panic("move not supported for this mode");
}
}
......
......@@ -196,7 +196,7 @@ static ir_node *gen_Cmp(ir_node *node)
bool is_unsigned;
if (mode_is_float(cmp_mode)) {
panic("Floating point not implemented yet (in gen_Cmp)!");
panic("Floating point not implemented yet!");
}
assert(get_irn_mode(op2) == cmp_mode);
......
......@@ -99,7 +99,7 @@ calling_convention_t *arm_decide_calling_convention(const ir_graph *irg,
/* we might need a 2nd 32bit component (for 64bit or double values) */
if (bits > 32) {
if (bits > 64)
panic("only 32 and 64bit modes supported in arm backend");
panic("only 32 and 64bit modes supported");
if (regnum < n_param_regs) {
const arch_register_t *reg = param_regs[regnum++];
......@@ -127,18 +127,18 @@ calling_convention_t *arm_decide_calling_convention(const ir_graph *irg,
if (mode_is_float(result_mode)) {
if (float_regnum >= n_float_result_regs) {
panic("Too many float results for arm backend");
panic("Too many float results");
} else {
const arch_register_t *reg = float_result_regs[float_regnum++];
result->reg0 = reg;
}
} else {
if (get_mode_size_bits(result_mode) > 32) {
panic("Results with more than 32bits not supported by arm backend yet");
panic("Results with more than 32bits not supported yet");
}
if (regnum >= n_result_regs) {
panic("Too many results for arm backend");
panic("Too many results");
} else {
const arch_register_t *reg = result_regs[regnum++];
result->reg0 = reg;
......
......@@ -387,7 +387,7 @@ void arm_emitf(const ir_node *node, const char *format, ...)
default:
unknown:
panic("unknown format conversion in arm_emitf()");
panic("unknown format conversion");
}
}
va_end(ap);
......@@ -623,12 +623,12 @@ static void emit_be_Copy(const ir_node *irn)
if (USE_FPA(isa)) {
arm_emitf(irn, "mvf %D0, %S0");
} else {
panic("emit_be_Copy: move not supported for this mode");
panic("move not supported for this mode");
}
} else if (mode_is_data(mode)) {
arm_emitf(irn, "mov %D0, %S0");
} else {
panic("emit_be_Copy: move not supported for this mode");
panic("move not supported for this mode");
}
}
......
......@@ -738,7 +738,7 @@ static ir_node *make_shift(ir_node *node, match_flags_t flags,
ir_node *new_op2;
if (get_mode_modulo_shift(mode) != 32)
panic("modulo shift!=32 not supported by arm backend");
panic("modulo shift!=32 not supported");
if (flags & MATCH_SIZE_NEUTRAL) {
op1 = arm_skip_downconv(op1);
......@@ -942,7 +942,7 @@ static ir_node *gen_Load(ir_node *node)
ir_node *new_load = NULL;
if (get_Load_unaligned(node) == align_non_aligned)
panic("arm: unaligned Loads not supported yet");
panic("unaligned Loads not supported yet");
if (mode_is_float(mode)) {
if (USE_FPA(isa)) {
......@@ -984,7 +984,7 @@ static ir_node *gen_Store(ir_node *node)
ir_node *new_store = NULL;
if (get_Store_unaligned(node) == align_non_aligned)
panic("arm: unaligned Stores not supported yet");
panic("unaligned Stores not supported yet");
if (mode_is_float(mode)) {
if (USE_FPA(isa)) {
......@@ -1293,7 +1293,7 @@ static ir_node *gen_Builtin(ir_node *node)
case ir_bk_inner_trampoline:
break;
}
panic("Builtin %s not implemented in ARM", get_builtin_kind_name(kind));
panic("Builtin %s not implemented", get_builtin_kind_name(kind));
}
/**
......@@ -1326,7 +1326,7 @@ static ir_node *gen_Proj_Builtin(ir_node *proj)
case ir_bk_inner_trampoline:
break;
}
panic("Builtin %s not implemented in ARM", get_builtin_kind_name(kind));
panic("Builtin %s not implemented", get_builtin_kind_name(kind));
}
static ir_node *gen_Proj_Load(ir_node *node)
......
......@@ -639,7 +639,7 @@ static void emit_array_type(const ir_type *type)
ir_type *element_type = get_array_element_type(type);
if (get_array_n_dimensions(type) != 1)
panic("dwarf: multidimensional arrays no supported yet");
panic("multidimensional arrays no supported yet");
emit_type(element_type);
......@@ -822,7 +822,7 @@ static void emit_type(ir_type *type)
case tpo_union: emit_compound_type(type); break;
case tpo_method: emit_subroutine_type(type); break;
default:
panic("bedwarf: type %+F not implemented yet", type);
panic("type %+F not implemented yet", type);
}
}
......
......@@ -730,7 +730,7 @@ static void emit_init_expression(be_gas_decl_env_t *env, ir_node *init)
return;
default:
panic("emit_atomic_init(): unsupported IR-node %+F", init);
panic("unsupported IR-node %+F", init);
}
}
......
......@@ -175,7 +175,7 @@ void be_info_init_irg(ir_graph *irg)
void be_info_free(void)
{
if (!initialized)
panic("be_info_free called without prior init");
panic("called without prior init");
assert(op_Phi->ops.copy_attr == new_phi_copy_attr);
op_Phi->ops.copy_attr = old_phi_copy_attr;
......
......@@ -1051,7 +1051,7 @@ static void dummy_set_frame_offset(ir_node *node, int bias)
{
(void) node;
(void) bias;
panic("dummy_set_frame_offset() should not be called");
panic("should not be called");
}
static int dummy_get_sp_bias(const ir_node *node)
......
......@@ -697,7 +697,7 @@ emit_S:
default:
unknown:
panic("unknown format conversion in ia32_emitf()");
panic("unknown format conversion");
}
}
......
......@@ -449,7 +449,7 @@ ir_entity *ia32_gen_fp_known_const(ia32_known_const_t kct)
case 0: mode = mode_Iu; break;
case 1: mode = mode_Lu; break;
case 2: mode = mode_F; break;
default: panic("internal compiler error (ia32_gen_fp_known_const)");
default: panic("internal compiler error");
}
tv = new_tarval_from_str(cnst_str, strlen(cnst_str), mode);
......@@ -4288,7 +4288,7 @@ static ir_node *gen_ia32_l_LLtoFloat(ir_node *node)
ir_node *mem_high;
if (ia32_cg_config.use_sse2) {
panic("ia32_l_LLtoFloat not implemented for SSE2");
panic("not implemented for SSE2");
}
/* do a store */
......@@ -4617,7 +4617,7 @@ static ir_node *gen_Proj_Store(ir_node *node)
if (pn == pn_Store_M) {
return new_pred;
}
panic("exception control flow for gen_float_const_Store not implemented yet");
panic("exception control flow not implemented yet");
} else if (get_ia32_op_type(new_pred) == ia32_AddrModeD) {
/* destination address mode */
if (pn == pn_Store_M) {
......@@ -5471,7 +5471,7 @@ static ir_node *gen_Builtin(ir_node *node)
case ir_bk_inner_trampoline:
return gen_inner_trampoline(node);
}
panic("Builtin %s not implemented in IA32", get_builtin_kind_name(kind));
panic("Builtin %s not implemented", get_builtin_kind_name(kind));
}
/**
......@@ -5515,7 +5515,7 @@ static ir_node *gen_Proj_Builtin(ir_node *proj)
return get_Tuple_pred(new_node, 0);
}
}
panic("Builtin %s not implemented in IA32", get_builtin_kind_name(kind));
panic("Builtin %s not implemented", get_builtin_kind_name(kind));
}
static ir_node *gen_be_IncSP(ir_node *node)
......
......@@ -1558,7 +1558,7 @@ static int sim_Fucom(x87_state *state, ir_node *n)
case 0: dst = op_ia32_FucomFnstsw; break;
case 1: dst = op_ia32_FucompFnstsw; break;
case 2: dst = op_ia32_FucomppFnstsw; break;
default: panic("invalid popcount in sim_Fucom");
default: panic("invalid popcount");
}
for (i = 0; i < pops; ++i) {
......@@ -1573,10 +1573,10 @@ static int sim_Fucom(x87_state *state, ir_node *n)
x87_pop(state);
x87_create_fpop(state, sched_next(n), 1);
break;
default: panic("invalid popcount in sim_Fucom");
default: panic("invalid popcount");
}
} else {
panic("invalid operation %+F in sim_FucomFnstsw", n);
panic("invalid operation %+F", n);
}
x87_patch_insn(n, dst);
......@@ -1793,7 +1793,7 @@ static int sim_Copy(x87_state *state, ir_node *n)
if (out_idx >= 0 && out_idx != op1_idx) {
/* Matze: out already on stack? how can this happen? */
panic("invalid stack state in x87 simulator");
panic("invalid stack state");
#if 0
/* op1 must be killed and placed where out is */
......
......@@ -167,7 +167,7 @@ static unsigned determine_n_float_regs(ir_mode *mode)
case 128:
return 4;
default:
panic("sparc: Unexpected floatingpoint mode %+F", mode);
panic("Unexpected floatingpoint mode %+F", mode);
}
}
......@@ -223,7 +223,7 @@ calling_convention_t *sparc_decide_calling_convention(ir_type *function_type,
reg_or_stackslot_t *param;
if (is_compound_type(param_type))
panic("sparc: compound arguments not supported yet");
panic("compound arguments not supported yet");
mode = get_type_mode(param_type);
bits = get_mode_size_bits(mode);
......@@ -258,7 +258,7 @@ calling_convention_t *sparc_decide_calling_convention(ir_type *function_type,
/* we might need a 2nd 32bit component (for 64bit or double values) */
if (bits > 32) {
if (bits > 64)
panic("only 32 and 64bit modes supported in sparc backend");
panic("only 32 and 64bit modes supported");
if (regnum < n_param_regs) {
const arch_register_t *reg = param_regs[regnum];
......@@ -294,7 +294,7 @@ calling_convention_t *sparc_decide_calling_convention(ir_type *function_type,
unsigned next_reg = round_up2(float_regnum, n_regs);
if (next_reg >= n_float_result_regs) {
panic("Too many float results for sparc backend");
panic("Too many float results");
} else {
const arch_register_t *reg = float_result_regs[next_reg];
rbitset_clear(caller_saves, reg->global_index);
......@@ -310,7 +310,7 @@ calling_convention_t *sparc_decide_calling_convention(ir_type *function_type,
rbitset_clear(caller_saves, reg->global_index+2);
rbitset_clear(caller_saves, reg->global_index+3);
} else {
panic("invalid number of registers in sparc float result");
panic("invalid number of registers in result");
}
float_regnum = next_reg + n_regs;
......@@ -318,11 +318,11 @@ calling_convention_t *sparc_decide_calling_convention(ir_type *function_type,
}
} else {
if (get_mode_size_bits(result_mode) > 32) {
panic("Results with more than 32bits not supported by sparc backend yet");
panic("Results with more than 32bits not supported yet");
}
if (regnum >= n_param_regs) {
panic("Too many results for sparc backend");
panic("Too many results");
} else {
const arch_register_t *reg = param_regs[regnum++];
if (irg == NULL || omit_fp)
......
......@@ -1071,7 +1071,7 @@ static void emit_be_Copy(const ir_node *node)
} else if (mode_is_data(mode)) {
sparc_emitf(node, "mov %S0, %D0");
} else {
panic("emit_be_Copy: invalid mode");
panic("invalid mode");
}
}
......
......@@ -663,7 +663,7 @@ static ir_node *gen_Proj_AddCC_t(ir_node *node)
case pn_sparc_AddCC_t_flags:
return new_r_Proj(new_pred, mode_flags, pn_sparc_AddCC_flags);
default:
panic("Invalid AddCC_t proj found");
panic("Invalid proj found");
}
}
......@@ -710,7 +710,7 @@ static ir_node *gen_Proj_SubCC_t(ir_node *node)
case pn_sparc_SubCC_t_flags:
return new_r_Proj(new_pred, mode_flags, pn_sparc_SubCC_flags);
default:
panic("Invalid SubCC_t proj found");
panic("Invalid proj found");
}
}
......@@ -777,7 +777,7 @@ static ir_node *gen_Load(ir_node *node)
address_t address;
if (get_Load_unaligned(node) == align_non_aligned) {
panic("sparc: transformation of unaligned Loads not implemented yet");
panic("transformation of unaligned Loads not implemented yet");
}
if (mode_is_float(mode)) {
......@@ -820,7 +820,7 @@ static ir_node *gen_Store(ir_node *node)
address_t address;
if (get_Store_unaligned(node) == align_non_aligned) {
panic("sparc: transformation of unaligned Stores not implemented yet");
panic("transformation of unaligned Stores not implemented yet");
}
if (mode_is_float(mode)) {
......@@ -1054,7 +1054,7 @@ static ir_node *gen_Shl(ir_node *node)
{
ir_mode *mode = get_irn_mode(node);
if (get_mode_modulo_shift(mode) != 32)
panic("modulo_shift!=32 not supported by sparc backend");
panic("modulo_shift!=32 not supported");
return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sll_reg, new_bd_sparc_Sll_imm);
}
......@@ -1062,7 +1062,7 @@ static ir_node *gen_Shr(ir_node *node)
{
ir_mode *mode = get_irn_mode(node);
if (get_mode_modulo_shift(mode) != 32)
panic("modulo_shift!=32 not supported by sparc backend");
panic("modulo_shift!=32 not supported");
return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Srl_reg, new_bd_sparc_Srl_imm);
}
......@@ -1070,7 +1070,7 @@ static ir_node *gen_Shrs(ir_node *node)
{
ir_mode *mode = get_irn_mode(node);
if (get_mode_modulo_shift(mode) != 32)
panic("modulo_shift!=32 not supported by sparc backend");
panic("modulo_shift!=32 not supported");
return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sra_reg, new_bd_sparc_Sra_imm);
}
......@@ -2070,10 +2070,10 @@ static ir_node *gen_Proj_Alloc(ir_node *node)
}
case pn_Alloc_X_regular:
case pn_Alloc_X_except:
panic("sparc backend: exception output of alloc not supported (at %+F)",
panic("exception output of alloc not supported (at %+F)",
node);
}
panic("sparc backend: invalid Proj->Alloc");
panic("invalid Proj->Alloc");
}
static ir_node *gen_Free(ir_node *node)
......@@ -2269,7 +2269,7 @@ static ir_node *gen_Proj_Div(ir_node *node)
} else if (is_sparc_fdiv(new_pred)) {
res_mode = get_Div_resmode(pred);
} else {
panic("sparc backend: Div transformed to something unexpected: %+F",
panic("Div transformed to something unexpected: %+F",
new_pred);
}
assert((int)pn_sparc_SDiv_res == (int)pn_sparc_UDiv_res);
......
......@@ -31,11 +31,11 @@
#include "error.h"
#include "irprintf.h"
NORETURN panic(const char *fmt, ...)
NORETURN (panic)(char const *const file, int const line, char const *const func, char const *const fmt, ...)
{
va_list ap;
fputs("libFirm panic: ", stderr);
fprintf(stderr, "%s:%d: libFirm panic in %s: ", file, line, func);
va_start(ap, fmt);
ir_vfprintf(stderr, fmt, ap);
va_end(ap);
......
......@@ -54,6 +54,8 @@
/**
* Prints a panic message to stderr and exits.
*/
NORETURN panic(const char *fmt, ...);
NORETURN panic(char const *file, int line, char const *func, char const *fmt, ...);
#define panic(...) panic(__FILE__, __LINE__, __func__, __VA_ARGS__)
# endif
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