Commit 2ea8b12b authored by Matthias Braun's avatar Matthias Braun
Browse files

ia32, beasm: Specify additional pressure

This avoids AnyVal/additional Keep constructins.
parent 4727ffc1
......@@ -5,6 +5,7 @@
#include <ctype.h>
#include "be_t.h"
#include "bearch.h"
#include "beasm.h"
#include "bediagnostic.h"
......@@ -236,6 +237,8 @@ ir_node *be_make_asm(ir_node const *const node, ir_node **in, arch_register_req_
*/
size_t const orig_n_ins = ARR_LEN(in_reqs);
size_t const orig_n_outs = ARR_LEN(out_reqs);
uint8_t add_pressure[isa_if->n_register_classes];
memset(add_pressure, 0, sizeof(add_pressure));
if (orig_n_outs < orig_n_ins) {
bitset_t *const used_ins = bitset_alloca(orig_n_ins);
for (size_t o = 0; o < orig_n_outs; ++o) {
......@@ -243,10 +246,8 @@ ir_node *be_make_asm(ir_node const *const node, ir_node **in, arch_register_req_
if (match_requirement(in_reqs, orig_n_ins, used_ins, outreq))
continue;
/* add a new (dummy) input which occupies the register */
assert(outreq->limited != NULL);
ARR_APP1(arch_register_req_t const*, in_reqs, outreq);
ARR_APP1(ir_node*, in, be_new_AnyVal(block, outreq->cls));
unsigned index = outreq->cls->index;
add_pressure[index]++;
}
} else {
bitset_t *const used_outs = bitset_alloca(orig_n_outs);
......@@ -255,9 +256,8 @@ ir_node *be_make_asm(ir_node const *const node, ir_node **in, arch_register_req_
if (match_requirement(out_reqs, orig_n_outs, used_outs, inreq))
continue;
/* add a new (dummy) output which occupies the register */
assert(inreq->limited != NULL);
ARR_APP1(arch_register_req_t const*, out_reqs, inreq);
unsigned index = inreq->cls->index;
add_pressure[index]++;
}
}
......@@ -271,6 +271,12 @@ ir_node *be_make_asm(ir_node const *const node, ir_node **in, arch_register_req_
unsigned const n_outs = ARR_LEN(out_reqs);
ident *const text = get_ASM_text(node);
ir_node *const new_node = be_new_Asm(dbgi, block, n_ins, in, n_outs, text, operands);
for (unsigned i = 0, n = isa_if->n_register_classes; i < n; ++i) {
if (add_pressure[i] == 0)
continue;
arch_register_class_t const *const cls = &isa_if->register_classes[i];
arch_set_additional_pressure(new_node, cls, add_pressure[i]);
}
backend_info_t *const info = be_get_info(new_node);
for (size_t o = 0; o < n_outs; ++o) {
......
......@@ -954,12 +954,13 @@ FnstCWNOP => {
Cltd => {
# we should not rematerialize this node. It has very strict constraints.
in_reqs => [ "eax", "edx" ],
in_reqs => [ "eax" ],
out_reqs => [ "edx" ],
ins => [ "val", "clobbered" ],
ins => [ "val" ],
emit => "cltd",
latency => 1,
mode => $mode_gp,
init_attr => "arch_set_additional_pressure(res, &ia32_reg_classes[CLASS_ia32_gp], 1);",
},
# Load / Store
......
......@@ -1852,8 +1852,7 @@ static ir_node *create_sex_32_64(dbg_info *dbgi, ir_node *block,
ir_node *res;
if (ia32_cg_config.use_short_sex_eax) {
ir_node *pval = be_new_AnyVal(block, &ia32_reg_classes[CLASS_ia32_gp]);
res = new_bd_ia32_Cltd(dbgi, block, val, pval);
res = new_bd_ia32_Cltd(dbgi, block, val);
} else {
ir_graph *const irg = get_irn_irg(block);
ir_node *const imm31 = ia32_create_Immediate(irg, 31);
......@@ -4989,6 +4988,7 @@ static ir_node *gen_Call(ir_node *node)
in[n_ia32_Call_fpcw] = get_initial_fpcw(irg);
in_req[n_ia32_Call_fpcw] = fpcw->single_req;
uint8_t add_pressure = 0;
unsigned sync_arity = 0;
unsigned const n_params = get_Call_n_params(node);
ir_node **const sync_ins = ALLOCAN(ir_node*, n_params + 1);
......@@ -5034,7 +5034,9 @@ static ir_node *gen_Call(ir_node *node)
unsigned goti = in_arity++;
in[goti] = ia32_get_pic_base(irg);
in_req[goti] = ia32_registers[REG_EBX].single_req;
panic("Need code to make this register pressure faithful");
/* We cannot pair up the "ebx" with any output, causing additional
* register pressure */
++add_pressure;
}
assert(in_arity == n_ins);
assert(sync_arity <= n_params + 1);
......@@ -5055,6 +5057,8 @@ static ir_node *gen_Call(ir_node *node)
/* Create node. */
ir_node *const call = new_bd_ia32_Call(dbgi, block, in_arity, in, n_out, cconv->sp_delta, type);
arch_set_irn_register_reqs_in(call, in_req);
arch_set_additional_pressure(call, &ia32_reg_classes[CLASS_ia32_gp],
add_pressure);
SET_IA32_ORIG_NODE(call, node);
if (get_irn_pinned(node) == op_pin_state_pinned)
......
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