ia32: Generate better code for '~(0x80000000 >> x)'.

'mov $~0x80000000, %r; ror x, %r' is shorter than 'mov $0x80000000, %r; shr x, %r; not %r'.

NEWS.md

@@ -4,6 +4,7 @@ libFirm 1.22.1 (2016-01-07)
 * Support PIC with PLT for ELF (amd64)
 * Add `ia32-get_ip={pop,thunk}`
 * Generate 'mov $~1, %r; rol x, %r' for '~(1 << x)' (ia32)
+* Generate 'mov $~0x80000000, %r; ror x, %r' for '~(0x80000000 >> x)' (ia32)
 * Bugfixes
 
 libFirm 1.22.0 (2015-12-31)

ir/be/ia32/ia32_transform.c

@@ -2083,6 +2083,20 @@ static ir_node *gen_Not(ir_node *node)
 		return new_bd_ia32_Rol(dbgi, block, m2, new_val);
 	}
 
+	if (is_Shr(op)) {
+		ir_node *const shrl = get_Shr_left(op);
+		if (is_Const(shrl) && get_tarval_lowest_bit(get_Const_tarval(shrl)) == 31) {
+			/* ~(0x80000000 >> x) -> Ror(~0x80000000, x) */
+			dbg_info   *const dbgi    = get_irn_dbg_info(node);
+			ir_node    *const block   = be_transform_nodes_block(node);
+			x86_imm32_t const imm     = { .offset = 0x7FFFFFFF };
+			ir_node    *const m2      = new_bd_ia32_Const(NULL, block, &imm);
+			ir_node    *const val     = get_Shr_right(op);
+			ir_node    *const new_val = be_transform_node(val);
+			return new_bd_ia32_Ror(dbgi, block, m2, new_val);
+		}
+	}
+
 	return gen_unop(node, op, new_bd_ia32_Not, match_mode_neutral);
 }