Commit 336cef57 authored by Matthias Braun's avatar Matthias Braun
Browse files

sparc: use better register/class names even if they collide.

parent 40cccf8c
......@@ -114,7 +114,7 @@ static bool sparc_modifies_flags(const ir_node *node)
{
be_foreach_out(node, o) {
const arch_register_req_t *req = arch_get_irn_register_req_out(node, o);
if (req->cls == &sparc_reg_classes[CLASS_sparc_flags_class])
if (req->cls == &sparc_reg_classes[CLASS_sparc_flags])
return true;
}
return false;
......@@ -124,7 +124,7 @@ static bool sparc_modifies_fp_flags(const ir_node *node)
{
be_foreach_out(node, o) {
const arch_register_req_t *req = arch_get_irn_register_req_out(node, o);
if (req->cls == &sparc_reg_classes[CLASS_sparc_fpflags_class])
if (req->cls == &sparc_reg_classes[CLASS_sparc_fpflags])
return true;
}
return false;
......@@ -133,9 +133,9 @@ static bool sparc_modifies_fp_flags(const ir_node *node)
static void sparc_before_ra(ir_graph *irg)
{
/* fixup flags register */
be_sched_fix_flags(irg, &sparc_reg_classes[CLASS_sparc_flags_class],
be_sched_fix_flags(irg, &sparc_reg_classes[CLASS_sparc_flags],
NULL, sparc_modifies_flags, NULL);
be_sched_fix_flags(irg, &sparc_reg_classes[CLASS_sparc_fpflags_class],
be_sched_fix_flags(irg, &sparc_reg_classes[CLASS_sparc_fpflags],
NULL, sparc_modifies_fp_flags, NULL);
}
......
......@@ -31,11 +31,11 @@ static const unsigned ignore_regs[] = {
REG_SP,
REG_O7,
REG_FRAME_POINTER,
REG_FP,
REG_I7,
REG_FPFLAGS,
REG_FLAGS,
REG_PSR,
REG_FSR,
REG_Y,
REG_F31,
......@@ -105,15 +105,15 @@ static const unsigned caller_saves[] = {
REG_F28,
REG_F29,
REG_F30,
REG_FLAGS,
REG_FPFLAGS,
REG_PSR,
REG_FSR,
REG_Y,
};
static unsigned default_caller_saves[BITSET_SIZE_ELEMS(N_SPARC_REGISTERS)];
static const unsigned returns_twice_saved[] = {
REG_SP,
REG_FRAME_POINTER,
REG_FP,
REG_I7
};
static unsigned default_returns_twice_saves[BITSET_SIZE_ELEMS(N_SPARC_REGISTERS)];
......
......@@ -149,7 +149,7 @@ static void introduce_epilog(ir_node *ret)
ir_graph *const irg = get_irn_irg(ret);
be_stack_layout_t *const layout = be_get_irg_stack_layout(irg);
if (!layout->sp_relative) {
arch_register_t const *const fp_reg = &sparc_registers[REG_FRAME_POINTER];
arch_register_t const *const fp_reg = &sparc_registers[REG_FP];
ir_node *const fp = be_get_initial_reg_value(irg, fp_reg);
ir_node *const new_sp = be_get_initial_reg_value(irg, sp_reg);
ir_node *const restore = new_bd_sparc_RestoreZero(NULL, block, new_sp, fp);
......
......@@ -47,16 +47,16 @@ $mode_fp4 = "sparc_mode_Q";
{ name => "i3", encoding => 27, dwarf => 27 },
{ name => "i4", encoding => 28, dwarf => 28 },
{ name => "i5", encoding => 29, dwarf => 29 },
{ name => "frame_pointer", encoding => 30, dwarf => 30, realname => "fp" },
{ name => "fp", encoding => 30, dwarf => 30 },
{ name => "i7", encoding => 31, dwarf => 31 },
{ mode => $mode_gp }
],
fpflags_class => [
{ name => "fpflags" },
fpflags => [
{ name => "fsr" },
{ mode => $mode_fpflags, flags => "manual_ra" }
],
flags_class => [
{ name => "flags" },
flags => [
{ name => "psr" },
{ mode => $mode_flags, flags => "manual_ra" }
],
mul_div_high_res => [
......@@ -224,18 +224,18 @@ my $float_binop = {
ins => [ "left", "right" ],
constructors => {
s => {
in_reqs => [ "fp", "fp" ],
out_reqs => [ "fp" ],
in_reqs => [ "cls-fp", "cls-fp" ],
out_reqs => [ "cls-fp" ],
mode => $mode_fp,
},
d => {
in_reqs => [ "fp:a|2", "fp:a|2" ],
out_reqs => [ "fp:a|2" ],
in_reqs => [ "cls-fp:a|2", "cls-fp:a|2" ],
out_reqs => [ "cls-fp:a|2" ],
mode => $mode_fp2,
},
q => {
in_reqs => [ "fp:a|4", "fp:a|4" ],
out_reqs => [ "fp:a|4" ],
in_reqs => [ "cls-fp:a|4", "cls-fp:a|4" ],
out_reqs => [ "cls-fp:a|4" ],
mode => $mode_fp4,
}
},
......@@ -248,18 +248,18 @@ my $float_unop = {
ins => [ "val" ],
constructors => {
s => {
in_reqs => [ "fp" ],
out_reqs => [ "fp" ],
in_reqs => [ "cls-fp" ],
out_reqs => [ "cls-fp" ],
mode => $mode_fp,
},
d => {
in_reqs => [ "fp:a|2" ],
out_reqs => [ "fp:a|2" ],
in_reqs => [ "cls-fp:a|2" ],
out_reqs => [ "cls-fp:a|2" ],
mode => $mode_fp2,
},
q => {
in_reqs => [ "fp:a|4" ],
out_reqs => [ "fp:a|4" ],
in_reqs => [ "cls-fp:a|4" ],
out_reqs => [ "cls-fp:a|4" ],
mode => $mode_fp4,
}
},
......@@ -446,18 +446,18 @@ Restore => {
imm => {
attr => "ir_entity *immediate_entity, int32_t immediate_value",
custominit => "sparc_set_attr_imm(res, immediate_entity, immediate_value);",
in_reqs => [ "sp", "frame_pointer", "gp" ],
in_reqs => [ "sp", "reg-fp", "gp" ],
ins => [ "stack", "frame_pointer", "left" ],
},
reg => {
in_reqs => [ "sp", "frame_pointer", "gp", "gp" ],
in_reqs => [ "sp", "reg-fp", "gp", "gp" ],
ins => [ "stack", "frame_pointer", "left", "right" ],
}
},
},
RestoreZero => {
in_reqs => [ "sp", "frame_pointer" ],
in_reqs => [ "sp", "reg-fp" ],
out_reqs => [ "sp:I|S" ],
ins => [ "stack", "frame_pointer" ],
outs => [ "stack" ],
......@@ -722,9 +722,9 @@ fcmp => {
out_reqs => [ "fpflags" ],
mode => $mode_fpflags,
constructors => {
s => { in_reqs => [ "fp", "fp" ] },
d => { in_reqs => [ "fp:a|2", "fp:a|2" ] },
q => { in_reqs => [ "fp:a|4", "fp:a|4" ] },
s => { in_reqs => [ "cls-fp", "cls-fp" ] },
d => { in_reqs => [ "cls-fp:a|2", "cls-fp:a|2" ] },
q => { in_reqs => [ "cls-fp:a|4", "cls-fp:a|4" ] },
},
},
......@@ -751,9 +751,9 @@ fdiv => {
ins => [ "left", "right" ],
outs => [ "res", "M" ],
constructors => {
s => { in_reqs => [ "fp", "fp" ], out_reqs => [ "fp", "none" ] },
d => { in_reqs => [ "fp:a|2", "fp:a|2" ], out_reqs => [ "fp:a|2", "none" ] },
q => { in_reqs => [ "fp:a|4", "fp:a|4" ], out_reqs => [ "fp:a|4", "none" ] }
s => { in_reqs => [ "cls-fp", "cls-fp" ], out_reqs => [ "cls-fp", "none" ] },
d => { in_reqs => [ "cls-fp:a|2", "cls-fp:a|2" ], out_reqs => [ "cls-fp:a|2", "none" ] },
q => { in_reqs => [ "cls-fp:a|4", "cls-fp:a|4" ], out_reqs => [ "cls-fp:a|4", "none" ] }
},
},
......@@ -775,12 +775,12 @@ fftof => {
attr_type => "sparc_fp_conv_attr_t",
attr => "ir_mode *src_mode, ir_mode *dest_mode",
constructors => {
s_d => { in_reqs => [ "fp" ], out_reqs => [ "fp:a|2" ], mode => $mode_fp2, },
s_q => { in_reqs => [ "fp" ], out_reqs => [ "fp:a|2" ], mode => $mode_fp4, },
d_s => { in_reqs => [ "fp:a|2" ], out_reqs => [ "fp" ], mode => $mode_fp, },
d_q => { in_reqs => [ "fp:a|2" ], out_reqs => [ "fp:a|4" ], mode => $mode_fp4, },
q_s => { in_reqs => [ "fp:a|4" ], out_reqs => [ "fp" ], mode => $mode_fp, },
q_d => { in_reqs => [ "fp:a|4" ], out_reqs => [ "fp:a|2" ], mode => $mode_fp2, },
s_d => { in_reqs => [ "cls-fp" ], out_reqs => [ "cls-fp:a|2" ], mode => $mode_fp2, },
s_q => { in_reqs => [ "cls-fp" ], out_reqs => [ "cls-fp:a|2" ], mode => $mode_fp4, },
d_s => { in_reqs => [ "cls-fp:a|2" ], out_reqs => [ "cls-fp" ], mode => $mode_fp, },
d_q => { in_reqs => [ "cls-fp:a|2" ], out_reqs => [ "cls-fp:a|4" ], mode => $mode_fp4, },
q_s => { in_reqs => [ "cls-fp:a|4" ], out_reqs => [ "cls-fp" ], mode => $mode_fp, },
q_d => { in_reqs => [ "cls-fp:a|4" ], out_reqs => [ "cls-fp:a|2" ], mode => $mode_fp2, },
},
},
......@@ -789,11 +789,11 @@ fitof => {
emit => "fito%FM %S0, %D0",
attr_type => "sparc_fp_attr_t",
attr => "ir_mode *fp_mode",
in_reqs => [ "fp" ],
in_reqs => [ "cls-fp" ],
constructors => {
s => { out_reqs => [ "fp" ], mode => $mode_fp, },
d => { out_reqs => [ "fp:a|2" ], mode => $mode_fp2, },
q => { out_reqs => [ "fp:a|4" ], mode => $mode_fp4, },
s => { out_reqs => [ "cls-fp" ], mode => $mode_fp, },
d => { out_reqs => [ "cls-fp:a|2" ], mode => $mode_fp2, },
q => { out_reqs => [ "cls-fp:a|4" ], mode => $mode_fp4, },
},
},
......@@ -803,11 +803,11 @@ fftoi => {
attr_type => "sparc_fp_attr_t",
attr => "ir_mode *fp_mode",
mode => $mode_gp,
out_reqs => [ "fp" ],
out_reqs => [ "cls-fp" ],
constructors => {
s => { in_reqs => [ "fp" ] },
d => { in_reqs => [ "fp:a|2" ] },
q => { in_reqs => [ "fp:a|4" ] },
s => { in_reqs => [ "cls-fp" ] },
d => { in_reqs => [ "cls-fp:a|2" ] },
q => { in_reqs => [ "cls-fp:a|4" ] },
},
},
......@@ -815,9 +815,9 @@ Ldf => {
op_flags => [ "uses_memory" ],
state => "exc_pinned",
constructors => {
s => { out_reqs => [ "fp", "none" ] },
d => { out_reqs => [ "fp:a|2", "none" ] },
q => { out_reqs => [ "fp:a|4", "none" ] },
s => { out_reqs => [ "cls-fp", "none" ] },
d => { out_reqs => [ "cls-fp:a|2", "none" ] },
q => { out_reqs => [ "cls-fp:a|4", "none" ] },
},
in_reqs => [ "gp", "none" ],
ins => [ "ptr", "mem" ],
......@@ -832,9 +832,9 @@ Stf => {
op_flags => [ "uses_memory" ],
state => "exc_pinned",
constructors => {
s => { in_reqs => [ "fp", "gp", "none" ] },
d => { in_reqs => [ "fp:a|2", "gp", "none" ] },
q => { in_reqs => [ "fp:a|4", "gp", "none" ] },
s => { in_reqs => [ "cls-fp", "gp", "none" ] },
d => { in_reqs => [ "cls-fp:a|2", "gp", "none" ] },
q => { in_reqs => [ "cls-fp:a|4", "gp", "none" ] },
},
out_reqs => [ "none" ],
ins => [ "val", "ptr", "mem" ],
......
......@@ -41,7 +41,7 @@
DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
static const arch_register_t *sp_reg = &sparc_registers[REG_SP];
static const arch_register_t *fp_reg = &sparc_registers[REG_FRAME_POINTER];
static const arch_register_t *fp_reg = &sparc_registers[REG_FP];
static calling_convention_t *current_cconv = NULL;
static be_stackorder_t *stackorder;
static ir_mode *mode_gp;
......@@ -521,10 +521,10 @@ static ir_node *gen_ASM(ir_node *node)
continue;
if (strcmp(clobber, "cc") == 0) {
const arch_register_t *flags_reg
= &sparc_registers[REG_FLAGS];
= &sparc_registers[REG_PSR];
out_reg_reqs[out_idx++] = flags_reg->single_req;
const arch_register_t *fpflags_reg
= &sparc_registers[REG_FPFLAGS];
= &sparc_registers[REG_FSR];
out_reg_reqs[out_idx++] = fpflags_reg->single_req;
continue;
}
......@@ -885,7 +885,7 @@ static ir_node *gen_AddCC_t(ir_node *node)
ir_node *new_node = gen_helper_binop_args(node, left, right,
MATCH_COMMUTATIVE | MATCH_MODE_NEUTRAL,
new_bd_sparc_AddCC_reg, new_bd_sparc_AddCC_imm);
arch_set_irn_register_out(new_node, pn_sparc_AddCC_flags, &sparc_registers[REG_FLAGS]);
arch_set_irn_register_out(new_node, pn_sparc_AddCC_flags, &sparc_registers[REG_PSR]);
return new_node;
}
......@@ -936,7 +936,7 @@ static ir_node *gen_SubCC_t(ir_node *node)
ir_node *right = get_irn_n(node, n_sparc_SubCC_t_right);
ir_node *new_node = gen_helper_binop_args(node, left, right, MATCH_MODE_NEUTRAL,
new_bd_sparc_SubCC_reg, new_bd_sparc_SubCC_imm);
arch_set_irn_register_out(new_node, pn_sparc_SubCC_flags, &sparc_registers[REG_FLAGS]);
arch_set_irn_register_out(new_node, pn_sparc_SubCC_flags, &sparc_registers[REG_PSR]);
return new_node;
}
......@@ -1512,7 +1512,7 @@ static ir_node *gen_Cmp(ir_node *node)
new_bd_sparc_AndNCCZero_reg,
new_bd_sparc_AndNCCZero_imm,
MATCH_NONE);
arch_set_irn_register(new_node, &sparc_registers[REG_FLAGS]);
arch_set_irn_register(new_node, &sparc_registers[REG_PSR]);
return new_node;
} else if (is_Or(op1)) {
ir_node *new_node = gen_helper_bitop(op1,
......@@ -1521,7 +1521,7 @@ static ir_node *gen_Cmp(ir_node *node)
new_bd_sparc_OrNCCZero_reg,
new_bd_sparc_OrNCCZero_imm,
MATCH_NONE);
arch_set_irn_register(new_node, &sparc_registers[REG_FLAGS]);
arch_set_irn_register(new_node, &sparc_registers[REG_PSR]);
return new_node;
} else if (is_Eor(op1)) {
ir_node *new_node = gen_helper_bitop(op1,
......@@ -1530,13 +1530,13 @@ static ir_node *gen_Cmp(ir_node *node)
new_bd_sparc_XNorCCZero_reg,
new_bd_sparc_XNorCCZero_imm,
MATCH_NONE);
arch_set_irn_register(new_node, &sparc_registers[REG_FLAGS]);
arch_set_irn_register(new_node, &sparc_registers[REG_PSR]);
return new_node;
} else if (is_Mul(op1)) {
ir_node *new_node = gen_helper_binop(op1, MATCH_COMMUTATIVE,
new_bd_sparc_MulCCZero_reg,
new_bd_sparc_MulCCZero_imm);
arch_set_irn_register(new_node, &sparc_registers[REG_FLAGS]);
arch_set_irn_register(new_node, &sparc_registers[REG_PSR]);
return new_node;
}
}
......@@ -2792,8 +2792,8 @@ void sparc_transform_graph(ir_graph *irg)
mode_fp = sparc_reg_classes[CLASS_sparc_fp].mode;
mode_fp2 = mode_D;
//mode_fp4 = ?
mode_flags = sparc_reg_classes[CLASS_sparc_flags_class].mode;
assert(sparc_reg_classes[CLASS_sparc_fpflags_class].mode == mode_flags);
mode_flags = sparc_reg_classes[CLASS_sparc_flags].mode;
assert(sparc_reg_classes[CLASS_sparc_fpflags].mode == mode_flags);
frame_base = NULL;
......
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