Commit 3597c72f authored by Tobias Rapp's avatar Tobias Rapp
Browse files

amd64: Remove unnecessary amd64_common_transform module

parent d8eb4a1d
/*
* Copyright (C) 1995-2012 University of Karlsruhe. All right reserved.
*
* This file is part of libFirm.
*
* This file may be distributed and/or modified under the terms of the
* GNU General Public License version 2 as published by the Free Software
* Foundation and appearing in the file LICENSE.GPL included in the
* packaging of this file.
*
* Licensees holding valid libFirm Professional Edition licenses may use
* this file in accordance with the libFirm Commercial License.
* Agreement provided with the Software.
*
* This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
* WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE.
*/
/**
* @file
* @brief This file implements functions to finalize the irg for emit.
*/
#include "amd64_common_transform.h"
#include "debug.h"
#include "panic.h"
#include "heights.h"
#include "ircons.h"
#include "irgmod.h"
#include "irgraph_t.h"
#include "irmode_t.h"
#include "irnode_t.h"
#include "iropt_t.h"
#include "tv_t.h"
#include "util.h"
#include "benode.h"
#include "bearch_amd64_t.h"
#include "beirg.h"
#include "amd64_new_nodes.h"
#include "amd64_nodes_attr.h"
static const arch_register_req_t *mem_reqs[] = {
&arch_no_requirement,
};
amd64_insn_mode_t get_insn_mode_from_mode(const ir_mode *mode)
{
switch (get_mode_size_bits(mode)) {
case 8: return INSN_MODE_8;
case 16: return INSN_MODE_16;
case 32: return INSN_MODE_32;
case 64: return INSN_MODE_64;
}
panic("unexpected mode");
}
ir_entity *create_float_const_entity(ir_graph *const irg,
ir_tarval *const tv)
{
const arch_env_t *arch_env = be_get_irg_arch_env(irg);
amd64_isa_t *isa = (amd64_isa_t*) arch_env;
ir_entity *entity = pmap_get(ir_entity, isa->constants, tv);
if (entity != NULL)
return entity;
ir_mode *mode = get_tarval_mode(tv);
ir_type *type = get_type_for_mode(mode);
ir_type *glob = get_glob_type();
entity = new_entity(glob, id_unique("C%u"), type);
set_entity_visibility(entity, ir_visibility_private);
add_entity_linkage(entity, IR_LINKAGE_CONSTANT);
ir_initializer_t *initializer = create_initializer_tarval(tv);
set_entity_initializer(entity, initializer);
pmap_insert(isa->constants, tv, entity);
return entity;
}
ir_node *create_float_const(dbg_info *dbgi, ir_node *block,
ir_tarval *tv)
{
ir_graph *irg = get_irn_irg(block);
ir_mode *tv_mode = get_tarval_mode(tv);
ir_entity *entity = create_float_const_entity(irg, tv);
ir_node *nomem = get_irg_no_mem(irg);
ir_node *in[] = { nomem };
amd64_addr_t addr;
memset(&addr, 0, sizeof(addr));
addr.immediate.entity = entity;
amd64_insn_mode_t insn_mode = get_insn_mode_from_mode(tv_mode);
addr.base_input = NO_INPUT;
addr.index_input = NO_INPUT;
ir_node *load = new_bd_amd64_xMovs(dbgi, block, ARRAY_SIZE(in), in,
insn_mode, AMD64_OP_ADDR, addr);
arch_set_irn_register_reqs_in(load, mem_reqs);
set_irn_pinned(load, op_pin_state_floats);
return new_r_Proj(load, tv_mode, pn_amd64_xMovs_res);
}
ir_tarval *create_sign_tv(ir_mode *mode)
{
unsigned size = get_mode_size_bits(mode);
ir_tarval *tv;
if (size == 32) {
tv = get_mode_one(mode_Iu);
tv = tarval_shl_unsigned(tv, 31);
} else {
assert(size == 64);
tv = get_mode_one(mode_Lu);
tv = tarval_shl_unsigned(tv, 63);
}
return tarval_bitcast(tv, mode);
}
/*
* This file is part of libFirm.
* Copyright (C) 2012 University of Karlsruhe.
*/
/**
* @file
* @brief This file implements the common parts of IR transformation from
* firm into amd64-Firm.
* @author Tobias Rapp
*/
#ifndef FIRM_BE_AMD64_AMD64_COMMON_TRANSFORM_H
#define FIRM_BE_AMD64_AMD64_COMMON_TRANSFORM_H
#include "firm_types.h"
#include "bearch_amd64_t.h"
#include "amd64_nodes_attr.h"
/** Constructs an amd64_insn_mode_t from an ir_mode.
*/
amd64_insn_mode_t get_insn_mode_from_mode(const ir_mode *mode);
/** Creates an entity for a constant floating point value.
*/
ir_entity *create_float_const_entity(ir_graph *const irg,
ir_tarval *const tv);
/** Creates an amd64 floating point constant from a given tarval.
*/
ir_node *create_float_const(dbg_info *dbgi, ir_node *block,
ir_tarval *tv);
/** Creates a tarval with the given mode and only
* the most-significant (first) bit set.
*
* @param mode The mode of the resulting tarval, which lso decides
* between 32 and 64 bit long tarval.
*/
ir_tarval *create_sign_tv(ir_mode *mode);
#endif
......@@ -21,10 +21,10 @@
* @file
* @brief This file implements functions to finalize the irg for emit.
*/
#include "amd64_common_transform.h"
#include "amd64_finish.h"
#include "amd64_new_nodes.h"
#include "amd64_nodes_attr.h"
#include "amd64_transform.h"
#include "bearch.h"
#include "benode.h"
#include "besched.h"
......
......@@ -28,7 +28,6 @@
#include "besched.h"
#include "amd64_cconv.h"
#include "amd64_common_transform.h"
#include "amd64_new_nodes.h"
#include "amd64_nodes_attr.h"
#include "amd64_transform.h"
......@@ -297,6 +296,83 @@ static ir_node *get_frame_base(ir_graph *irg)
}
}
static amd64_insn_mode_t get_insn_mode_from_mode(const ir_mode *mode)
{
switch (get_mode_size_bits(mode)) {
case 8: return INSN_MODE_8;
case 16: return INSN_MODE_16;
case 32: return INSN_MODE_32;
case 64: return INSN_MODE_64;
}
panic("unexpected mode");
}
ir_entity *create_float_const_entity(ir_graph *const irg,
ir_tarval *const tv)
{
const arch_env_t *arch_env = be_get_irg_arch_env(irg);
amd64_isa_t *isa = (amd64_isa_t*) arch_env;
ir_entity *entity = pmap_get(ir_entity, isa->constants, tv);
if (entity != NULL)
return entity;
ir_mode *mode = get_tarval_mode(tv);
ir_type *type = get_type_for_mode(mode);
ir_type *glob = get_glob_type();
entity = new_entity(glob, id_unique("C%u"), type);
set_entity_visibility(entity, ir_visibility_private);
add_entity_linkage(entity, IR_LINKAGE_CONSTANT);
ir_initializer_t *initializer = create_initializer_tarval(tv);
set_entity_initializer(entity, initializer);
pmap_insert(isa->constants, tv, entity);
return entity;
}
static ir_node *create_float_const(dbg_info *dbgi, ir_node *block,
ir_tarval *tv)
{
ir_graph *irg = get_irn_irg(block);
ir_mode *tv_mode = get_tarval_mode(tv);
ir_entity *entity = create_float_const_entity(irg, tv);
ir_node *nomem = get_irg_no_mem(irg);
ir_node *in[] = { nomem };
amd64_addr_t addr;
memset(&addr, 0, sizeof(addr));
addr.immediate.entity = entity;
amd64_insn_mode_t insn_mode = get_insn_mode_from_mode(tv_mode);
addr.base_input = NO_INPUT;
addr.index_input = NO_INPUT;
ir_node *load = new_bd_amd64_xMovs(dbgi, block, ARRAY_SIZE(in), in,
insn_mode, AMD64_OP_ADDR, addr);
arch_set_irn_register_reqs_in(load, mem_reqs);
set_irn_pinned(load, op_pin_state_floats);
return new_r_Proj(load, tv_mode, pn_amd64_xMovs_res);
}
ir_tarval *create_sign_tv(ir_mode *mode)
{
unsigned size = get_mode_size_bits(mode);
ir_tarval *tv;
if (size == 32) {
tv = get_mode_one(mode_Iu);
tv = tarval_shl_unsigned(tv, 31);
} else {
assert(size == 64);
tv = get_mode_one(mode_Lu);
tv = tarval_shl_unsigned(tv, 63);
}
return tarval_bitcast(tv, mode);
}
static ir_node *gen_Const(ir_node *node)
{
ir_node *block = be_transform_node(get_nodes_block(node));
......
......@@ -21,4 +21,17 @@ void amd64_transform_graph(ir_graph *irg);
ir_node *amd64_new_IncSP(ir_node *block, ir_node *old_sp, int offset,
unsigned align);
/** Creates an entity for a constant floating point value.
*/
ir_entity *create_float_const_entity(ir_graph *const irg,
ir_tarval *const tv);
/** Creates a tarval with the given mode and only
* the most-significant (first) bit set.
*
* @param mode The mode of the resulting tarval, which lso decides
* between 32 and 64 bit long tarval.
*/
ir_tarval *create_sign_tv(ir_mode *mode);
#endif
......@@ -40,7 +40,6 @@
#include "amd64_finish.h"
#include "amd64_new_nodes.h"
#include "gen_amd64_regalloc_if.h"
#include "amd64_common_transform.h"
#include "amd64_transform.h"
#include "amd64_emitter.h"
#include "amd64_cconv.h"
......
Supports Markdown
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment