Commit 39cb5226 authored by Matthias Braun's avatar Matthias Braun
Browse files

- Bigger refactoring and cleanup in backend:

	* benodes store the out register requirements in backend_info now
	  (this is work towards killing the register_requirement callbacks)
	* ir_graph has a pointer to beirg now
	* Other cleanups

[r26540]
parent 65a67751
......@@ -119,9 +119,8 @@ typedef enum {
beo_RegParams,
beo_FrameAddr,
beo_Barrier,
beo_Unwind,
/* last backend node number */
beo_Last = beo_Unwind,
beo_Last = beo_Barrier,
/* first unfixed number. Dynamic node numbers start here */
iro_MaxOpcode
} ir_opcode;
......
......@@ -280,17 +280,13 @@ static void TEMPLATE_done(void *self) {
}
static unsigned TEMPLATE_get_n_reg_class(const void *self)
static unsigned TEMPLATE_get_n_reg_class(void)
{
(void) self;
return N_CLASSES;
}
static const arch_register_class_t *TEMPLATE_get_reg_class(const void *self,
unsigned i)
static const arch_register_class_t *TEMPLATE_get_reg_class(unsigned i)
{
(void) self;
assert(i < N_CLASSES);
return &TEMPLATE_reg_classes[i];
}
......@@ -303,10 +299,8 @@ static const arch_register_class_t *TEMPLATE_get_reg_class(const void *self,
* @param mode The mode in question.
* @return A register class which can hold values of the given mode.
*/
const arch_register_class_t *TEMPLATE_get_reg_class_for_mode(const void *self,
const ir_mode *mode)
const arch_register_class_t *TEMPLATE_get_reg_class_for_mode(const ir_mode *mode)
{
(void) self;
if (mode_is_float(mode))
return &TEMPLATE_reg_classes[CLASS_TEMPLATE_floating_point];
else
......@@ -486,10 +480,9 @@ static const ilp_sched_selector_t *TEMPLATE_get_ilp_sched_selector(
/**
* Returns the necessary byte alignment for storing a register of given class.
*/
static int TEMPLATE_get_reg_class_alignment(const void *self,
const arch_register_class_t *cls) {
static int TEMPLATE_get_reg_class_alignment(const arch_register_class_t *cls)
{
ir_mode *mode = arch_register_class_mode(cls);
(void) self;
return get_mode_size_bytes(mode);
}
......@@ -514,9 +507,8 @@ static const backend_params *TEMPLATE_get_backend_params(void) {
}
static const be_execution_unit_t ***TEMPLATE_get_allowed_execution_units(
const void *self, const ir_node *irn)
const ir_node *irn)
{
(void) self;
(void) irn;
/* TODO */
assert(0);
......@@ -539,17 +531,14 @@ static ir_graph **TEMPLATE_get_backend_irg_list(const void *self,
return NULL;
}
static asm_constraint_flags_t TEMPLATE_parse_asm_constraint(const void *self,
const char **c)
static asm_constraint_flags_t TEMPLATE_parse_asm_constraint(const char **c)
{
(void) self;
(void) c;
return ASM_CONSTRAINT_FLAG_INVALID;
}
static int TEMPLATE_is_valid_clobber(const void *self, const char *clobber)
static int TEMPLATE_is_valid_clobber(const char *clobber)
{
(void) self;
(void) clobber;
return 0;
}
......
......@@ -854,7 +854,7 @@ static ir_node *gen_Load(ir_node *node) {
if (be_get_Proj_for_pn(node, pn_Load_res) == NULL) {
/* add a result proj and a Keep to produce a pseudo use */
ir_node *proj = new_r_Proj(block, new_load, mode_Iu, pn_arm_Load_res);
be_new_Keep(arch_get_irn_reg_class_out(proj), block, 1, &proj);
be_new_Keep(block, 1, &proj);
}
return new_load;
......
......@@ -669,17 +669,14 @@ static void arm_done(void *self) {
* here to speed up register allocation (and makes dumps
* smaller and more readable).
*/
static unsigned arm_get_n_reg_class(const void *self) {
(void) self;
static unsigned arm_get_n_reg_class(void) {
return N_CLASSES;
}
/**
* Return the register class with requested index.
*/
static const arch_register_class_t *arm_get_reg_class(const void *self,
unsigned i) {
(void) self;
static const arch_register_class_t *arm_get_reg_class(unsigned i) {
assert(i < N_CLASSES);
return &arm_reg_classes[i];
}
......@@ -690,8 +687,7 @@ static const arch_register_class_t *arm_get_reg_class(const void *self,
* @param mode The mode in question.
* @return A register class which can hold values of the given mode.
*/
const arch_register_class_t *arm_get_reg_class_for_mode(const void *self, const ir_mode *mode) {
(void) self;
const arch_register_class_t *arm_get_reg_class_for_mode(const ir_mode *mode) {
if (mode_is_float(mode))
return &arm_reg_classes[CLASS_arm_fpa];
else
......@@ -970,15 +966,14 @@ static const ilp_sched_selector_t *arm_get_ilp_sched_selector(const void *self)
/**
* Returns the necessary byte alignment for storing a register of given class.
*/
static int arm_get_reg_class_alignment(const void *self, const arch_register_class_t *cls) {
(void) self;
static int arm_get_reg_class_alignment(const arch_register_class_t *cls)
{
(void) cls;
/* ARM is a 32 bit CPU, no need for other alignment */
return 4;
}
static const be_execution_unit_t ***arm_get_allowed_execution_units(const void *self, const ir_node *irn) {
(void) self;
static const be_execution_unit_t ***arm_get_allowed_execution_units(const ir_node *irn) {
(void) irn;
/* TODO */
panic("Unimplemented arm_get_allowed_execution_units()");
......@@ -1040,17 +1035,15 @@ static int arm_is_psi_allowed(ir_node *sel, ir_node *phi_list, int i, int j) {
return 1;
}
static asm_constraint_flags_t arm_parse_asm_constraint(const void *self, const char **c)
static asm_constraint_flags_t arm_parse_asm_constraint(const char **c)
{
/* asm not supported */
(void) self;
(void) c;
return ASM_CONSTRAINT_FLAG_INVALID;
}
static int arm_is_valid_clobber(const void *self, const char *clobber)
static int arm_is_valid_clobber(const char *clobber)
{
(void) self;
(void) clobber;
return 0;
}
......
......@@ -815,7 +815,7 @@ static ir_node *adjust_call(be_abi_irg_t *env, ir_node *irn, ir_node *curr_sp)
/* create the Keep for the caller save registers */
in = (ir_node **) obstack_finish(obst);
keep = be_new_Keep(NULL, bl, n, in);
keep = be_new_Keep(bl, n, in);
for (i = 0; i < n; ++i) {
const arch_register_t *reg = get_irn_link(in[i]);
be_node_set_reg_class_in(keep, i, reg->reg_class);
......@@ -1208,7 +1208,7 @@ static void process_ops_in_block(ir_node *bl, void *data)
if (curr_sp != env->init_sp &&
!(is_Proj(curr_sp) && be_is_Call(get_Proj_pred(curr_sp)))) {
nodes[0] = curr_sp;
keep = be_new_Keep(env->arch_env->sp->reg_class, bl, 1, nodes);
keep = be_new_Keep(bl, 1, nodes);
pmap_insert(env->keep_map, bl, keep);
}
}
......
......@@ -217,6 +217,7 @@ struct arch_register_t {
const arch_register_class_t *reg_class; /**< The class the register belongs to. */
unsigned index; /**< The index of the register in the class. */
arch_register_type_t type; /**< The type of the register. */
const arch_register_req_t *single_req;
};
static inline const arch_register_class_t *
......@@ -262,6 +263,7 @@ struct arch_register_class_t {
ir_mode *mode; /**< The mode of the register class.*/
const arch_register_t *regs; /**< The array of registers. */
arch_register_class_flags_t flags; /**< register class flags. */
const arch_register_req_t *class_req;
};
/** return the number of registers in this register class */
......@@ -572,14 +574,14 @@ struct arch_isa_if_t {
* Get the the number of register classes in the isa.
* @return The number of register classes.
*/
unsigned (*get_n_reg_class)(const void *self);
unsigned (*get_n_reg_class)(void);
/**
* Get the i-th register class.
* @param i The number of the register class.
* @return The register class.
*/
const arch_register_class_t *(*get_reg_class)(const void *self, unsigned i);
const arch_register_class_t *(*get_reg_class)(unsigned i);
/**
* Get the register class which shall be used to store a value of a given mode.
......@@ -587,7 +589,7 @@ struct arch_isa_if_t {
* @param mode The mode in question.
* @return A register class which can hold values of the given mode.
*/
const arch_register_class_t *(*get_reg_class_for_mode)(const void *self, const ir_mode *mode);
const arch_register_class_t *(*get_reg_class_for_mode)(const ir_mode *mode);
/**
* Get the ABI restrictions for procedure calls.
......@@ -627,7 +629,7 @@ struct arch_isa_if_t {
* @param cls The register class.
* @return The alignment in bytes.
*/
int (*get_reg_class_alignment)(const void *self, const arch_register_class_t *cls);
int (*get_reg_class_alignment)(const arch_register_class_t *cls);
/**
* A "static" function, returns the frontend settings
......@@ -650,7 +652,7 @@ struct arch_isa_if_t {
* NULL
* };
*/
const be_execution_unit_t ***(*get_allowed_execution_units)(const void *self, const ir_node *irn);
const be_execution_unit_t ***(*get_allowed_execution_units)(const ir_node *irn);
/**
* Return the abstract machine for this isa.
......@@ -671,41 +673,41 @@ struct arch_isa_if_t {
/**
* mark node as rematerialized
*/
void (*mark_remat)(const void *self, ir_node *node);
void (*mark_remat)(ir_node *node);
/**
* parse an assembler constraint part and set flags according to its nature
* advances the *c pointer to point to the last parsed character (so if you
* parse a single character don't advance c)
*/
asm_constraint_flags_t (*parse_asm_constraint)(const void *self, const char **c);
asm_constraint_flags_t (*parse_asm_constraint)(const char **c);
/**
* returns true if the string is a valid clobbered (register) in this
* backend
*/
int (*is_valid_clobber)(const void *self, const char *clobber);
int (*is_valid_clobber)(const char *clobber);
};
#define arch_env_done(env) ((env)->impl->done(env))
#define arch_env_handle_intrinsics(env) \
do { if((env)->impl->handle_intrinsics != NULL) (env)->impl->handle_intrinsics(); } while(0)
#define arch_env_get_n_reg_class(env) ((env)->impl->get_n_reg_class(env))
#define arch_env_get_reg_class(env,i) ((env)->impl->get_reg_class(env, i))
#define arch_env_get_reg_class_for_mode(env,mode) ((env)->impl->get_reg_class_for_mode((env), (mode)))
#define arch_env_get_n_reg_class(env) ((env)->impl->get_n_reg_class())
#define arch_env_get_reg_class(env,i) ((env)->impl->get_reg_class(i))
#define arch_env_get_reg_class_for_mode(env,mode) ((env)->impl->get_reg_class_for_mode((mode)))
#define arch_env_get_call_abi(env,tp,abi) ((env)->impl->get_call_abi((env), (tp), (abi)))
#define arch_env_get_code_generator_if(env) ((env)->impl->get_code_generator_if((env)))
#define arch_env_get_list_sched_selector(env,selector) ((env)->impl->get_list_sched_selector((env), (selector)))
#define arch_env_get_ilp_sched_selector(env) ((env)->impl->get_ilp_sched_selector(env))
#define arch_env_get_reg_class_alignment(env,cls) ((env)->impl->get_reg_class_alignment((env), (cls)))
#define arch_env_get_reg_class_alignment(env,cls) ((env)->impl->get_reg_class_alignment((cls)))
#define arch_env_get_params(env) ((env)->impl->get_params())
#define arch_env_get_allowed_execution_units(env,irn) ((env)->impl->get_allowed_execution_units((env), (irn)))
#define arch_env_get_allowed_execution_units(env,irn) ((env)->impl->get_allowed_execution_units((irn)))
#define arch_env_get_machine(env) ((env)->impl->get_machine(env))
#define arch_env_get_backend_irg_list(env,irgs) ((env)->impl->get_backend_irg_list((env), (irgs)))
#define arch_env_parse_asm_constraint(env,c) ((env)->impl->parse_asm_constraint((env), (c))
#define arch_env_is_valid_clobber(env,clobber) ((env)->impl->is_valid_clobber((env), (clobber))
#define arch_env_parse_asm_constraint(env,c) ((env)->impl->parse_asm_constraint((c))
#define arch_env_is_valid_clobber(env,clobber) ((env)->impl->is_valid_clobber((clobber))
#define arch_env_mark_remat(env,node) \
do { if ((env)->impl->mark_remat != NULL) (env)->impl->mark_remat((env), (node)); } while(0)
do { if ((env)->impl->mark_remat != NULL) (env)->impl->mark_remat((node)); } while(0)
/**
* ISA base class.
......
......@@ -516,7 +516,8 @@ static ir_node **create_block_schedule_greedy(ir_graph *irg, ir_exec_freq *execf
coalesce_blocks(&env);
start_entry = finish_block_schedule(&env);
block_list = create_blocksched_array(&env, start_entry, env.blockcount, get_irg_obstack(irg));
block_list = create_blocksched_array(&env, start_entry, env.blockcount,
be_get_birg_obst(irg));
DEL_ARR_F(env.edges);
obstack_free(&obst, NULL);
......@@ -713,7 +714,9 @@ static ir_node **create_block_schedule_ilp(ir_graph *irg, ir_exec_freq *execfreq
coalesce_blocks_ilp(&env);
start_entry = finish_block_schedule(&env.env);
block_list = create_blocksched_array(&env.env, start_entry, env.env.blockcount, get_irg_obstack(irg));
block_list = create_blocksched_array(&env.env, start_entry,
env.env.blockcount,
be_get_birg_obst(irg));
DEL_ARR_F(env.ilpedges);
free_lpp(env.lpp);
......
......@@ -333,7 +333,7 @@ static ir_node *pre_process_constraints(be_chordal_alloc_env_t *alloc_env,
* since ignore-nodes are not Perm'ed.
*/
if (op->has_constraints && is_Proj(proj) && get_Proj_pred(proj) == perm) {
be_set_constr_limited(perm, BE_OUT_POS(get_Proj_proj(proj)), op->req);
be_set_constr_out(perm, get_Proj_proj(proj), op->req);
}
}
......
......@@ -46,7 +46,7 @@ void be_info_new_node(ir_node *node)
if (is_Proj(node)) // Projs need no be info, their tuple holds all information
return;
obst = get_irg_obstack(current_ir_graph);
obst = be_get_birg_obst(current_ir_graph);
info = OALLOCZ(obst, backend_info_t);
if (is_Phi(node)) {
......@@ -59,36 +59,39 @@ void be_info_new_node(ir_node *node)
static void new_Phi_copy_attr(const ir_node *old_node, ir_node *new_node)
{
struct obstack *obst = get_irg_obstack(get_irn_irg(new_node));
backend_info_t *old_info = be_get_info(old_node);
backend_info_t *new_info = be_get_info(new_node);
*new_info = *old_info;
old_phi_copy_attr(old_node, new_node);
new_info->out_infos = DUP_ARR_D(reg_out_info_t, obst, old_info->out_infos);
}
int be_info_equal(const ir_node *node1, const ir_node *node2)
int be_infos_equal(const backend_info_t *info1, const backend_info_t *info2)
{
backend_info_t *info1 = be_get_info(node1);
backend_info_t *info2 = be_get_info(node2);
int len = ARR_LEN(info1->out_infos);
int i;
if (ARR_LEN(info2->out_infos) != len)
return 0;
return false;
for (i = 0; i < len; ++i) {
const reg_out_info_t *out1 = &info1->out_infos[i];
const reg_out_info_t *out2 = &info2->out_infos[i];
if (out1->reg != out2->reg)
return 0;
return false;
if (!reg_reqs_equal(out1->req, out2->req))
return 0;
return false;
}
/* TODO: in reqs */
return true;
}
return 1;
int be_nodes_equal(const ir_node *node1, const ir_node *node2)
{
backend_info_t *info1 = be_get_info(node1);
backend_info_t *info2 = be_get_info(node2);
return be_infos_equal(info1, info2);
}
static void init_walker(ir_node *node, void *data)
......
......@@ -55,8 +55,7 @@ struct backend_info_t {
static inline backend_info_t *be_get_info(const ir_node *node)
{
backend_info_t *info = node->backend_info;
return info;
return (backend_info_t*) node->backend_info;
}
void be_info_init(void);
......@@ -66,6 +65,7 @@ void be_info_new_node(ir_node *node);
void be_info_duplicate(const ir_node *old_node, ir_node *new_node);
int be_info_initialized(const ir_graph *irg);
int be_info_equal(const ir_node *node1, const ir_node *node2);
int be_nodes_equal(const ir_node *node1, const ir_node *node2);
int be_infos_equal(const backend_info_t *info1, const backend_info_t *info2);
#endif
......@@ -70,4 +70,7 @@ void be_free_birg(be_irg_t *birg)
be_liveness_free(birg->lv);
birg->lv = NULL;
}
obstack_free(&birg->obst, NULL);
birg->irg->be_data = NULL;
}
......@@ -30,6 +30,7 @@
#include "be.h"
#include "be_types.h"
#include "be_t.h"
#include "irtypes.h"
be_lv_t *be_assure_liveness(be_irg_t *birg);
......@@ -54,31 +55,46 @@ struct be_irg_t {
ir_exec_freq *exec_freq;
be_dom_front_info_t *dom_front;
be_lv_t *lv;
struct obstack obst; /**< birg obstack (mainly used to keep
register constraints which we can't keep
in the irg obst, because it gets replace
during code selection) */
};
static inline be_lv_t *
be_get_birg_liveness(const be_irg_t *birg) {
static inline be_lv_t *be_get_birg_liveness(const be_irg_t *birg)
{
return birg->lv;
}
static inline ir_exec_freq *
be_get_birg_exec_freq(const be_irg_t *birg) {
static inline ir_exec_freq *be_get_birg_exec_freq(const be_irg_t *birg)
{
return birg->exec_freq;
}
static inline be_dom_front_info_t *
be_get_birg_dom_front(const be_irg_t *birg) {
static inline be_dom_front_info_t *be_get_birg_dom_front(const be_irg_t *birg)
{
return birg->dom_front;
}
static inline ir_graph *
be_get_birg_irg(const be_irg_t *birg) {
static inline ir_graph *be_get_birg_irg(const be_irg_t *birg)
{
return birg->irg;
}
static inline const arch_env_t *
be_get_birg_arch_env(const be_irg_t *birg) {
static inline const arch_env_t *be_get_birg_arch_env(const be_irg_t *birg)
{
return birg->main_env->arch_env;
}
static inline be_irg_t *be_birg_from_irg(const ir_graph *irg)
{
return (be_irg_t*) irg->be_data;
}
static inline struct obstack *be_get_birg_obst(const ir_graph *irg)
{
be_irg_t *birg = be_birg_from_irg(irg);
return &birg->obst;
}
#endif /* FIRM_BE_BEIRG_H */
......@@ -539,7 +539,7 @@ static void gen_assure_different_pattern(ir_node *irn, ir_node *other_different,
in[0] = irn;
in[1] = cpy;
keep = be_new_Keep(cls, block, 2, in);
keep = be_new_Keep(block, 2, in);
}
DB((dbg_constr, LEVEL_1, "created %+F(%+F, %+F)\n\n", keep, irn, cpy));
......@@ -812,11 +812,10 @@ void assure_constraints(be_irg_t *birg) {
/* so we transform unnecessary ones into Keeps. */
foreach_ir_nodeset(&entry->copies, cp, iter) {
if (be_is_CopyKeep(cp) && get_irn_n_edges(cp) < 1) {
const arch_register_class_t *cls = arch_get_irn_reg_class_out(cp);
int n = get_irn_arity(cp);
ir_node *keep;
keep = be_new_Keep(cls, get_nodes_block(cp), n, get_irn_in(cp) + 1);
keep = be_new_Keep(get_nodes_block(cp), n, get_irn_in(cp) + 1);
sched_add_before(cp, keep);
/* Set all ins (including the block) of the CopyKeep BAD to keep the verifier happy. */
......
......@@ -264,7 +264,7 @@ asm_constraint_flags_t be_parse_asm_constraints(const char *constraint)
if (tflags != 0) {
flags |= tflags;
} else {
flags |= isa_if->parse_asm_constraint(isa_if, &c);
flags |= isa_if->parse_asm_constraint(&c);
}
break;
}
......@@ -300,7 +300,7 @@ int be_is_valid_clobber(const char *clobber)
if (strcmp(clobber, "cc") == 0)
return 1;
return isa_if->is_valid_clobber(isa_if, clobber);
return isa_if->is_valid_clobber(clobber);
}
void be_register_isa_if(const char *name, const arch_isa_if_t *isa)
......@@ -448,6 +448,7 @@ static void initialize_birg(be_irg_t *birg, ir_graph *irg, be_main_env_t *env)
memset(birg, 0, sizeof(*birg));
birg->irg = irg;
birg->main_env = env;
obstack_init(&birg->obst);
edges_deactivate_kind(irg, EDGE_KIND_DEP);
edges_activate_kind(irg, EDGE_KIND_DEP);
......@@ -573,6 +574,7 @@ static void be_main_loop(FILE *file_handle, const char *cup_name)
/* First: initialize all birgs */
for(i = 0; i < num_birgs; ++i) {
ir_graph *irg = backend_irg_list ? backend_irg_list[i] : get_irp_irg(i);
irg->be_data = &birgs[i];
initialize_birg(&birgs[i], irg, &env);
}
arch_env_handle_intrinsics(arch_env);
......
This diff is collapsed.
......@@ -56,7 +56,6 @@ extern ir_op *op_be_SubSP;
extern ir_op *op_be_RegParams;
extern ir_op *op_be_FrameAddr;
extern ir_op *op_be_Barrier;
extern ir_op *op_be_Unwind;
/**
* A "symbolic constant" for the size of the stack frame to use with IncSP nodes.
......@@ -141,7 +140,7 @@ void be_Perm_reduce(ir_node *perm, int new_size, int *map);
* Create a new MemPerm node.
*/
ir_node *be_new_MemPerm(const arch_env_t *arch_env, ir_node *bl, int n, ir_node *in[]);
ir_node *be_new_Keep(const arch_register_class_t *cls, ir_node *bl, int arity, ir_node *in[]);
ir_node *be_new_Keep(ir_node *block, int arity, ir_node *in[]);
void be_Keep_add_node(ir_node *keep, const arch_register_class_t *cls, ir_node *node);
......@@ -384,27 +383,6 @@ ir_node *be_new_CopyKeep_single(const arch_register_class_t *cls, ir_node *bl, i
ir_node *be_get_CopyKeep_op(const ir_node *cpy);
void be_set_CopyKeep_op(ir_node *cpy, ir_node *op);
/**
* Position numbers for the be_Unwind inputs.
*/
enum {
be_pos_Unwind_mem = 0, /**< memory input of a be_Unwind node */
be_pos_Unwind_sp = 1, /**< stack pointer input of a be_Unwind node */
};
/**
* Construct a new be_Unwind.
*
* @param dbg debug info
* @param bl the block where the new node will be placed
* @param mem the memory input
* @param sp the stack pointer input
*/
ir_node *be_new_Unwind(dbg_info *dbg, ir_node *bl, ir_node *mem, ir_node *sp);
ir_node *be_get_Unwind_mem(const ir_node *irn);
ir_node *be_get_Unwind_sp(const ir_node *irn);
/**
* Get the backend opcode of a backend node.
* @param irn The node.
......@@ -457,7 +435,8 @@ void be_set_constr_single_reg_out(ir_node *irn, int pos,
* @param pos The position (@see be_set_constr_single_reg()).
* @param req The register requirements which shall be transferred.
*/
void be_set_constr_limited(ir_node *irn, int pos, const arch_register_req_t *req);
void be_set_constr_in(ir_node *irn, int pos, const arch_register_req_t *req);
void be_set_constr_out(ir_node *irn, int pos, const arch_register_req_t *req);
/**
* Set the register class of a node.
......@@ -495,6 +474,5 @@ static inline int be_is_SubSP (const ir_node *irn) { return get_irn_opcode(ir
static inline int be_is_RegParams(const ir_node *irn) { return get_irn_opcode(irn) == beo_RegParams; }
static inline int be_is_FrameAddr(const ir_node *irn) { return get_irn_opcode(irn) == beo_FrameAddr; }
static inline int be_is_Barrier (const ir_node *irn) { return get_irn_opcode(irn) == beo_Barrier ; }
static inline int be_is_Unwind (const ir_node *irn) { return get_irn_opcode(irn) == beo_Unwind ; }
#endif /* FIRM_BE_BENODE_T_H */
......@@ -23,7 +23,6 @@
* @author Matthias Braun
* @version $Id$
*/
#ifndef BEPEEPHOLE_H
#define BEPEEPHOLE_H
......
......@@ -330,8 +330,6 @@ static ir_node *gen_Block(ir_node *node) {
ir_node *macroblock = get_Block_MacroBlock(node);
ir_node *block;
/* we use the old blocks for now, because jumps allow cycles in the graph
* we have to fix this later */
block = new_ir_node(dbgi, irg, NULL, get_irn_op(node), get_irn_mode(node),
get_irn_arity(node), get_irn_in(node) + 1);
copy_node_attr(node, block);
......