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Zwinkau
libfirm
Commits
3c80f7a8
Commit
3c80f7a8
authored
Feb 27, 2007
by
Matthias Braun
Browse files
fix some ia32_finish routines not setting ls_mode for xmm nodes
parent
ae2876bb
Changes
4
Hide whitespace changes
Inline
Side-by-side
ir/be/ia32/ia32_emitter.c
View file @
3c80f7a8
...
...
@@ -382,23 +382,33 @@ void ia32_emit_x87_mode_suffix(ia32_emit_env_t *env, const ir_node *node)
ia32_emit_mode_suffix
(
env
,
mode
);
}
static
char
get_xmm_mode_suffix
(
ir_mode
*
mode
)
{
assert
(
mode_is_float
(
mode
));
switch
(
get_mode_size_bits
(
mode
))
{
case
32
:
return
's'
;
case
64
:
return
'd'
;
default:
assert
(
0
);
}
return
'%'
;
}
void
ia32_emit_xmm_mode_suffix
(
ia32_emit_env_t
*
env
,
const
ir_node
*
node
)
{
ir_mode
*
mode
=
get_ia32_ls_mode
(
node
);
assert
(
mode
!=
NULL
);
ia32_emit_char
(
env
,
's'
);
if
(
mode
!=
NULL
)
{
assert
(
mode_is_float
(
mode
));
switch
(
get_mode_size_bits
(
mode
))
{
case
32
:
ia32_emit_char
(
env
,
's'
);
break
;
case
64
:
ia32_emit_char
(
env
,
'd'
);
break
;
default:
assert
(
0
);
}
}
ia32_emit_char
(
env
,
get_xmm_mode_suffix
(
mode
));
}
void
ia32_emit_xmm_mode_suffix_s
(
ia32_emit_env_t
*
env
,
const
ir_node
*
node
)
{
ir_mode
*
mode
=
get_ia32_ls_mode
(
node
);
assert
(
mode
!=
NULL
);
ia32_emit_char
(
env
,
get_xmm_mode_suffix
(
mode
));
}
void
ia32_emit_extend_suffix
(
ia32_emit_env_t
*
env
,
const
ir_mode
*
mode
)
...
...
ir/be/ia32/ia32_emitter.h
View file @
3c80f7a8
...
...
@@ -51,6 +51,7 @@ void ia32_emit_immediate(ia32_emit_env_t *env, const ir_node *node);
void
ia32_emit_mode_suffix
(
ia32_emit_env_t
*
env
,
const
ir_mode
*
mode
);
void
ia32_emit_x87_mode_suffix
(
ia32_emit_env_t
*
env
,
const
ir_node
*
node
);
void
ia32_emit_xmm_mode_suffix
(
ia32_emit_env_t
*
env
,
const
ir_node
*
node
);
void
ia32_emit_xmm_mode_suffix_s
(
ia32_emit_env_t
*
env
,
const
ir_node
*
node
);
void
ia32_emit_extend_suffix
(
ia32_emit_env_t
*
env
,
const
ir_mode
*
mode
);
void
ia32_emit_binop
(
ia32_emit_env_t
*
env
,
const
ir_node
*
node
);
void
ia32_emit_unop
(
ia32_emit_env_t
*
env
,
const
ir_node
*
node
);
...
...
ir/be/ia32/ia32_finish.c
View file @
3c80f7a8
...
...
@@ -71,7 +71,7 @@ static void ia32_transform_sub_to_neg_add(ir_node *irn, ia32_code_gen_t *cg) {
name
=
ia32_gen_fp_known_const
(
size
==
32
?
ia32_SSIGN
:
ia32_DSIGN
);
set_ia32_am_sc
(
res
,
name
);
set_ia32_op_type
(
res
,
ia32_AddrModeS
);
set_ia32_ls_mode
(
res
,
mode
);
set_ia32_ls_mode
(
res
,
get_ia32_ls_mode
(
irn
)
);
}
else
{
res
=
new_rd_ia32_Neg
(
dbg
,
irg
,
block
,
noreg
,
noreg
,
in2
,
nomem
);
}
...
...
@@ -84,6 +84,7 @@ static void ia32_transform_sub_to_neg_add(ir_node *irn, ia32_code_gen_t *cg) {
if
(
mode_is_float
(
mode
))
{
res
=
new_rd_ia32_xAdd
(
dbg
,
irg
,
block
,
noreg
,
noreg
,
res
,
in1
,
nomem
);
set_ia32_am_support
(
res
,
ia32_am_Source
);
set_ia32_ls_mode
(
res
,
get_ia32_ls_mode
(
irn
));
}
else
{
res
=
new_rd_ia32_Add
(
dbg
,
irg
,
block
,
noreg
,
noreg
,
res
,
in1
,
nomem
);
...
...
ir/be/ia32/ia32_spec.pl
View file @
3c80f7a8
...
...
@@ -201,6 +201,7 @@ $arch = "ia32";
"
M
"
=>
"
${arch}
_emit_mode_suffix(env, get_ia32_ls_mode(node));
",
"
XM
"
=>
"
${arch}
_emit_x87_mode_suffix(env, node);
",
"
XXM
"
=>
"
${arch}
_emit_xmm_mode_suffix(env, node);
",
"
XSD
"
=>
"
${arch}
_emit_xmm_mode_suffix_s(env, node);
",
"
AM
"
=>
"
${arch}
_emit_am(env, node);
",
"
unop
"
=>
"
${arch}
_emit_unop(env, node);
",
"
binop
"
=>
"
${arch}
_emit_binop(env, node);
",
...
...
@@ -979,7 +980,7 @@ if (get_ia32_immop_type(node) == ia32_ImmNone) {
"
irn_flags
"
=>
"
R
",
"
comment
"
=>
"
construct SSE And: And(a, b) = a AND b
",
"
reg_req
"
=>
{
"
in
"
=>
[
"
gp
",
"
gp
",
"
xmm
",
"
xmm
",
"
none
"
],
"
out
"
=>
[
"
in_r3
"
]
},
"
emit
"
=>
'
. andp%X
XM
%binop
',
"
emit
"
=>
'
. andp%X
SD
%binop
',
"
latency
"
=>
3
,
"
units
"
=>
[
"
SSE
"
],
"
mode
"
=>
"
mode_E
",
...
...
@@ -989,7 +990,7 @@ if (get_ia32_immop_type(node) == ia32_ImmNone) {
"
irn_flags
"
=>
"
R
",
"
comment
"
=>
"
construct SSE Or: Or(a, b) = a OR b
",
"
reg_req
"
=>
{
"
in
"
=>
[
"
gp
",
"
gp
",
"
xmm
",
"
xmm
",
"
none
"
],
"
out
"
=>
[
"
in_r3
"
]
},
"
emit
"
=>
'
. orp%X
XM
%binop
',
"
emit
"
=>
'
. orp%X
SD
%binop
',
"
units
"
=>
[
"
SSE
"
],
"
mode
"
=>
"
mode_E
",
},
...
...
@@ -998,7 +999,7 @@ if (get_ia32_immop_type(node) == ia32_ImmNone) {
"
irn_flags
"
=>
"
R
",
"
comment
"
=>
"
construct SSE Xor: Xor(a, b) = a XOR b
",
"
reg_req
"
=>
{
"
in
"
=>
[
"
gp
",
"
gp
",
"
xmm
",
"
xmm
",
"
none
"
],
"
out
"
=>
[
"
in_r3
"
]
},
"
emit
"
=>
'
. xorp%X
XM
%binop
',
"
emit
"
=>
'
. xorp%X
SD
%binop
',
"
latency
"
=>
3
,
"
units
"
=>
[
"
SSE
"
],
"
mode
"
=>
"
mode_E
",
...
...
@@ -1010,7 +1011,7 @@ if (get_ia32_immop_type(node) == ia32_ImmNone) {
"
irn_flags
"
=>
"
R
",
"
comment
"
=>
"
construct SSE AndNot: AndNot(a, b) = a AND NOT b
",
"
reg_req
"
=>
{
"
in
"
=>
[
"
gp
",
"
gp
",
"
xmm
",
"
xmm
",
"
none
"
],
"
out
"
=>
[
"
in_r3 !in_r4
"
]
},
"
emit
"
=>
'
. andnp%X
XM
%binop
',
"
emit
"
=>
'
. andnp%X
SD
%binop
',
"
latency
"
=>
3
,
"
units
"
=>
[
"
SSE
"
],
"
mode
"
=>
"
mode_E
",
...
...
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