Nobody cares what a "normal" node is, so do not try to identify one.

[r22796]

ir/be/TEMPLATE/bearch_TEMPLATE.c

@@ -162,9 +162,6 @@ static arch_irn_class_t TEMPLATE_classify(const ir_node *irn)
 	if (is_cfop(irn)) {
 		return arch_irn_class_branch;
 	}
-	else if (is_TEMPLATE_irn(irn)) {
-		return arch_irn_class_normal;
-	}
 
 	return 0;
 }

ir/be/arm/bearch_arm.c

@@ -189,9 +189,6 @@ static arch_irn_class_t arm_classify(const ir_node *irn)
 	if (is_cfop(irn)) {
 		return arch_irn_class_branch;
 	}
-	else if (is_arm_irn(irn)) {
-		return arch_irn_class_normal;
-	}
 
 	return 0;
 }

ir/be/bearch.h

@@ -90,17 +90,16 @@ extern char *arch_register_req_format(char *buf, size_t len, const arch_register
  * Certain node classes which are relevant for the register allocator.
  */
 typedef enum arch_irn_class_t {
-	arch_irn_class_normal     = 1 << 0,
-	arch_irn_class_spill      = 1 << 1,
-	arch_irn_class_reload     = 1 << 2,
-	arch_irn_class_remat      = 1 << 3,
-	arch_irn_class_copy       = 1 << 4,
-	arch_irn_class_perm       = 1 << 5,
-	arch_irn_class_branch     = 1 << 6,
-	arch_irn_class_call       = 1 << 7,
-	arch_irn_class_load       = 1 << 8,
-	arch_irn_class_store      = 1 << 9,
-	arch_irn_class_stackparam = 1 << 10,
+	arch_irn_class_spill      = 1 << 0,
+	arch_irn_class_reload     = 1 << 1,
+	arch_irn_class_remat      = 1 << 2,
+	arch_irn_class_copy       = 1 << 3,
+	arch_irn_class_perm       = 1 << 4,
+	arch_irn_class_branch     = 1 << 5,
+	arch_irn_class_call       = 1 << 6,
+	arch_irn_class_load       = 1 << 7,
+	arch_irn_class_store      = 1 << 8,
+	arch_irn_class_stackparam = 1 << 9,
 } arch_irn_class_t;
 
 /**

ir/be/benode.c

@@ -1155,7 +1155,7 @@ restart:
 			goto restart;
 			break;
 		default:
-			return arch_irn_class_normal;
+			return 0;
 	}
 
 	return 0;
@@ -1374,7 +1374,7 @@ static const arch_register_t *phi_get_irn_reg(const ir_node *irn)
 static arch_irn_class_t phi_classify(const ir_node *irn)
 {
 	(void) irn;
-	return arch_irn_class_normal;
+	return 0;
 }
 
 static arch_irn_flags_t phi_get_flags(const ir_node *irn)

ir/be/ia32/bearch_ia32.c

@@ -297,7 +297,7 @@ static const arch_register_t *ia32_get_irn_reg(const ir_node *irn)
 }
 
 static arch_irn_class_t ia32_classify(const ir_node *irn) {
-	arch_irn_class_t classification = arch_irn_class_normal;
+	arch_irn_class_t classification = 0;
 
 	irn = skip_Proj_const(irn);
 
@@ -305,7 +305,7 @@ static arch_irn_class_t ia32_classify(const ir_node *irn) {
 		classification |= arch_irn_class_branch;
 
 	if (! is_ia32_irn(irn))
-		return classification & ~arch_irn_class_normal;
+		return classification;
 
 	if (is_ia32_Ld(irn))
 		classification |= arch_irn_class_load;

ir/be/mips/bearch_mips.c

@@ -190,8 +190,6 @@ static arch_irn_class_t mips_classify(const ir_node *irn)
 
 	if (is_cfop(irn)) {
 		return arch_irn_class_branch;
-	} else if (is_mips_irn(irn)) {
-		return arch_irn_class_normal;
 	}
 
 	return 0;

ir/be/ppc32/bearch_ppc32.c

@@ -197,9 +197,6 @@ static arch_irn_class_t ppc32_classify(const ir_node *irn)
 	if (is_cfop(irn)) {
 		return arch_irn_class_branch;
 	}
-	else if (is_ppc32_irn(irn)) {
-		return arch_irn_class_normal;
-	}
 
 	return 0;
 }