Commit 4664780a authored by Matthias Braun's avatar Matthias Braun
Browse files

be: merge finish_graph() and emit() callback

- The backends can simply perform the finish_graph() steps in the emit()
  phase.
parent ea051bcf
......@@ -253,10 +253,7 @@ static void TEMPLATE_gen_labels(ir_node *block, void *env)
}
}
/**
* Main driver
*/
void TEMPLATE_emit_routine(ir_graph *irg)
void TEMPLATE_emit_function(ir_graph *irg)
{
ir_node **block_schedule;
ir_entity *entity = get_irg_entity(irg);
......
......@@ -36,6 +36,6 @@
*/
void TEMPLATE_emitf(const ir_node *node, const char *format, ...);
void TEMPLATE_emit_routine(ir_graph *irg);
void TEMPLATE_emit_function(ir_graph *irg);
#endif
......@@ -89,13 +89,15 @@ static void TEMPLATE_prepare_graph(ir_graph *irg)
/**
* Called immediatly before emit phase.
* Last touchups and emitting of the generated code of a function.
*/
static void TEMPLATE_finish_irg(ir_graph *irg)
static void TEMPLATE_emit(ir_graph *irg)
{
/* fix stack entity offsets */
be_abi_fix_stack_nodes(irg);
be_abi_fix_stack_bias(irg);
/* emit code */
TEMPLATE_emit_function(irg);
}
......@@ -330,8 +332,7 @@ const arch_isa_if_t TEMPLATE_isa_if = {
NULL, /* handle intrinsics */
TEMPLATE_prepare_graph,
TEMPLATE_before_ra,
TEMPLATE_finish_irg,
TEMPLATE_emit_routine,
TEMPLATE_emit,
};
BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_TEMPLATE)
......
......@@ -668,10 +668,7 @@ static void amd64_gen_labels(ir_node *block, void *env)
}
}
/**
* Main driver
*/
void amd64_gen_routine(ir_graph *irg)
void amd64_emit_function(ir_graph *irg)
{
ir_entity *entity = get_irg_entity(irg);
ir_node **blk_sched;
......
......@@ -38,6 +38,6 @@
*/
void amd64_emitf(ir_node const *node, char const *fmt, ...);
void amd64_gen_routine(ir_graph *irg);
void amd64_emit_function(ir_graph *irg);
#endif
......@@ -194,6 +194,9 @@ static void amd64_finish_graph(ir_graph *irg)
/* Fix 2-address code constraints. */
amd64_finish_irg(irg);
/* emit code */
amd64_emit_function(irg);
}
extern const arch_isa_if_t amd64_isa_if;
......@@ -455,7 +458,6 @@ const arch_isa_if_t amd64_isa_if = {
amd64_prepare_graph,
amd64_before_ra,
amd64_finish_graph,
amd64_gen_routine,
};
BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_amd64)
......
......@@ -802,7 +802,7 @@ static int cmp_sym_or_tv(const void *elt, const void *key, size_t size)
return p1->u.generic != p2->u.generic;
}
void arm_gen_routine(ir_graph *irg)
void arm_emit_function(ir_graph *irg)
{
ir_node *last_block = NULL;
ir_entity *entity = get_irg_entity(irg);
......
......@@ -42,7 +42,7 @@
*/
void arm_emitf(const ir_node *node, const char *format, ...);
void arm_gen_routine(ir_graph *irg);
void arm_emit_function(ir_graph *irg);
void arm_init_emitter(void);
......
......@@ -213,10 +213,7 @@ static void arm_after_ra_walker(ir_node *block, void *data)
}
}
/**
* Called immediately before emit phase.
*/
static void arm_finish_irg(ir_graph *irg)
static void arm_emit(ir_graph *irg)
{
be_stack_layout_t *stack_layout = be_get_irg_stack_layout(irg);
bool at_begin = stack_layout->sp_relative ? true : false;
......@@ -234,6 +231,9 @@ static void arm_finish_irg(ir_graph *irg)
/* do peephole optimizations and fix stack offsets */
arm_peephole_optimization(irg);
/* emit code */
arm_emit_function(irg);
}
static void arm_before_ra(ir_graph *irg)
......@@ -473,8 +473,7 @@ const arch_isa_if_t arm_isa_if = {
arm_handle_intrinsics, /* handle_intrinsics */
arm_prepare_graph,
arm_before_ra,
arm_finish_irg,
arm_gen_routine,
arm_emit,
};
BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_arm)
......
......@@ -470,14 +470,9 @@ struct arch_isa_if_t {
void (*before_ra)(ir_graph *irg);
/**
* Called directly before done is called. This should be the last place
* where the irg is modified.
*/
void (*finish_graph)(ir_graph *irg);
/**
* Called after everything happened. This call should emit the final
* assembly code but avoid changing the irg.
* Last step in the backend. Called after register allocation.
* May perform peephole optimizations and legalizations and finally emit
* the code.
*/
void (*emit)(ir_graph *irg);
};
......
......@@ -604,34 +604,18 @@ static void be_main_loop(FILE *file_handle, const char *cup_name)
be_dump(DUMP_RA, irg, "ra");
be_timer_push(T_FINISH);
if (arch_env->impl->finish_graph != NULL)
arch_env->impl->finish_graph(irg);
be_timer_pop(T_FINISH);
be_dump(DUMP_FINAL, irg, "finish");
if (stat_ev_enabled) {
stat_ev_ull("bemain_insns_finish", be_count_insns(irg));
stat_ev_ull("bemain_blocks_finish", be_count_blocks(irg));
}
/* check schedule and register allocation */
if (be_options.do_verify) {
be_timer_push(T_VERIFY);
irg_verify(irg, VERIFY_ENFORCE_SSA);
be_verify_schedule(irg);
be_verify_register_allocation(irg);
be_timer_pop(T_VERIFY);
}
/* emit assembler code */
be_timer_push(T_EMIT);
if (arch_env->impl->emit != NULL)
arch_env->impl->emit(irg);
be_timer_pop(T_EMIT);
be_dump(DUMP_FINAL, irg, "end");
if (stat_ev_enabled) {
stat_ev_ull("bemain_insns_finish", be_count_insns(irg));
stat_ev_ull("bemain_blocks_finish", be_count_blocks(irg));
}
be_dump(DUMP_FINAL, irg, "final");
restore_optimization_state(&state);
......
......@@ -1010,13 +1010,13 @@ static void introduce_prolog_epilog(ir_graph *irg)
}
}
/**
* Last touchups for the graph before emit: x87 simulation to replace the
* virtual with real x87 instructions, creating a block schedule and peephole
* optimisations.
*/
static void ia32_finish_graph(ir_graph *irg)
static void ia32_emit(ir_graph *irg)
{
/*
* Last touchups for the graph before emit: x87 simulation to replace the
* virtual with real x87 instructions, creating a block schedule and
* peephole optimisations.
*/
ia32_irg_data_t *irg_data = ia32_get_irg_data(irg);
be_stack_layout_t *stack_layout = be_get_irg_stack_layout(irg);
bool at_begin = stack_layout->sp_relative ? true : false;
......@@ -1051,18 +1051,12 @@ static void ia32_finish_graph(ir_graph *irg)
/* create block schedule, this also removes empty blocks which might
* produce critical edges */
irg_data->blk_sched = be_create_block_schedule(irg);
}
/**
* Emits the code, closes the output file and frees
* the code generator interface.
*/
static void ia32_emit(ir_graph *irg)
{
/* emit the code */
if (ia32_cg_config.emit_machcode) {
ia32_gen_binary_routine(irg);
ia32_emit_function_binary(irg);
} else {
ia32_gen_routine(irg);
ia32_emit_function(irg);
}
}
......@@ -1904,7 +1898,6 @@ const arch_isa_if_t ia32_isa_if = {
NULL,
ia32_prepare_graph,
ia32_before_ra, /* before register allocation hook */
ia32_finish_graph, /* called before codegen */
ia32_emit, /* emit && done */
};
......
......@@ -1657,7 +1657,7 @@ static parameter_dbg_info_t *construct_parameter_infos(ir_graph *irg)
/**
* Main driver. Emits the code for one routine.
*/
void ia32_gen_routine(ir_graph *irg)
void ia32_emit_function(ir_graph *irg)
{
ir_entity *entity = get_irg_entity(irg);
exc_entry *exc_list = NEW_ARR_F(exc_entry, 0);
......@@ -3395,7 +3395,7 @@ static void gen_binary_block(ir_node *block)
}
}
void ia32_gen_binary_routine(ir_graph *irg)
void ia32_emit_function_binary(ir_graph *irg)
{
ir_entity *entity = get_irg_entity(irg);
const arch_env_t *arch_env = be_get_irg_arch_env(irg);
......
......@@ -48,8 +48,8 @@
*/
void ia32_emitf(ir_node const *node, char const *fmt, ...);
void ia32_gen_routine(ir_graph *irg);
void ia32_gen_binary_routine(ir_graph *irg);
void ia32_emit_function(ir_graph *irg);
void ia32_emit_function_binary(ir_graph *irg);
/** Initializes the Emitter. */
void ia32_init_emitter(void);
......
......@@ -191,6 +191,12 @@ static void sparc_prepare_graph(ir_graph *irg)
be_dump(DUMP_BE, irg, "code-selection");
}
static void sparc_emit(ir_graph *irg)
{
sparc_finish_graph(irg);
sparc_emit_function(irg);
}
static bool sparc_modifies_flags(const ir_node *node)
{
be_foreach_out(node, o) {
......@@ -640,8 +646,7 @@ const arch_isa_if_t sparc_isa_if = {
sparc_handle_intrinsics,
sparc_prepare_graph,
sparc_before_ra,
sparc_finish_graph,
sparc_emit_routine,
sparc_emit,
};
BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_sparc)
......
......@@ -1493,7 +1493,7 @@ static void pick_delay_slots(size_t n_blocks, ir_node **blocks)
}
}
void sparc_emit_routine(ir_graph *irg)
void sparc_emit_function(ir_graph *irg)
{
heights = heights_new(irg);
delay_slot_fillers = rbitset_malloc(get_irg_last_idx(irg));
......
......@@ -45,7 +45,7 @@
*/
void sparc_emitf(ir_node const *node, char const *fmt, ...);
void sparc_emit_routine(ir_graph *irg);
void sparc_emit_function(ir_graph *irg);
void sparc_init_emitter(void);
......
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment