Skip to content

GitLab

Commit 474447c7 authored by Matthias Braun's avatar Matthias Braun
Browse files

bearch: rework must_be_different constraint 

- Rename other_different field to must_be_different
- Remove arch_register_req_type_must_be_different, it's enough to see
  if the must_be_different field is not zero.
parent c15ec959
Hide whitespace changes
Inline Side-by-side
ir/be/amd64/amd64_transform.c
View file @ 474447c7
......@@ -109,39 +109,39 @@ const x86_asm_constraint_list_t amd64_asm_constraints = {
#define BIT(x) (1u << x)
static const arch_register_req_t amd64_requirement_gp_same_0 = {
.cls = &amd64_reg_classes[CLASS_amd64_gp],
.limited = NULL,
.type = arch_register_req_type_none,
.should_be_same = BIT(0),
.other_different = 0,
.width = 1,
.cls = &amd64_reg_classes[CLASS_amd64_gp],
.limited = NULL,
.type = arch_register_req_type_none,
.should_be_same = BIT(0),
.must_be_different = 0,
.width = 1,
};
static const arch_register_req_t amd64_requirement_xmm_same_0 = {
.cls = &amd64_reg_classes[CLASS_amd64_xmm],
.limited = NULL,
.type = arch_register_req_type_none,
.should_be_same = BIT(0),
.other_different = 0,
.width = 1,
.cls = &amd64_reg_classes[CLASS_amd64_xmm],
.limited = NULL,
.type = arch_register_req_type_none,
.should_be_same = BIT(0),
.must_be_different = 0,
.width = 1,
};
static const arch_register_req_t amd64_requirement_gp_same_0_not_1 = {
.cls = &amd64_reg_classes[CLASS_amd64_gp],
.limited = NULL,
.type = arch_register_req_type_must_be_different,
.should_be_same = BIT(0),
.other_different = BIT(1),
.width = 1,
.cls = &amd64_reg_classes[CLASS_amd64_gp],
.limited = NULL,
.type = arch_register_req_type_none,
.should_be_same = BIT(0),
.must_be_different = BIT(1),
.width = 1,
};
static const arch_register_req_t amd64_requirement_xmm_same_0_not_1 = {
.cls = &amd64_reg_classes[CLASS_amd64_xmm],
.limited = NULL,
.type = arch_register_req_type_must_be_different,
.should_be_same = BIT(0),
.other_different = BIT(1),
.width = 1,
.cls = &amd64_reg_classes[CLASS_amd64_xmm],
.limited = NULL,
.type = arch_register_req_type_none,
.should_be_same = BIT(0),
.must_be_different = BIT(1),
.width = 1,
};
static const arch_register_req_t *mem_reqs[] = {
......
ir/be/bearch.c
View file @ 474447c7
......@@ -19,12 +19,12 @@
#include "raw_bitset.h"
arch_register_req_t const arch_no_requirement = {
.cls = NULL,
.limited = NULL,
.type = arch_register_req_type_none,
.should_be_same = 0,
.other_different = 0,
.width = 0,
.cls = NULL,
.limited = NULL,
.type = arch_register_req_type_none,
.should_be_same = 0,
.must_be_different = 0,
.width = 0,
};
static reg_out_info_t *get_out_info_n(const ir_node *node, unsigned pos)
......
ir/be/bearch.h
View file @ 474447c7
......@@ -25,13 +25,11 @@
*/
typedef enum arch_register_req_type_t {
/** No special type, but may still have a limited array set. */
arch_register_req_type_none = 0,
/** The register must be unequal from some other at the node. */
arch_register_req_type_must_be_different = 1U << 0,
arch_register_req_type_none = 0,
/** The registernumber should be aligned (in case of multiregister values)*/
arch_register_req_type_aligned = 1U << 1,
arch_register_req_type_aligned = 1U << 0,
/** ignore while allocating registers */
arch_register_req_type_ignore = 1U << 2,
arch_register_req_type_ignore = 1U << 1,
} arch_register_req_type_t;
ENUM_BITSET(arch_register_req_type_t)
......@@ -229,7 +227,7 @@ struct arch_register_req_t {
/** Bitmask of ins which should use the same register. */
unsigned should_be_same;
/** Bitmask of ins which shall use a different register (must_be_different) */
unsigned other_different;
unsigned must_be_different;
/** Specifies how many sequential registers are required */
unsigned char width;
};
......@@ -243,7 +241,7 @@ static inline bool reg_reqs_equal(const arch_register_req_t *req1,
if (req1->type != req2->type ||
req1->cls != req2->cls ||
req1->should_be_same != req2->should_be_same ||
req1->other_different != req2->other_different ||
req1->must_be_different != req2->must_be_different ||
(req1->limited != NULL) != (req2->limited != NULL))
return false;
......
ir/be/beasm.c
View file @ 474447c7
......@@ -215,10 +215,9 @@ ir_node *be_make_asm(ir_node const *const node, ir_node **in, arch_register_req_
if (different != 0) {
arch_register_req_t *const req = OALLOCZ(obst, arch_register_req_t);
*req = *oreq;
req->type |= arch_register_req_type_must_be_different;
req->other_different = different;
out_reqs[o] = req;
*req = *oreq;
req->must_be_different = different;
out_reqs[o] = req;
}
}
......
ir/be/bedump.c
View file @ 474447c7
......@@ -201,8 +201,8 @@ static void dump_register_req(FILE *const F, arch_register_req_t const *const re
if (req->should_be_same != 0)
dump_bitmask(F, " same as", req->should_be_same);
if (arch_register_req_is(req, must_be_different))
dump_bitmask(F, " different from", req->other_different);
if (req->must_be_different != 0)
dump_bitmask(F, " different from", req->must_be_different);
if (req->width != 1)
fprintf(F, " width:%d", req->width);
......
ir/be/bespillutil.c
View file @ 474447c7
......@@ -943,8 +943,8 @@ static void assure_different_constraints(ir_node *irn, ir_node *skipped_irn, con
{
const arch_register_req_t *req = arch_get_irn_register_req(irn);
if (arch_register_req_is(req, must_be_different)) {
const unsigned other = req->other_different;
if (req->must_be_different != 0) {
const unsigned other = req->must_be_different;
if (req->should_be_same != 0) {
const unsigned same = req->should_be_same;
......
ir/be/scripts/generate_new_opcodes.pl
View file @ 474447c7
......@@ -1049,12 +1049,12 @@ sub generate_requirements {
$class = $reqs;
$result = <<EOF;
{
.cls = &${arch}_reg_classes[CLASS_${arch}_${class}],
.limited = NULL,
.type = ${reqtype},
.should_be_same = 0,
.other_different = 0,
.width = $width,
.cls = &${arch}_reg_classes[CLASS_${arch}_${class}],
.limited = NULL,
.type = ${reqtype},
.should_be_same = 0,
.must_be_different = 0,
.width = $width,
};
EOF
......@@ -1067,9 +1067,6 @@ EOF
die("Fatal error: Could not build subset for requirements '$reqs' of '$op' pos $idx ... exiting.\n");
}
if ($different_pos != 0) {
push(@req_type_mask, "arch_register_req_type_must_be_different");
}
my $reqtype = join(" | ", @req_type_mask) || "arch_register_req_type_none";
if(!defined($limit_bitset)) {
......@@ -1079,12 +1076,12 @@ EOF
$class = $regclass;
$result = <<EOF;
{
.cls = &${arch}_reg_classes[CLASS_${arch}_${class}],
.limited = ${limit_bitset},
.type = ${reqtype},
.should_be_same = ${same_pos},
.other_different = ${different_pos},
.width = $width,
.cls = &${arch}_reg_classes[CLASS_${arch}_${class}],
.limited = ${limit_bitset},
.type = ${reqtype},
.should_be_same = ${same_pos},
.must_be_different = ${different_pos},
.width = $width,
};
EOF
......
ir/be/scripts/generate_regalloc_if.pl
View file @ 474447c7
......@@ -113,12 +113,12 @@ foreach my $class_name (sort(keys(%reg_classes))) {
$single_constraints .= <<EOF;
const arch_register_req_t ${arch}_class_reg_req_${old_classname} = {
.cls = &${arch}_reg_classes[CLASS_${arch}_${old_classname}],
.limited = NULL,
.type = arch_register_req_type_none,
.should_be_same = 0,
.other_different = 0,
.width = 1,
.cls = &${arch}_reg_classes[CLASS_${arch}_${old_classname}],
.limited = NULL,
.type = arch_register_req_type_none,
.should_be_same = 0,
.must_be_different = 0,
.width = 1,
};
EOF
$reqdecls .= "extern const arch_register_req_t ${arch}_class_reg_req_${old_classname};\n";
......@@ -190,12 +190,12 @@ EOF
$single_constraints .= <<EOF;
static const unsigned ${arch}_limited_${old_classname}_${name} [] = ${limitedarray};
const arch_register_req_t ${arch}_single_reg_req_${old_classname}_${name} = {
.type = arch_register_req_type_none,
.cls = ${class_ptr},
.limited = ${arch}_limited_${old_classname}_${name},
.should_be_same = 0,
.other_different = 0,
.width = 1,
.type = arch_register_req_type_none,
.cls = ${class_ptr},
.limited = ${arch}_limited_${old_classname}_${name},
.should_be_same = 0,
.must_be_different = 0,
.width = 1,
};
EOF
$reqdecls .= "extern const arch_register_req_t ${arch}_single_reg_req_${old_classname}_${name};\n";
......
ir/be/sparc/sparc_transform.c
View file @ 474447c7
......@@ -2055,28 +2055,28 @@ static ir_node *gen_Free(ir_node *node)
}
static const arch_register_req_t float1_req = {
.cls = &sparc_reg_classes[CLASS_sparc_fp],
.limited = NULL,
.type = arch_register_req_type_none,
.should_be_same = 0,
.other_different = 0,
.width = 1,
.cls = &sparc_reg_classes[CLASS_sparc_fp],
.limited = NULL,
.type = arch_register_req_type_none,
.should_be_same = 0,
.must_be_different = 0,
.width = 1,
};
static const arch_register_req_t float2_req = {
.cls = &sparc_reg_classes[CLASS_sparc_fp],
.limited = NULL,
.type = arch_register_req_type_aligned,
.should_be_same = 0,
.other_different = 0,
.width = 2,
.cls = &sparc_reg_classes[CLASS_sparc_fp],
.limited = NULL,
.type = arch_register_req_type_aligned,
.should_be_same = 0,
.must_be_different = 0,
.width = 2,
};
static const arch_register_req_t float4_req = {
.cls = &sparc_reg_classes[CLASS_sparc_fp],
.limited = NULL,
.type = arch_register_req_type_aligned,
.should_be_same = 0,
.other_different = 0,
.width = 4,
.cls = &sparc_reg_classes[CLASS_sparc_fp],
.limited = NULL,
.type = arch_register_req_type_aligned,
.should_be_same = 0,
.must_be_different = 0,
.width = 4,
};
static const arch_register_req_t *get_float_req(ir_mode *mode)
......
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment

Imprint