Skip to content
GitLab
Commit 47929205 authored by Christoph Mallon's avatar Christoph Mallon
Browse files

When making a 'And', 'Eor' or 'Or', automatically infer their modes from the left operand.

parent 69c7e43b
Expand all Hide whitespace changes
Inline Side-by-side
ir/be/amd64/amd64_bearch.c
View file @ 47929205
......@@ -294,7 +294,7 @@ static void rewrite_float_unsigned_Conv(ir_node *node)
ir_node *sub_conv = new_rd_Conv(dbgi, true_block, sub, mode_Ls);
ir_node *sign_bit = create_sign_bit_const(irg);
collect_new_start_block_node(sign_bit);
ir_node *xor = new_r_Eor(true_block, sub_conv, sign_bit, mode_Ls);
ir_node *xor = new_r_Eor(true_block, sub_conv, sign_bit);
ir_node *true_res = new_rd_Conv(dbgi, true_block, xor, dest_mode);
/* false block: Simply convert */
......
ir/be/arm/arm_lower64.c
View file @ 47929205
......@@ -242,10 +242,10 @@ static void lower64_shl(ir_node *node, ir_mode *mode)
ir_node *sub = new_rd_Sub(dbgi, block, right_low, c32, umode);
ir_node *llo_conv = new_rd_Conv(dbgi, block, left_low, mode);
ir_node *shl2 = new_rd_Shl(dbgi, block, llo_conv, sub, mode);
ir_node *or = new_rd_Or(dbgi, block, shl1, shl2, mode);
ir_node *or = new_rd_Or(dbgi, block, shl1, shl2);
ir_node *sub2 = new_rd_Sub(dbgi, block, c32, right_low, umode);
ir_node *shr = new_rd_Shr(dbgi, block, llo_conv, sub2, mode);
ir_node *or2 = new_rd_Or(dbgi, block, or, shr, mode);
ir_node *or2 = new_rd_Or(dbgi, block, or, shr);
/* Res_lo = L_lo << R */
ir_node *low = new_rd_Shl(dbgi, block, left_low, right_low, umode);
ir_set_dw_lowered(node, low, or2);
......@@ -275,10 +275,10 @@ static void lower64_shr(ir_node *node, ir_mode *mode)
ir_node *sub = new_rd_Sub(dbgi, block, right_low, c32, umode);
ir_node *lhi_conv = new_rd_Conv(dbgi, block, left_high, umode);
ir_node *shr2 = new_rd_Shr(dbgi, block, lhi_conv, sub, umode);
ir_node *or = new_rd_Or(dbgi, block, shr1, shr2, umode);
ir_node *or = new_rd_Or(dbgi, block, shr1, shr2);
ir_node *sub2 = new_rd_Sub(dbgi, block, c32, right_low, umode);
ir_node *shl = new_rd_Shl(dbgi, block, lhi_conv, sub2, umode);
ir_node *or2 = new_rd_Or(dbgi, block, or, shl, umode);
ir_node *or2 = new_rd_Or(dbgi, block, or, shl);
/* Res_hi = L_hi >> R */
ir_node *shr3 = new_rd_Shr(dbgi, block, left_high, right_low, mode);
ir_set_dw_lowered(node, or2, shr3);
......@@ -311,7 +311,7 @@ static void lower64_shrs(ir_node *node, ir_mode *mode)
ir_node *subs_flags = new_r_Proj(subs, mode_ANY, pn_arm_SubS_t_flags);
ir_node *left_highu = new_rd_Conv(dbgi, block, left_high, umode);
ir_node *shl = new_rd_Shl(dbgi, block, left_highu, sub, umode);
ir_node *or = new_rd_Or(dbgi, block, shr, shl, umode);
ir_node *or = new_rd_Or(dbgi, block, shr, shl);
ir_node *shrs = new_rd_Shrs(dbgi, block, left_highu, subs_res,
umode);
ir_node *orpl = new_bd_arm_OrPl_t(dbgi, block, or, shrs, or,
......
ir/be/sparc/sparc_bearch.c
View file @ 47929205
......@@ -229,8 +229,7 @@ static void rewrite_float_unsigned_Conv(ir_node *node)
ir_node *sub = new_rd_Sub(dbgi, true_block, float_x, limitc,
mode_f);
ir_node *sub_conv = new_rd_Conv(dbgi, true_block, sub, mode_s);
ir_node *xorn = new_rd_Eor(dbgi, true_block, sub_conv, c_const,
mode_s);
ir_node *xorn = new_rd_Eor(dbgi, true_block, sub_conv, c_const);
ir_node *converted = new_rd_Conv(dbgi, false_block, float_x,mode_s);
......
ir/ir/irarch.c
View file @ 47929205
......@@ -1036,14 +1036,14 @@ ir_node *arch_dep_replace_mod_by_const(ir_node *irn)
ir_tarval *k_val
= tarval_shl_unsigned(get_mode_all_one(mode), k);
k_node = new_r_Const(irg, k_val);
curr = new_rd_And(dbg, block, curr, k_node, mode);
curr = new_rd_And(dbg, block, curr, k_node);
res = new_rd_Sub(dbg, block, left, curr, mode);
} else { /* unsigned case */
ir_tarval *k_val
= tarval_shr_unsigned(get_mode_all_one(mode),
get_mode_size_bits(mode) - k);
ir_node *k_node = new_r_Const(irg, k_val);
res = new_rd_And(dbg, block, left, k_node, mode);
res = new_rd_And(dbg, block, left, k_node);
}
/* other constant */
} else if (allow_Mulh(params, mode)) {
......
ir/ir/irgmod.c
View file @ 47929205
......@@ -345,18 +345,15 @@ ir_node *duplicate_subgraph(dbg_info *dbg, ir_node *n, ir_node *block)
case iro_And:
return new_rd_And(dbg, block,
duplicate_subgraph(dbg, get_And_left(n), block),
duplicate_subgraph(dbg, get_And_right(n), block),
mode);
duplicate_subgraph(dbg, get_And_right(n), block));
case iro_Or:
return new_rd_Or(dbg, block,
duplicate_subgraph(dbg, get_Or_left(n), block),
duplicate_subgraph(dbg, get_Or_right(n), block),
mode);
duplicate_subgraph(dbg, get_Or_right(n), block));
case iro_Eor:
return new_rd_Eor(dbg, block,
duplicate_subgraph(dbg, get_Eor_left(n), block),
duplicate_subgraph(dbg, get_Eor_right(n), block),
mode);
duplicate_subgraph(dbg, get_Eor_right(n), block));
case iro_Conv:
return new_rd_Conv(dbg, block,
duplicate_subgraph(dbg, get_Conv_op(n), block),
......
ir/lower/lower_alloc.c
View file @ 47929205
......@@ -38,7 +38,7 @@ static ir_node *adjust_alloc_size(dbg_info *dbgi, ir_node *size, ir_node *block)
ir_node *addv = new_r_Const(irg, invmask);
ir_node *add = new_rd_Add(dbgi, block, size, addv, mode);
ir_node *maskc = new_r_Const(irg, mask);
ir_node *and = new_rd_And(dbgi, block, add, maskc, mode);
ir_node *and = new_rd_And(dbgi, block, add, maskc);
return and;
}
......
ir/lower/lower_dw.c
View file @ 47929205
......@@ -810,7 +810,7 @@ static void lower_shr_helper(ir_node *node, ir_mode *mode,
/* add a Cmp to test if highest bit is set <=> whether we shift more
* than half the word width */
ir_node *cnst = new_r_Const_long(irg, low_unsigned, modulo_shift2);
ir_node *andn = new_r_And(block, right, cnst, low_unsigned);
ir_node *andn = new_r_And(block, right, cnst);
ir_node *cnst2 = new_r_Const_null(irg, low_unsigned);
ir_node *cmp = new_rd_Cmp(dbgi, block, andn, cnst2, ir_relation_equal);
ir_node *cond = new_rd_Cond(dbgi, block, cmp);
......@@ -838,8 +838,7 @@ static void lower_shr_helper(ir_node *node, ir_mode *mode,
low_unsigned);
ir_node *carry1 = new_rd_Shl(dbgi, block_true, carry0,
not_shiftval, low_unsigned);
ir_node *tres_low = new_rd_Or(dbgi, block_true, shift_low, carry1,
low_unsigned);
ir_node *tres_low = new_rd_Or(dbgi, block_true, shift_low, carry1);
/* false block => shift_width > 1word */
ir_node *false_in[1] = { proj_false };
......@@ -923,7 +922,7 @@ static void lower_Shl(ir_node *node, ir_mode *mode)
/* add a Cmp to test if highest bit is set <=> whether we shift more
* than half the word width */
ir_node *cnst = new_r_Const_long(irg, low_unsigned, modulo_shift2);
ir_node *andn = new_r_And(block, right, cnst, low_unsigned);
ir_node *andn = new_r_And(block, right, cnst);
ir_node *cnst2 = new_r_Const_null(irg, low_unsigned);
ir_node *cmp = new_rd_Cmp(dbgi, block, andn, cnst2,
ir_relation_equal);
......@@ -945,8 +944,7 @@ static void lower_Shl(ir_node *node, ir_mode *mode)
ir_node *carry0 = new_rd_Shr(dbgi, block_true, conv, one, mode);
ir_node *carry1 = new_rd_Shr(dbgi, block_true, carry0,
not_shiftval, mode);
ir_node *tres_high = new_rd_Or(dbgi, block_true, shift_high, carry1,
mode);
ir_node *tres_high = new_rd_Or(dbgi, block_true, shift_high, carry1);
/* false block => shift_width > 1word */
ir_node *fin[1] = { proj_false };
......@@ -1007,8 +1005,7 @@ static void lower_Minus(ir_node *node, ir_mode *mode)
/**
* Translate a logical binop by creating two logical binops.
*/
static void lower_binop_logical(ir_node *node, ir_mode *mode,
ir_node *(*constr_rd)(dbg_info *db, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) )
static void lower_binop_logical(ir_node *node, ir_node *(*constr_rd)(dbg_info *db, ir_node *block, ir_node *op1, ir_node *op2))
{
ir_node *left = get_binop_left(node);
ir_node *right = get_binop_right(node);
......@@ -1017,27 +1014,28 @@ static void lower_binop_logical(ir_node *node, ir_mode *mode,
dbg_info *dbgi = get_irn_dbg_info(node);
ir_node *block = get_nodes_block(node);
ir_node *res_low
= constr_rd(dbgi, block, left_entry->low_word, right_entry->low_word,
env.p.word_unsigned);
= constr_rd(dbgi, block, left_entry->low_word, right_entry->low_word);
ir_node *res_high
= constr_rd(dbgi, block, left_entry->high_word, right_entry->high_word,
mode);
= constr_rd(dbgi, block, left_entry->high_word, right_entry->high_word);
ir_set_dw_lowered(node, res_low, res_high);
}
static void lower_And(ir_node *node, ir_mode *mode)
{
lower_binop_logical(node, mode, new_rd_And);
(void)mode;
lower_binop_logical(node, new_rd_And);
}
static void lower_Or(ir_node *node, ir_mode *mode)
{
lower_binop_logical(node, mode, new_rd_Or);
(void)mode;
lower_binop_logical(node, new_rd_Or);
}
static void lower_Eor(ir_node *node, ir_mode *mode)
{
lower_binop_logical(node, mode, new_rd_Eor);
(void)mode;
lower_binop_logical(node, new_rd_Eor);
}
/**
......@@ -1171,9 +1169,9 @@ static void lower_Cond(ir_node *node, ir_mode *high_mode)
ir_node *high_left = new_rd_Conv(dbg, block, lentry->high_word, mode);
ir_node *low_right = new_rd_Conv(dbg, block, rentry->low_word, mode);
ir_node *high_right = new_rd_Conv(dbg, block, rentry->high_word, mode);
ir_node *xor_low = new_rd_Eor(dbg, block, low_left, low_right, mode);
ir_node *xor_high = new_rd_Eor(dbg, block, high_left, high_right, mode);
ir_node *ornode = new_rd_Or(dbg, block, xor_low, xor_high, mode);
ir_node *xor_low = new_rd_Eor(dbg, block, low_left, low_right);
ir_node *xor_high = new_rd_Eor(dbg, block, high_left, high_right);
ir_node *ornode = new_rd_Or(dbg, block, xor_low, xor_high);
ir_node *null = new_r_Const_null(irg, mode);
ir_node *cmp = new_rd_Cmp(dbg, block, ornode, null, relation);
set_Cond_selector(node, cmp);
......@@ -1363,9 +1361,9 @@ static void lower_Cmp(ir_node *cmp, ir_mode *m)
ir_node *high_left = new_rd_Conv(dbg, block, lentry->high_word, mode);
ir_node *low_right = new_rd_Conv(dbg, block, rentry->low_word, mode);
ir_node *high_right = new_rd_Conv(dbg, block, rentry->high_word, mode);
ir_node *xor_low = new_rd_Eor(dbg, block, low_left, low_right, mode);
ir_node *xor_high = new_rd_Eor(dbg, block, high_left, high_right, mode);
ir_node *ornode = new_rd_Or(dbg, block, xor_low, xor_high, mode);
ir_node *xor_low = new_rd_Eor(dbg, block, low_left, low_right);
ir_node *xor_high = new_rd_Eor(dbg, block, high_left, high_right);
ir_node *ornode = new_rd_Or(dbg, block, xor_low, xor_high);
ir_node *null = new_r_Const_null(irg, mode);
ir_node *new_cmp = new_rd_Cmp(dbg, block, ornode, null, relation);
exchange(cmp, new_cmp);
......@@ -1383,8 +1381,8 @@ static void lower_Cmp(ir_node *cmp, ir_mode *m)
rentry->low_word, relation);
ir_node *high = new_rd_Cmp(dbg, block, lentry->high_word,
rentry->high_word, ir_relation_equal);
ir_node *t = new_rd_And(dbg, block, low, high, mode_b);
ir_node *res = new_rd_Or(dbg, block, high1, t, mode_b);
ir_node *t = new_rd_And(dbg, block, low, high);
ir_node *res = new_rd_Or(dbg, block, high1, t);
exchange(cmp, res);
}
......@@ -2342,7 +2340,7 @@ static void lower_reduce_builtin(ir_node *builtin, ir_mode *mode)
ir_node *high = new_r_Proj(parity_high, result_mode, pn_Builtin_max+1);
ir_node *parity_low = new_rd_Builtin(dbgi, block, mem, 1, in_low, kind, lowered_type_low);
ir_node *low = new_r_Proj(parity_low, result_mode, pn_Builtin_max+1);
res = new_rd_Eor(dbgi, block, high, low, result_mode);
res = new_rd_Eor(dbgi, block, high, low);
break;
}
default:
......
ir/lower/lower_mode_b.c
View file @ 47929205
......@@ -43,7 +43,7 @@ static ir_node *create_not(dbg_info *dbgi, ir_node *node)
ir_graph *irg = get_irn_irg(node);
ir_node *one = new_rd_Const_one(dbgi, irg, mode);
return new_rd_Eor(dbgi, block, node, one, mode);
return new_rd_Eor(dbgi, block, node, one);
}
static ir_node *convert_to_modeb(ir_node *node)
......@@ -133,19 +133,19 @@ static ir_node *lower_node(ir_node *node)
case iro_And: {
ir_node *lowered_left = lower_node(get_And_left(node));
ir_node *lowered_right = lower_node(get_And_right(node));
res = new_rd_And(dbgi, block, lowered_left, lowered_right, mode);
res = new_rd_And(dbgi, block, lowered_left, lowered_right);
break;
}
case iro_Or: {
ir_node *lowered_left = lower_node(get_Or_left(node));
ir_node *lowered_right = lower_node(get_Or_right(node));
res = new_rd_Or(dbgi, block, lowered_left, lowered_right, mode);
res = new_rd_Or(dbgi, block, lowered_left, lowered_right);
break;
}
case iro_Eor: {
ir_node *lowered_left = lower_node(get_Eor_left(node));
ir_node *lowered_right = lower_node(get_Eor_right(node));
res = new_rd_Eor(dbgi, block, lowered_left, lowered_right, mode);
res = new_rd_Eor(dbgi, block, lowered_left, lowered_right);
break;
}
......@@ -165,10 +165,10 @@ static ir_node *lower_node(ir_node *node)
ir_node *v_false = get_Mux_false(node);
ir_node *low_v_false = lower_node(v_false);
ir_node *and0 = new_rd_And(dbgi, block, low_cond, low_v_true, mode);
ir_node *and0 = new_rd_And(dbgi, block, low_cond, low_v_true);
ir_node *not_cond = create_not(dbgi, low_cond);
ir_node *and1 = new_rd_And(dbgi, block, not_cond, low_v_false, mode);
res = new_rd_Or(dbgi, block, and0, and1, mode);
ir_node *and1 = new_rd_And(dbgi, block, not_cond, low_v_false);
res = new_rd_Or(dbgi, block, and0, and1);
break;
}
......
ir/opt/boolopt.c
View file @ 47929205
......@@ -149,7 +149,7 @@ static ir_node *bool_and(cond_pair* const cpair, ir_node *dst_block)
lol = new_r_Conv(dst_block, lol, mode);
hil = get_Cmp_left(cmp_hi);
hil = new_r_Conv(dst_block, hil, mode);
p = new_r_And(dst_block, lol, hil, mode);
p = new_r_And(dst_block, lol, hil);
c = new_r_Const(irg, tv_lo);
cmp = new_r_Cmp(dst_block, p, c, ir_relation_equal);
return cmp;
......@@ -280,7 +280,7 @@ static ir_node *bool_or(cond_pair *const cpair, ir_node *dst_block)
lol = new_r_Conv(dst_block, lol, mode);
hil = get_Cmp_left(cmp_hi);
hil = new_r_Conv(dst_block, hil, mode);
p = new_r_Or(dst_block, lol, hil, mode);
p = new_r_Or(dst_block, lol, hil);
c = new_r_Const(irg, tv_lo);
cmp = new_r_Cmp(dst_block, p, c, ir_relation_less_greater);
return cmp;
......
ir/opt/iropt.c
View file @ 47929205
This diff is collapsed.
ir/opt/ldstopt.c
View file @ 47929205
......@@ -2210,7 +2210,7 @@ again:;
ir_node *conv1 = new_r_Conv(block, convu1, double_mode);
ir_node *cnst = new_r_Const_long(irg, mode_Iu, store_size);
ir_node *shl = new_r_Shl(block, conv1, cnst, double_mode);
ir_node *or = new_r_Or(block, conv0, shl, double_mode);
ir_node *or = new_r_Or(block, conv0, shl);
/* create a new store and replace the two small stores */
ir_cons_flags flags = cons_unaligned;
......
ir/opt/reassoc.c
View file @ 47929205
......@@ -1674,18 +1674,17 @@ static ir_node *rebuild_node(multi_op *o, ir_node *curr, ir_node *node)
{
ir_node *block = get_nodes_block(o->base_node);
dbg_info *dbgi = get_irn_dbg_info(o->base_node);
ir_mode *mode = get_irn_mode(o->base_node);
if (!curr)
return node;
switch (get_op_code(get_multi_op_op(o))) {
case iro_Eor:
return new_rd_Eor(dbgi, block, node, curr, mode);
return new_rd_Eor(dbgi, block, node, curr);
case iro_And:
return new_rd_And(dbgi, block, node, curr, mode);
return new_rd_And(dbgi, block, node, curr);
case iro_Or:
return new_rd_Or(dbgi, block, node, curr, mode);
return new_rd_Or(dbgi, block, node, curr);
default:
panic("Operation not supported");
}
......
scripts/ir_spec.py
View file @ 47929205
......@@ -105,7 +105,8 @@ class Anchor(Node):
@op
class And(Binop):
"""returns the result of a bitwise and operation of its operands"""
flags = [ "commutative" ]
mode = "get_irn_mode(irn_left)"
flags = [ "commutative" ]
@op
class ASM(Node):
......@@ -463,7 +464,8 @@ class Eor(Binop):
"""returns the result of a bitwise exclusive or operation of its operands.
This is also known as the Xor operation."""
flags = [ "commutative" ]
mode = "get_irn_mode(irn_left)"
flags = [ "commutative" ]
@op
class Free(Node):
......@@ -630,6 +632,7 @@ class Offset(EntConst):
@op
class Or(Binop):
"""returns the result of a bitwise or operation of its operands"""
mode = "get_irn_mode(irn_left)"
flags = [ "commutative" ]
@op
......
Supports Markdown
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment

Imprint