ia32: move mode_E/type_E to x86_x87

ir/be/ia32/bearch_ia32.c

@@ -50,8 +50,6 @@ pmap *ia32_tv_ent; /**< A map of entities that store const tarvals */
 
 ir_mode *ia32_mode_fpcw;
 ir_mode *ia32_mode_flags;
-ir_mode *ia32_mode_E;
-ir_type *ia32_type_E;
 ir_mode *ia32_mode_gp;
 ir_mode *ia32_mode_float64;
 ir_mode *ia32_mode_float32;
@@ -980,9 +978,9 @@ static void ia32_collect_frame_entity_nodes(ir_node *node, void *data)
 		 * size to 16bit :-( */
 		if (get_mode_size_bits(mode) == 8) {
 			type = get_type_for_mode(mode_Hu);
-		} else if (mode == ia32_mode_E) {
-			type = ia32_type_E; /* make sure we have the right alignment
-			                       entity size (different from mode size) */
+		} else if (mode == x86_mode_E) {
+			type = x86_type_E; /* make sure we have the right alignment
+			                      entity size (different from mode size) */
 		} else {
 			type = get_type_for_mode(mode);
 		}
@@ -1419,14 +1417,6 @@ static void ia32_init(void)
 	ia32_mode_fpcw = new_non_arithmetic_mode("fpcw", 16);
 	ia32_mode_flags = new_non_arithmetic_mode("flags", 32);
 
-	/* note mantissa is 64bit but with explicitely encoded 1 so the really
-	 * usable part as counted by firm is only 63 bits */
-	ia32_mode_E = new_float_mode("E", irma_x86_extended_float, 15, 64,
-	                             ir_overflow_indefinite);
-	ia32_type_E = new_type_primitive(ia32_mode_E);
-	set_type_size_bytes(ia32_type_E, 12);
-	set_type_alignment_bytes(ia32_type_E, 4);
-
 	ia32_mode_gp = new_int_mode("gp", irma_twos_complement, 32, 0, 32);
 	ia32_mode_float64 = new_float_mode("fp64", irma_ieee754, 11, 52,
 	                                   ir_overflow_indefinite);
@@ -1452,8 +1442,9 @@ static void ia32_init(void)
 		ia32_backend_params.mode_float_arithmetic = NULL;
 		ia32_backend_params.type_long_double = NULL;
 	} else {
-		ia32_backend_params.mode_float_arithmetic = ia32_mode_E;
-		ia32_backend_params.type_long_double      = ia32_type_E;
+		x86_init_x87_type();
+		ia32_backend_params.mode_float_arithmetic = x86_mode_E;
+		ia32_backend_params.type_long_double      = x86_type_E;
 	}
 
 	ia32_register_init();

ir/be/ia32/bearch_ia32_t.h

@@ -14,6 +14,7 @@
 #include "beirg.h"
 #include "pmap.h"
 #include "x86_cconv.h"
+#include "x86_x87.h"
 
 #ifdef NDEBUG
 #define SET_IA32_ORIG_NODE(n, o) ((void)(n), (void)(o), (void)0)
@@ -44,9 +45,6 @@ extern pmap *ia32_tv_ent; /**< A map of entities that store const tarvals */
 
 /** The mode for the floating point control word. */
 extern ir_mode *ia32_mode_fpcw;
-/** extended floatingpoint mode */
-extern ir_mode *ia32_mode_E;
-extern ir_type *ia32_type_E;
 extern ir_mode *ia32_mode_gp;
 extern ir_mode *ia32_mode_float64;
 extern ir_mode *ia32_mode_float32;

ir/be/ia32/ia32_intrinsics.c

@@ -27,6 +27,7 @@
 #include "bearch_ia32_t.h"
 #include "gen_ia32_regalloc_if.h"
 #include "begnuas.h"
+#include "x86_x87.h"
 
 typedef enum {
 	no_carry = 0,
@@ -364,14 +365,14 @@ static void ia32_lower_conv64(ir_node *node, ir_mode *mode)
 			/* Convert from float to unsigned 64bit. */
 			ir_graph  *irg = get_irn_irg(node);
 			ir_tarval *flt_tv
-				= new_tarval_from_str("9223372036854775808", 19, ia32_mode_E);
+				= new_tarval_from_str("9223372036854775808", 19, x86_mode_E);
 			ir_node   *flt_corr  = new_r_Const(irg, flt_tv);
 
 			ir_node *lower_blk = part_block_dw(node);
 			ir_node *upper_blk = get_nodes_block(node);
 			set_dw_control_flow_changed();
 
-			ir_node *opc  = new_rd_Conv(dbg, upper_blk, op, ia32_mode_E);
+			ir_node *opc  = new_rd_Conv(dbg, upper_blk, op, x86_mode_E);
 			ir_node *cmp  = new_rd_Cmp(dbg, upper_blk, opc, flt_corr,
 			                           ir_relation_less);
 			ir_node *cond = new_rd_Cond(dbg, upper_blk, cmp);
@@ -394,11 +395,11 @@ static void ia32_lower_conv64(ir_node *node, ir_mode *mode)
 
 			ir_node *fphi_in[] = {
 				opc,
-				new_rd_Sub(dbg, upper_blk, opc, flt_corr, ia32_mode_E)
+				new_rd_Sub(dbg, upper_blk, opc, flt_corr, x86_mode_E)
 			};
 			ir_node *flt_phi
 				= new_r_Phi(lower_blk, ARRAY_SIZE(fphi_in), fphi_in,
-				            ia32_mode_E);
+				            x86_mode_E);
 
 			/* fix Phi links for next part_block() */
 			if (is_Phi(int_phi))

ir/be/ia32/ia32_new_nodes.c

@@ -36,6 +36,7 @@
 #include "ia32_nodes_attr.h"
 #include "ia32_new_nodes.h"
 #include "gen_ia32_regalloc_if.h"
+#include "x86_x87.h"
 
 struct obstack opcodes_obst;
 

ir/be/ia32/ia32_spec.pl

@@ -14,7 +14,7 @@
 $arch = "ia32";
 
 $mode_xmm   = "ia32_mode_float64";
-$mode_fp87  = "ia32_mode_E";
+$mode_fp87  = "x86_mode_E";
 $mode_gp    = "ia32_mode_gp";
 $mode_flags = "ia32_mode_flags";
 $mode_fpcw  = "ia32_mode_fpcw";
@@ -286,7 +286,7 @@ my $funop = {
 	in_reqs   => [ "fp" ],
 	out_reqs  => [ "fp" ],
 	ins       => [ "value" ],
-	init      => "attr->ls_mode = ia32_mode_E;",
+	init      => "attr->ls_mode = x86_mode_E;",
 };
 
 my $fconstop = {
@@ -294,7 +294,7 @@ my $fconstop = {
 	irn_flags => [ "rematerializable" ],
 	out_reqs  => [ "fp" ],
 	outs      => [ "res" ],
-	init      => "attr->ls_mode = ia32_mode_E;",
+	init      => "attr->ls_mode = x86_mode_E;",
 	fixed     => $x87sim,
 };
 

ir/be/ia32/ia32_transform.c

@@ -46,6 +46,7 @@
 #include "util.h"
 #include "x86_address_mode.h"
 #include "x86_cconv.h"
+#include "x86_x87.h"
 
 /* define this to construct SSE constants instead of load them */
 #undef CONSTRUCT_SSE_CONST
@@ -285,8 +286,8 @@ static ir_node *try_create_Immediate(const ir_node *node, char const constraint)
 
 static ir_type *get_prim_type(const ir_mode *mode)
 {
-	if (mode == ia32_mode_E) {
-		return ia32_type_E;
+	if (mode == x86_mode_E) {
+		return x86_type_E;
 	} else {
 		return get_type_for_mode(mode);
 	}
@@ -785,7 +786,7 @@ static bool ia32_use_source_address_mode(ir_node *block, ir_node *node,
 		return false;
 	ir_mode *mode = get_irn_mode(node);
 	/* we can't fold mode_E AM */
-	if (mode == ia32_mode_E)
+	if (mode == x86_mode_E)
 		return false;
 	/* we only use address mode if we're the only user of the load
 	 * or the users will be merged later anyway */
@@ -1253,7 +1254,7 @@ static ir_node *skip_float_upconv(ir_node *node)
 
 static void check_x87_floatmode(ir_mode *mode)
 {
-	if (mode != ia32_mode_E) {
+	if (mode != x86_mode_E) {
 		panic("ia32: x87 only supports x86 extended float mode");
 	}
 }
@@ -1291,7 +1292,7 @@ static ir_node *gen_binop_x87_float(ir_node *node, ir_node *op1, ir_node *op2,
 	ir_node       *new_node  = func(dbgi, new_block, addr->base, addr->index,
 	                                addr->mem, am.new_op1, am.new_op2, fpcw);
 	if (am.op_type == ia32_Normal)
-		am.ls_mode = ia32_mode_E;
+		am.ls_mode = x86_mode_E;
 	set_am_attributes(new_node, &am);
 
 	ia32_x87_attr_t *attr = get_ia32_x87_attr(new_node);
@@ -3618,7 +3619,7 @@ static ir_node *gen_Mux(ir_node *node)
 				scale = 2;
 			} else if (new_mode == ia32_mode_float64) {
 				scale = 3;
-			} else if (new_mode == ia32_mode_E) {
+			} else if (new_mode == x86_mode_E) {
 				/* arg, shift 16 NOT supported */
 				scale = 3;
 				new_node = new_bd_ia32_Lea(dbgi, new_block, new_node, new_node);

ir/be/ia32/x86_x87.c

@@ -39,6 +39,9 @@
 #include "gen_ia32_regalloc_if.h"
 #include "ia32_architecture.h"
 
+ir_mode *x86_mode_E;
+ir_type *x86_type_E;
+
 #define N_FLOAT_REGS  (N_ia32_fp_REGS-1)  // exclude NOREG
 
 static bool is_x87_req(arch_register_req_t const *const req)
@@ -1546,3 +1549,14 @@ void x86_init_x87(void)
 {
 	FIRM_DBG_REGISTER(dbg, "firm.be.x86.x87");
 }
+
+void x86_init_x87_type(void)
+{
+	/* note mantissa is 64bit but with explicitely encoded 1 so the really
+	 * usable part as counted by firm is only 63 bits */
+	x86_mode_E = new_float_mode("E", irma_x86_extended_float, 15, 64,
+	                             ir_overflow_indefinite);
+	x86_type_E = new_type_primitive(x86_mode_E);
+	set_type_size_bytes(x86_type_E, 12);
+	set_type_alignment_bytes(x86_type_E, 4);
+}

ir/be/ia32/x86_x87.h

@@ -30,4 +30,10 @@ void x86_x87_simulate_graph(ir_graph *irg);
  */
 void x86_init_x87(void);
 
+/** Initialize x87 mode+type/ */
+void x86_init_x87_type(void);
+
+extern ir_mode *x86_mode_E;
+extern ir_type *x86_type_E;
+
 #endif