put register classes into arch_env struct, no need for complicated callbacks

[r28039]

ir/be/TEMPLATE/bearch_TEMPLATE.c

@@ -143,6 +143,8 @@ static TEMPLATE_isa_t TEMPLATE_isa_template = {
 		&TEMPLATE_isa_if,             /* isa interface implementation */
 		N_TEMPLATE_REGISTERS,
 		TEMPLATE_registers,
+		N_TEMPLATE_CLASSES,
+		TEMPLATE_reg_classes,
 		&TEMPLATE_registers[REG_SP],  /* stack pointer register */
 		&TEMPLATE_registers[REG_BP],  /* base pointer register */
 		&TEMPLATE_reg_classes[CLASS_TEMPLATE_gp],  /* link pointer register class */
@@ -194,20 +196,6 @@ static void TEMPLATE_done(void *self)
 	free(self);
 }
 
-
-static unsigned TEMPLATE_get_n_reg_class(void)
-{
-	return N_TEMPLATE_CLASSES;
-}
-
-static const arch_register_class_t *TEMPLATE_get_reg_class(unsigned i)
-{
-	assert(i < N_TEMPLATE_CLASSES);
-	return &TEMPLATE_reg_classes[i];
-}
-
-
-
 /**
  * Get the register class which shall be used to store a value of a given mode.
  * @param self The this pointer.
@@ -415,8 +403,6 @@ const arch_isa_if_t TEMPLATE_isa_if = {
 	TEMPLATE_init,
 	TEMPLATE_done,
 	NULL,                /* handle intrinsics */
-	TEMPLATE_get_n_reg_class,
-	TEMPLATE_get_reg_class,
 	TEMPLATE_get_reg_class_for_mode,
 	TEMPLATE_get_call_abi,
 	TEMPLATE_get_reg_class_alignment,

ir/be/amd64/bearch_amd64.c

@@ -264,6 +264,8 @@ static amd64_isa_t amd64_isa_template = {
 		&amd64_isa_if,             /* isa interface implementation */
 		N_AMD64_REGISTERS,
 		amd64_registers,
+		N_AMD64_CLASSES,
+		amd64_reg_classes,
 		&amd64_registers[REG_RSP],  /* stack pointer register */
 		&amd64_registers[REG_RBP],  /* base pointer register */
 		&amd64_reg_classes[CLASS_amd64_gp],  /* link pointer register class */
@@ -316,19 +318,6 @@ static void amd64_done(void *self)
 }
 
 
-static unsigned amd64_get_n_reg_class(void)
-{
-	return N_AMD64_CLASSES;
-}
-
-static const arch_register_class_t *amd64_get_reg_class(unsigned i)
-{
-	assert(i < N_AMD64_CLASSES);
-	return &amd64_reg_classes[i];
-}
-
-
-
 /**
  * Get the register class which shall be used to store a value of a given mode.
  * @param self The this pointer.
@@ -573,8 +562,6 @@ const arch_isa_if_t amd64_isa_if = {
 	amd64_init,
 	amd64_done,
 	NULL,                /* handle intrinsics */
-	amd64_get_n_reg_class,
-	amd64_get_reg_class,
 	amd64_get_reg_class_for_mode,
 	amd64_get_call_abi,
 	amd64_get_reg_class_alignment,

ir/be/arm/bearch_arm.c

@@ -421,6 +421,8 @@ static arm_isa_t arm_isa_template = {
 		&arm_isa_if,           /* isa interface */
 		N_ARM_REGISTERS,
 		arm_registers,
+		N_ARM_CLASSES,
+		arm_reg_classes,
 		&arm_registers[REG_SP],  /* stack pointer */
 		&arm_registers[REG_R11], /* base pointer */
 		&arm_reg_classes[CLASS_arm_gp],  /* static link pointer class */
@@ -481,27 +483,6 @@ static void arm_done(void *self)
 	free(self);
 }
 
-
-/**
- * Report the number of register classes.
- * If we don't have fp instructions, report only GP
- * here to speed up register allocation (and makes dumps
- * smaller and more readable).
- */
-static unsigned arm_get_n_reg_class(void)
-{
-	return N_ARM_CLASSES;
-}
-
-/**
- * Return the register class with requested index.
- */
-static const arch_register_class_t *arm_get_reg_class(unsigned i)
-{
-	assert(i < N_ARM_CLASSES);
-	return &arm_reg_classes[i];
-}
-
 /**
  * Get the register class which shall be used to store a value of a given mode.
  * @param self The this pointer.
@@ -628,8 +609,6 @@ const arch_isa_if_t arm_isa_if = {
 	arm_init,
 	arm_done,
 	NULL,  /* handle_intrinsics */
-	arm_get_n_reg_class,
-	arm_get_reg_class,
 	arm_get_reg_class_for_mode,
 	NULL,
 	arm_get_reg_class_alignment,

ir/be/beabi.c

@@ -516,9 +516,9 @@ static ir_node *adjust_call(be_abi_irg_t *env, ir_node *irn, ir_node *curr_sp)
 
 	/* Put caller save into the destroyed set and state registers in the states
 	 * set */
-	for (i = 0, n = arch_env_get_n_reg_class(arch_env); i < n; ++i) {
+	for (i = 0, n = arch_env->n_register_classes; i < n; ++i) {
 		unsigned j;
-		const arch_register_class_t *cls = arch_env_get_reg_class(arch_env, i);
+		const arch_register_class_t *cls = &arch_env->register_classes[i];
 		for (j = 0; j < cls->n_regs; ++j) {
 			const arch_register_t *reg = arch_register_for_index(cls, j);
 
@@ -1830,8 +1830,8 @@ static void modify_irg(ir_graph *irg)
 	}
 
 	/* Collect all callee-save registers */
-	for (i = 0, n = arch_env_get_n_reg_class(arch_env); i < n; ++i) {
-		const arch_register_class_t *cls = arch_env_get_reg_class(arch_env, i);
+	for (i = 0, n = arch_env->n_register_classes; i < n; ++i) {
+		const arch_register_class_t *cls = &arch_env->register_classes[i];
 		for (j = 0; j < cls->n_regs; ++j) {
 			const arch_register_t *reg = &cls->regs[j];
 			if (arch_register_type_is(reg, callee_save) ||
@@ -1993,10 +1993,10 @@ static void fix_call_state_inputs(ir_graph *irg)
 	arch_register_t **stateregs = NEW_ARR_F(arch_register_t*, 0);
 
 	/* Collect caller save registers */
-	n = arch_env_get_n_reg_class(arch_env);
+	n = arch_env->n_register_classes;
 	for (i = 0; i < n; ++i) {
 		unsigned j;
-		const arch_register_class_t *cls = arch_env_get_reg_class(arch_env, i);
+		const arch_register_class_t *cls = &arch_env->register_classes[i];
 		for (j = 0; j < cls->n_regs; ++j) {
 			const arch_register_t *reg = arch_register_for_index(cls, j);
 			if (arch_register_type_is(reg, state)) {

ir/be/beabihelper.c

@@ -66,7 +66,7 @@ struct beabi_helper_env_t {
 static void prepare_rsm(register_state_mapping_t *rsm,
                         const arch_env_t *arch_env)
 {
-	unsigned   n_reg_classes = arch_env_get_n_reg_class(arch_env);
+	unsigned   n_reg_classes = arch_env->n_register_classes;
 	unsigned   c;
 	reg_flag_t memory = { NULL, 0 };
 
@@ -77,7 +77,7 @@ static void prepare_rsm(register_state_mapping_t *rsm,
 	rsm->value_map     = NULL;
 	rsm->reg_index_map = XMALLOCN(int*, n_reg_classes);
 	for (c = 0; c < n_reg_classes; ++c) {
-		const arch_register_class_t *cls = arch_env_get_reg_class(arch_env, c);
+		const arch_register_class_t *cls    = &arch_env->register_classes[c];
 		unsigned                     n_regs = arch_register_class_n_regs(cls);
 		unsigned                     r;
 
@@ -90,7 +90,7 @@ static void prepare_rsm(register_state_mapping_t *rsm,
 
 static void free_rsm(register_state_mapping_t *rsm, const arch_env_t *arch_env)
 {
-	unsigned n_reg_classes = arch_env_get_n_reg_class(arch_env);
+	unsigned n_reg_classes = arch_env->n_register_classes;
 	unsigned c;
 
 	for (c = 0; c < n_reg_classes; ++c) {
@@ -110,12 +110,12 @@ static void free_rsm(register_state_mapping_t *rsm, const arch_env_t *arch_env)
 static void rsm_clear_regs(register_state_mapping_t *rsm,
                            const arch_env_t *arch_env)
 {
-	unsigned   n_reg_classes = arch_env_get_n_reg_class(arch_env);
+	unsigned   n_reg_classes = arch_env->n_register_classes;
 	unsigned   c;
 	reg_flag_t memory = { NULL, 0 };
 
 	for (c = 0; c < n_reg_classes; ++c) {
-		const arch_register_class_t *cls = arch_env_get_reg_class(arch_env, c);
+		const arch_register_class_t *cls    = &arch_env->register_classes[c];
 		unsigned                     n_regs = arch_register_class_n_regs(cls);
 		unsigned                     r;
 

ir/be/bearch.h

@@ -481,19 +481,6 @@ struct arch_isa_if_t {
 	 */
 	void (*handle_intrinsics)(void);
 
-	/**
-	 * Get the the number of register classes in the isa.
-	 * @return The number of register classes.
-	 */
-	unsigned (*get_n_reg_class)(void);
-
-	/**
-	 * Get the i-th register class.
-	 * @param i The number of the register class.
-	 * @return The register class.
-	 */
-	const arch_register_class_t *(*get_reg_class)(unsigned i);
-
 	/**
 	 * Get the register class which shall be used to store a value of a given
 	 * mode.
@@ -605,8 +592,6 @@ struct arch_isa_if_t {
 #define arch_env_done(env)                             ((env)->impl->done(env))
 #define arch_env_handle_intrinsics(env)                \
 	do { if((env)->impl->handle_intrinsics != NULL) (env)->impl->handle_intrinsics(); } while(0)
-#define arch_env_get_n_reg_class(env)                  ((env)->impl->get_n_reg_class())
-#define arch_env_get_reg_class(env,i)                  ((env)->impl->get_reg_class(i))
 #define arch_env_get_reg_class_for_mode(env,mode)      ((env)->impl->get_reg_class_for_mode((mode)))
 #define arch_env_get_call_abi(env,tp,abi)              ((env)->impl->get_call_abi((env), (tp), (abi)))
 #define arch_env_get_reg_class_alignment(env,cls)      ((env)->impl->get_reg_class_alignment((cls)))
@@ -626,6 +611,8 @@ struct arch_env_t {
 	const arch_isa_if_t   *impl;
 	unsigned               n_registers;      /**< number of registers */
 	const arch_register_t *registers;        /**< register array */
+	unsigned               n_register_classes; /**< number of register classes*/
+	const arch_register_class_t *register_classes; /**< register classes */
 	const arch_register_t *sp;               /**< The stack pointer register. */
 	const arch_register_t *bp;               /**< The base pointer register. */
 	const arch_register_class_t *link_class; /**< The static link pointer

ir/be/bechordal_main.c

@@ -424,10 +424,9 @@ static void be_ra_chordal_main(ir_graph *irg)
 	/* use one of the generic spiller */
 
 	/* Perform the following for each register class. */
-	for (j = 0, m = arch_env_get_n_reg_class(arch_env); j < m; ++j) {
+	for (j = 0, m = arch_env->n_register_classes; j < m; ++j) {
 		post_spill_env_t pse;
-		const arch_register_class_t *cls
-			= arch_env_get_reg_class(arch_env, j);
+		const arch_register_class_t *cls = &arch_env->register_classes[j];
 
 		if (arch_register_class_flags(cls) & arch_register_class_flag_manual_ra)
 			continue;

ir/be/bedump_minir.c

@@ -220,14 +220,14 @@ static void end_mapping(const char *name)
 
 static void print_regclasses(void)
 {
-	int n_classes = arch_env_get_n_reg_class(arch_env);
+	int n_classes = arch_env->n_register_classes;
 	int c;
 
 	begin_block_sequence("regclasses");
 	for (c = 0; c < n_classes; ++c) {
 		int                          n_regs;
 		int                          r;
-		const arch_register_class_t *cls = arch_env_get_reg_class(arch_env, c);
+		const arch_register_class_t *cls = &arch_env->register_classes[c];
 		if (arch_register_class_flags(cls) & arch_register_class_flag_manual_ra)
 			continue;
 

ir/be/beloopana.c

@@ -200,8 +200,8 @@ be_loopana_t *be_new_loop_pressure(ir_graph *irg,
 	if (cls != NULL) {
 		be_compute_loop_pressure(loop_ana, irg_loop, cls);
 	} else {
-		for (i = arch_env_get_n_reg_class(arch_env) - 1; i >= 0; --i) {
-			const arch_register_class_t *cls = arch_env_get_reg_class(arch_env, i);
+		for (i = arch_env->n_register_classes - 1; i >= 0; --i) {
+			const arch_register_class_t *cls = &arch_env->register_classes[i];
 			DBG((dbg, LEVEL_1, "\n=====================================================\n", cls->name));
 			DBG((dbg, LEVEL_1, " Computing register pressure for class %s:\n", cls->name));
 			DBG((dbg, LEVEL_1, "=====================================================\n", cls->name));

ir/be/bepeephole.c

@@ -193,9 +193,9 @@ static void process_block(ir_node *block, void *data)
 	(void) data;
 
 	/* construct initial register assignment */
-	n_classes = arch_env_get_n_reg_class(arch_env);
+	n_classes = arch_env->n_register_classes;
 	for (i = 0; i < n_classes; ++i) {
-		const arch_register_class_t *cls    = arch_env_get_reg_class(arch_env, i);
+		const arch_register_class_t *cls    = &arch_env->register_classes[i];
 		unsigned                     n_regs = arch_register_class_n_regs(cls);
 		memset(register_values[i], 0, sizeof(ir_node*) * n_regs);
 	}
@@ -427,10 +427,10 @@ void be_peephole_opt(ir_graph *irg)
 	arch_env = be_get_irg_arch_env(irg);
 	lv       = be_get_irg_liveness(irg);
 
-	n_classes = arch_env_get_n_reg_class(arch_env);
+	n_classes = arch_env->n_register_classes;
 	register_values = XMALLOCN(ir_node**, n_classes);
 	for (i = 0; i < n_classes; ++i) {
-		const arch_register_class_t *cls    = arch_env_get_reg_class(arch_env, i);
+		const arch_register_class_t *cls    = &arch_env->register_classes[i];
 		unsigned                     n_regs = arch_register_class_n_regs(cls);
 		register_values[i] = XMALLOCN(ir_node*, n_regs);
 	}

ir/be/beprefalloc.c

@@ -1899,7 +1899,7 @@ static void spill(void)
 static void be_pref_alloc(ir_graph *new_irg)
 {
 	const arch_env_t *arch_env = be_get_irg_arch_env(new_irg);
-	int   n_cls                = arch_env_get_n_reg_class(arch_env);
+	int   n_cls                = arch_env->n_register_classes;
 	int   c;
 
 	obstack_init(&obst);
@@ -1911,7 +1911,7 @@ static void be_pref_alloc(ir_graph *new_irg)
 	determine_block_order();
 
 	for (c = 0; c < n_cls; ++c) {
-		cls             = arch_env_get_reg_class(arch_env, c);
+		cls = &arch_env->register_classes[c];
 		if (arch_register_class_flags(cls) & arch_register_class_flag_manual_ra)
 			continue;
 

ir/be/beschedrss.c

@@ -2104,8 +2104,8 @@ static void process_block(ir_node *block, void *env)
 	rss->max_height = heights_recompute_block(rss->h, block);
 
 	/* loop over all register classes */
-	for (i = arch_env_get_n_reg_class(rss->arch_env) - 1; i >= 0; --i) {
-		const arch_register_class_t *cls = arch_env_get_reg_class(rss->arch_env, i);
+	for (i = rss->arch_env->n_register_classes - 1; i >= 0; --i) {
+		const arch_register_class_t *cls = &rss->arch_env->register_classes[i];
 
 		rss->cls = cls;
 		DBG((rss->dbg, LEVEL_1, "register class %s\n", arch_register_class_name(cls)));

ir/be/beverify.c

@@ -803,12 +803,12 @@ static void verify_block_register_allocation(ir_node *block, void *data)
 	int i, nregclasses;
 	(void) data;
 
-	nregclasses = arch_env_get_n_reg_class(arch_env);
+	nregclasses = arch_env->n_register_classes;
 	for (i = 0; i < nregclasses; ++i) {
 		ir_node *node;
 		int      idx, i2, n_regs;
 
-		regclass = arch_env_get_reg_class(arch_env, i);
+		regclass = &arch_env->register_classes[i];
 
 		assert(lv->nodes && "live sets must be computed");
 

ir/be/ia32/bearch_ia32.c

@@ -1446,6 +1446,8 @@ static ia32_isa_t ia32_isa_template = {
 		&ia32_isa_if,            /* isa interface implementation */
 		N_IA32_REGISTERS,
 		ia32_registers,
+		N_IA32_CLASSES,
+		ia32_reg_classes,
 		&ia32_registers[REG_ESP],  /* stack pointer register */
 		&ia32_registers[REG_EBP],  /* base pointer register */
 		&ia32_reg_classes[CLASS_ia32_gp],  /* static link pointer register class */
@@ -1591,28 +1593,6 @@ static void ia32_done(void *self)
 }
 
 
-/**
- * Return the number of register classes for this architecture.
- * We report always these:
- *  - the general purpose registers
- *  - the SSE floating point register set
- *  - the virtual floating point registers
- *  - the SSE vector register set
- */
-static unsigned ia32_get_n_reg_class(void)
-{
-	return N_IA32_CLASSES;
-}
-
-/**
- * Return the register class for index i.
- */
-static const arch_register_class_t *ia32_get_reg_class(unsigned i)
-{
-	assert(i < N_IA32_CLASSES);
-	return &ia32_reg_classes[i];
-}
-
 /**
  * Get the register class which shall be used to store a value of a given mode.
  * @param self The this pointer.
@@ -2214,8 +2194,6 @@ const arch_isa_if_t ia32_isa_if = {
 	ia32_init,
 	ia32_done,
 	ia32_handle_intrinsics,
-	ia32_get_n_reg_class,
-	ia32_get_reg_class,
 	ia32_get_reg_class_for_mode,
 	ia32_get_call_abi,
 	ia32_get_reg_class_alignment,

ir/be/sparc/bearch_sparc.c

@@ -297,6 +297,8 @@ static sparc_isa_t sparc_isa_template = {
 		&sparc_isa_if,                      /* isa interface implementation */
 		N_SPARC_REGISTERS,
 		sparc_registers,
+		N_SPARC_CLASSES,
+		sparc_reg_classes,
 		&sparc_registers[REG_SP],           /* stack pointer register */
 		&sparc_registers[REG_FRAME_POINTER],/* base pointer register */
 		&sparc_reg_classes[CLASS_sparc_gp], /* link pointer register class */
@@ -507,18 +509,6 @@ static void sparc_done(void *self)
 	free(isa);
 }
 
-static unsigned sparc_get_n_reg_class(void)
-{
-	return N_SPARC_CLASSES;
-}
-
-static const arch_register_class_t *sparc_get_reg_class(unsigned i)
-{
-	assert(i < N_SPARC_CLASSES);
-	return &sparc_reg_classes[i];
-}
-
-
 
 /**
  * Get the register class which shall be used to store a value of a given mode.
@@ -619,8 +609,6 @@ const arch_isa_if_t sparc_isa_if = {
 	sparc_init,
 	sparc_done,
 	NULL,                /* handle intrinsics */
-	sparc_get_n_reg_class,
-	sparc_get_reg_class,