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Zwinkau
libfirm
Commits
4f1f3573
Commit
4f1f3573
authored
Apr 19, 2007
by
Matthias Braun
Browse files
first step for generating flag datastructures, generator creates const register structs now
[r13398]
parent
0e0a81c8
Changes
6
Hide whitespace changes
Inline
Side-by-side
ir/be/arm/arm_spec.pl
View file @
4f1f3573
...
...
@@ -113,9 +113,9 @@ $comment_string_end = "*/";
{
"
name
"
=>
"
r10
",
"
type
"
=>
2
},
{
"
name
"
=>
"
r11
",
"
type
"
=>
2
},
{
"
name
"
=>
"
r12
",
"
type
"
=>
6
},
# reserved for linker
{
"
name
"
=>
"
sp
",
"
type
"
=>
6
},
# this is our stack pointer
{
"
name
"
=>
"
lr
",
"
type
"
=>
3
},
# this is our return address
{
"
name
"
=>
"
pc
",
"
type
"
=>
6
},
# this is our program counter
{
"
name
"
=>
"
sp
",
"
realname
"
=>
"
r13
",
"
type
"
=>
6
},
# this is our stack pointer
{
"
name
"
=>
"
lr
",
"
realname
"
=>
"
r14
",
"
type
"
=>
3
},
# this is our return address
{
"
name
"
=>
"
pc
",
"
realname
"
=>
"
r15
",
"
type
"
=>
6
},
# this is our program counter
{
"
mode
"
=>
"
mode_Iu
"
}
],
"
fpa
"
=>
[
...
...
ir/be/arm/bearch_arm.c
View file @
4f1f3573
...
...
@@ -709,13 +709,6 @@ static void *arm_init(FILE *file_handle) {
memcpy
(
isa
,
&
arm_isa_template
,
sizeof
(
*
isa
));
arm_register_init
(
isa
);
if
(
isa
->
gen_reg_names
)
{
/* patch register names */
arm_gp_regs
[
REG_R11
].
name
=
"r11"
;
arm_gp_regs
[
REG_SP
].
name
=
"r13"
;
arm_gp_regs
[
REG_LR
].
name
=
"r14"
;
arm_gp_regs
[
REG_PC
].
name
=
"r15"
;
}
isa
->
cg
=
NULL
;
isa
->
out
=
file_handle
;
...
...
ir/be/becopyheur4.c
View file @
4f1f3573
...
...
@@ -7,6 +7,7 @@
* @date 27.04.2007
* @id $Id$
*/
#if 0
#ifdef HAVE_CONFIG_H
#include "config.h"
...
...
@@ -200,3 +201,5 @@ int co_solve_heuristic_mst_safe(copy_opt_t *co)
del_pqueue(mst_env.chunks);
phase_free(&mst_env.ph);
}
#endif
ir/be/ia32/bearch_ia32.c
View file @
4f1f3573
...
...
@@ -69,7 +69,7 @@ typedef ir_node *(*create_const_node_func) (dbg_info *dbg, ir_graph *irg, ir_nod
static
INLINE
ir_node
*
create_const
(
ia32_code_gen_t
*
cg
,
ir_node
**
place
,
create_const_node_func
func
,
arch_register_t
*
reg
)
const
arch_register_t
*
reg
)
{
ir_node
*
block
,
*
res
;
...
...
@@ -1534,16 +1534,6 @@ static void *ia32_init(FILE *file_handle) {
ia32_build_16bit_reg_map
(
isa
->
regs_16bit
);
ia32_build_8bit_reg_map
(
isa
->
regs_8bit
);
/* patch register names of x87 registers */
ia32_st_regs
[
0
].
name
=
"st"
;
ia32_st_regs
[
1
].
name
=
"st(1)"
;
ia32_st_regs
[
2
].
name
=
"st(2)"
;
ia32_st_regs
[
3
].
name
=
"st(3)"
;
ia32_st_regs
[
4
].
name
=
"st(4)"
;
ia32_st_regs
[
5
].
name
=
"st(5)"
;
ia32_st_regs
[
6
].
name
=
"st(6)"
;
ia32_st_regs
[
7
].
name
=
"st(7)"
;
#ifndef NDEBUG
isa
->
name_obst
=
xmalloc
(
sizeof
(
*
isa
->
name_obst
));
obstack_init
(
isa
->
name_obst
);
...
...
ir/be/ia32/ia32_spec.pl
View file @
4f1f3573
...
...
@@ -148,14 +148,14 @@ $arch = "ia32";
{
mode
=>
"
mode_E
"
}
],
st
=>
[
{
name
=>
"
st0
",
type
=>
4
},
{
name
=>
"
st1
",
type
=>
4
},
{
name
=>
"
st2
",
type
=>
4
},
{
name
=>
"
st3
",
type
=>
4
},
{
name
=>
"
st4
",
type
=>
4
},
{
name
=>
"
st5
",
type
=>
4
},
{
name
=>
"
st6
",
type
=>
4
},
{
name
=>
"
st7
",
type
=>
4
},
{
name
=>
"
st0
",
realname
=>
"
st
",
type
=>
4
},
{
name
=>
"
st1
",
realname
=>
"
st(1)
",
type
=>
4
},
{
name
=>
"
st2
",
realname
=>
"
st(2)
",
type
=>
4
},
{
name
=>
"
st3
",
realname
=>
"
st(3)
",
type
=>
4
},
{
name
=>
"
st4
",
realname
=>
"
st(4)
",
type
=>
4
},
{
name
=>
"
st5
",
realname
=>
"
st(5)
",
type
=>
4
},
{
name
=>
"
st6
",
realname
=>
"
st(6)
",
type
=>
4
},
{
name
=>
"
st7
",
realname
=>
"
st(7)
",
type
=>
4
},
{
mode
=>
"
mode_E
"
}
],
fp_cw
=>
[
# the floating point control word
...
...
ir/be/scripts/generate_regalloc_if.pl
View file @
4f1f3573
...
...
@@ -16,6 +16,7 @@ our $arch;
our
%reg_classes
;
our
%nodes
;
our
%cpu
;
our
%flags
=
();
# include spec file
...
...
@@ -113,31 +114,47 @@ foreach my $class_name (keys(%reg_classes)) {
$class_ptr
=
"
&
"
.
$arch
.
"
_reg_classes[CLASS_
"
.
$class_name
.
"
]
";
$class_mode
=
pop
(
@class
)
->
{"
mode
"};
push
(
@obst_regtypes_decl
,
"
extern arch_register_t
"
.
$class_name
.
"
_regs[
$numregs
];
\n
");
push
(
@obst_regtypes_def
,
"
arch_register_t
"
.
$class_name
.
"
_regs[
$numregs
];
\n
");
push
(
@obst_regtypes_decl
,
"
extern const arch_register_t
${class_name}
_regs[
$numregs
];
\n
");
push
(
@obst_classdef
,
"
\t
CLASS_
$class_name
=
$class_idx
,
\n
");
push
(
@obst_regclasses
,
"
{
\"
$class_name
\"
,
$numregs
, NULL,
"
.
$class_name
.
"
_regs }
");
my
$idx
=
0
;
push
(
@obst_reginit
,
"
\t
/* Init of all registers in class '
$class_name
' */
\n\n
");
push
(
@obst_reginit
,
"
\t
/* set largest possible mode for '
$class_name
' */
\n
");
push
(
@obst_reginit
,
"
\t
$arch
\
_reg_classes[CLASS_
"
.
$class_name
.
"
].mode =
$class_mode
;
\n\n
");
push
(
@obst_regdef
,
"
enum reg_
"
.
$class_name
.
"
_values {
\n
");
push
(
@obst_regtypes_def
,
"
const arch_register_t
${class_name}
_regs[
$numregs
] = {
\n
");
push
(
@obst_regdef
,
"
enum reg_
${class_name}
_indices {
\n
");
foreach
(
@class
)
{
my
$ucname
=
uc
(
$_
->
{"
name
"});
my
$type
=
translate_reg_type
(
$_
->
{"
type
"});
# realname is name if not set by user
$_
->
{"
realname
"}
=
$_
->
{"
name
"}
if
(
!
exists
(
$_
->
{"
realname
"}));
my
$realname
=
$_
->
{
realname
};
my
$execunitvarname
=
get_execunit_variable_name
(
$_
->
{"
unit
"});
$reg2class
{
$_
->
{"
name
"}}
=
{
"
class
"
=>
$old_classname
,
"
index
"
=>
$idx
};
# remember reg to class for later use
push
(
@obst_regdef
,
"
\t
REG_
"
.
uc
(
$_
->
{"
name
"})
.
"
=
$idx
,
\n
");
push
(
@obst_reginit
,
"
\t
${class_name}
_regs[
$idx
].name =
\"
"
.
$_
->
{"
realname
"}
.
"
\"
;
\n
");
push
(
@obst_reginit
,
"
\t
${class_name}
_regs[
$idx
].reg_class =
$class_ptr
;
\n
");
push
(
@obst_reginit
,
"
\t
${class_name}
_regs[
$idx
].index =
$idx
;
\n
");
push
(
@obst_reginit
,
"
\t
${class_name}
_regs[
$idx
].type =
"
.
translate_reg_type
(
$_
->
{"
type
"})
.
"
;
\n
");
push
(
@obst_reginit
,
"
\t
${class_name}
_regs[
$idx
].data =
"
.
get_execunit_variable_name
(
$_
->
{"
unit
"})
.
"
;
\n
");
push
(
@obst_reginit
,
"
\n
");
push
(
@obst_regdef
,
"
\t
REG_
${ucname}
,
\n
");
push
(
@obst_regtypes_def
,
"
\t
{
\n
");
push
(
@obst_regtypes_def
,
"
\t\t\"
$realname
\"
,
\n
");
push
(
@obst_regtypes_def
,
"
\t\t
$class_ptr
,
\n
");
push
(
@obst_regtypes_def
,
"
\t\t
REG_
${ucname}
,
\n
");
push
(
@obst_regtypes_def
,
"
\t\t
$type
,
\n
");
push
(
@obst_regtypes_def
,
"
\t\t
$execunitvarname
\n
");
push
(
@obst_regtypes_def
,
"
\t
},
\n
");
# push(@obst_reginit, "\t${class_name}_regs[$idx].name = \"".$_->{"realname"}."\";\n");
# push(@obst_reginit, "\t${class_name}_regs[$idx].reg_class = $class_ptr;\n");
# push(@obst_reginit, "\t${class_name}_regs[$idx].index = $idx;\n");
# push(@obst_reginit, "\t${class_name}_regs[$idx].type = ".translate_reg_type($_->{"type"}).";\n");
# push(@obst_reginit, "\t${class_name}_regs[$idx].data = ".get_execunit_variable_name($_->{"unit"}).";\n");
# push(@obst_reginit, "\n");
$idx
++
;
}
push
(
@obst_regtypes_def
,
"
};
\n
");
$regclass2len
{
$old_classname
}
=
$idx
;
push
(
@obst_regdef
,
"
\t
$numregs
=
$idx
\n
");
push
(
@obst_regdef
,
"
};
\n\n
");
...
...
@@ -145,12 +162,22 @@ foreach my $class_name (keys(%reg_classes)) {
$class_idx
++
;
}
push
(
@obst_regdef
,
"
enum flag_indices {
\n
");
foreach
my
$flag
(
keys
(
%flags
))
{
my
%f
=
%
{
$flags
{
$flag
}
};
push
(
@obst_regdef
,
"
\t
FLAG_
$flag
,
\n
");
}
push
(
@obst_regdef
,
"
\t
FLAG_LAST
\n
");
push
(
@obst_regdef
,
"
};
\n
");
push
(
@obst_regtypes_decl
,
"
extern arch_flag_t
${arch}
_flags[FLAG_LAST];
\n
");
push
(
@obst_classdef
,
"
\t
N_CLASSES =
"
.
scalar
(
keys
(
%reg_classes
))
.
"
\n
");
push
(
@obst_classdef
,
"
};
\n\n
");
# generate node-register constraints
foreach
my
$op
(
keys
(
%nodes
))
{
my
%n
=
%
{
$nodes
{
"
$op
"
}
};
my
%n
=
%
{
$nodes
{
$op
}
};
next
if
(
!
exists
(
$n
{"
reg_req
"}));
...
...
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