Commit 51af858a authored by Christoph Mallon's avatar Christoph Mallon
Browse files

be: Check the register class instead of the mode in emit_be_Copy().

parent 8a8ec33b
......@@ -693,19 +693,19 @@ static void emit_amd64_Mov(const ir_node *node)
*/
static void emit_be_Copy(const ir_node *irn)
{
ir_mode *mode = get_irn_mode(irn);
if (arch_get_irn_register_in(irn, 0) == arch_get_irn_register_out(irn, 0)) {
arch_register_t const *const out = arch_get_irn_register_out(irn, 0);
if (arch_get_irn_register_in(irn, 0) == out) {
/* omitted Copy */
return;
}
if (mode == amd64_mode_xmm) {
amd64_emitf(irn, "movapd %^S0, %^D0");
} else if (mode_is_data(mode)) {
arch_register_class_t const *const cls = out->cls;
if (cls == &amd64_reg_classes[CLASS_amd64_gp]) {
amd64_emitf(irn, "mov %^S0, %^D0");
} else if (cls == &amd64_reg_classes[CLASS_amd64_xmm]) {
amd64_emitf(irn, "movapd %^S0, %^D0");
} else {
panic("move not supported for this mode");
panic("move not supported for this register class");
}
}
......
......@@ -603,18 +603,19 @@ static void emit_be_IncSP(const ir_node *irn)
static void emit_be_Copy(const ir_node *irn)
{
if (arch_get_irn_register_in(irn, 0) == arch_get_irn_register_out(irn, 0)) {
arch_register_t const *const out = arch_get_irn_register_out(irn, 0);
if (arch_get_irn_register_in(irn, 0) == out) {
/* omitted Copy */
return;
}
ir_mode *const mode = get_irn_mode(irn);
if (mode_is_float(mode)) {
arm_emitf(irn, "mvf %D0, %S0");
} else if (mode_is_data(mode)) {
arch_register_class_t const *const cls = out->cls;
if (cls == &arm_reg_classes[CLASS_arm_gp]) {
arm_emitf(irn, "mov %D0, %S0");
} else if (cls == &arm_reg_classes[CLASS_arm_fpa]) {
arm_emitf(irn, "mvf %D0, %S0");
} else {
panic("move not supported for this mode");
panic("move not supported for this register class");
}
}
......
......@@ -1325,14 +1325,16 @@ static const arch_register_t *get_next_fp_reg(const arch_register_t *reg)
static void emit_be_Copy(const ir_node *node)
{
ir_mode *mode = get_irn_mode(node);
const arch_register_t *src_reg = arch_get_irn_register_in(node, 0);
const arch_register_t *dst_reg = arch_get_irn_register_out(node, 0);
if (src_reg == dst_reg)
return;
if (mode_is_float(mode)) {
arch_register_class_t const *const cls = dst_reg->cls;
if (cls == &sparc_reg_classes[CLASS_sparc_gp]) {
sparc_emitf(node, "mov %S0, %D0");
} else if (cls == &sparc_reg_classes[CLASS_sparc_fp]) {
ir_mode *mode = get_irn_mode(node);
unsigned bits = get_mode_size_bits(mode);
int n = bits > 32 ? bits > 64 ? 3 : 1 : 0;
emit_fmov(node, src_reg, dst_reg);
......@@ -1341,10 +1343,8 @@ static void emit_be_Copy(const ir_node *node)
dst_reg = get_next_fp_reg(dst_reg);
emit_fmov(node, src_reg, dst_reg);
}
} else if (mode_is_data(mode)) {
sparc_emitf(node, "mov %S0, %D0");
} else {
panic("invalid mode");
panic("invalid register class");
}
}
......
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