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Zwinkau
libfirm
Commits
5427ad0b
Commit
5427ad0b
authored
Mar 31, 2011
by
Matthias Braun
Browse files
rename be_pos_XXX to n_be_XXX to be consistent with the architecture specific constants
parent
8c1f62ae
Changes
10
Hide whitespace changes
Inline
Side-by-side
ir/be/amd64/bearch_amd64.c
View file @
5427ad0b
...
...
@@ -157,7 +157,7 @@ static void transform_Reload(ir_node *node)
ir_node
*
block
=
get_nodes_block
(
node
);
dbg_info
*
dbgi
=
get_irn_dbg_info
(
node
);
ir_node
*
ptr
=
get_irg_frame
(
irg
);
ir_node
*
mem
=
get_irn_n
(
node
,
be
_pos
_Reload_mem
);
ir_node
*
mem
=
get_irn_n
(
node
,
n_
be_Reload_mem
);
ir_mode
*
mode
=
get_irn_mode
(
node
);
ir_entity
*
entity
=
be_get_frame_entity
(
node
);
const
arch_register_t
*
reg
;
...
...
@@ -185,7 +185,7 @@ static void transform_Spill(ir_node *node)
dbg_info
*
dbgi
=
get_irn_dbg_info
(
node
);
ir_node
*
ptr
=
get_irg_frame
(
irg
);
ir_node
*
mem
=
new_r_NoMem
(
irg
);
ir_node
*
val
=
get_irn_n
(
node
,
be
_pos
_Spill_val
);
ir_node
*
val
=
get_irn_n
(
node
,
n_
be_Spill_val
);
//ir_mode *mode = get_irn_mode(val);
ir_entity
*
entity
=
be_get_frame_entity
(
node
);
ir_node
*
sched_point
;
...
...
ir/be/arm/bearch_arm.c
View file @
5427ad0b
...
...
@@ -162,8 +162,8 @@ static void transform_Reload(ir_node *node)
{
ir_node
*
block
=
get_nodes_block
(
node
);
dbg_info
*
dbgi
=
get_irn_dbg_info
(
node
);
ir_node
*
ptr
=
get_irn_n
(
node
,
be
_pos
_Reload_frame
);
ir_node
*
mem
=
get_irn_n
(
node
,
be
_pos
_Reload_mem
);
ir_node
*
ptr
=
get_irn_n
(
node
,
n_
be_Reload_frame
);
ir_node
*
mem
=
get_irn_n
(
node
,
n_
be_Reload_mem
);
ir_mode
*
mode
=
get_irn_mode
(
node
);
ir_entity
*
entity
=
be_get_frame_entity
(
node
);
const
arch_register_t
*
reg
;
...
...
@@ -188,10 +188,10 @@ static void transform_Spill(ir_node *node)
{
ir_node
*
block
=
get_nodes_block
(
node
);
dbg_info
*
dbgi
=
get_irn_dbg_info
(
node
);
ir_node
*
ptr
=
get_irn_n
(
node
,
be
_pos
_Spill_frame
);
ir_node
*
ptr
=
get_irn_n
(
node
,
n_
be_Spill_frame
);
ir_graph
*
irg
=
get_irn_irg
(
node
);
ir_node
*
mem
=
new_r_NoMem
(
irg
);
ir_node
*
val
=
get_irn_n
(
node
,
be
_pos
_Spill_val
);
ir_node
*
val
=
get_irn_n
(
node
,
n_
be_Spill_val
);
ir_mode
*
mode
=
get_irn_mode
(
val
);
ir_entity
*
entity
=
be_get_frame_entity
(
node
);
ir_node
*
sched_point
;
...
...
ir/be/beabi.c
View file @
5427ad0b
...
...
@@ -661,7 +661,7 @@ static ir_node *adjust_call(be_abi_irg_t *env, ir_node *irn, ir_node *curr_sp)
Set the register class of the call address to
the backend provided class (default: stack pointer class)
*/
be_node_set_reg_class_in
(
low_call
,
be
_pos
_Call_ptr
,
call
->
cls_addr
);
be_node_set_reg_class_in
(
low_call
,
n_
be_Call_ptr
,
call
->
cls_addr
);
DBG
((
dbg
,
LEVEL_3
,
"
\t
created backend call %+F
\n
"
,
low_call
));
...
...
@@ -671,7 +671,7 @@ static ir_node *adjust_call(be_abi_irg_t *env, ir_node *irn, ir_node *curr_sp)
be_abi_call_arg_t
*
arg
=
get_call_arg
(
call
,
0
,
index
,
0
);
assert
(
arg
->
reg
!=
NULL
);
be_set_constr_single_reg_in
(
low_call
,
be
_pos
_Call_first_arg
+
i
,
be_set_constr_single_reg_in
(
low_call
,
n_
be_Call_first_arg
+
i
,
arg
->
reg
,
arch_register_req_type_none
);
}
...
...
ir/be/bechordal_main.c
View file @
5427ad0b
...
...
@@ -221,8 +221,8 @@ static void memory_operand_walker(ir_node *irn, void *env)
if
(
get_irn_n_edges
(
irn
)
==
0
)
{
ir_graph
*
irg
=
get_irn_irg
(
irn
);
sched_remove
(
irn
);
set_irn_n
(
irn
,
be
_pos
_Reload_mem
,
new_r_Bad
(
irg
));
set_irn_n
(
irn
,
be
_pos
_Reload_frame
,
new_r_Bad
(
irg
));
set_irn_n
(
irn
,
n_
be_Reload_mem
,
new_r_Bad
(
irg
));
set_irn_n
(
irn
,
n_
be_Reload_frame
,
new_r_Bad
(
irg
));
}
}
...
...
ir/be/benode.c
View file @
5427ad0b
...
...
@@ -273,15 +273,15 @@ ir_node *be_new_Spill(const arch_register_class_t *cls,
a
->
offset
=
0
;
a
->
base
.
exc
.
pin_state
=
op_pin_state_pinned
;
be_node_set_reg_class_in
(
res
,
be
_pos
_Spill_frame
,
cls_frame
);
be_node_set_reg_class_in
(
res
,
be
_pos
_Spill_val
,
cls
);
be_node_set_reg_class_in
(
res
,
n_
be_Spill_frame
,
cls_frame
);
be_node_set_reg_class_in
(
res
,
n_
be_Spill_val
,
cls
);
/*
* For spills and reloads, we return "none" as requirement for frame
* pointer, so every input is ok. Some backends need this (STA).
* Matze: we should investigate if this is really needed, this solution
* looks very hacky to me
*/
be_set_constr_in
(
res
,
be
_pos
_Spill_frame
,
arch_no_register_req
);
be_set_constr_in
(
res
,
n_
be_Spill_frame
,
arch_no_register_req
);
arch_set_out_register_req
(
res
,
0
,
arch_no_register_req
);
...
...
@@ -304,7 +304,7 @@ ir_node *be_new_Reload(const arch_register_class_t *cls,
init_node_attr
(
res
,
2
,
1
);
be_node_set_reg_class_out
(
res
,
0
,
cls
);
be_node_set_reg_class_in
(
res
,
be
_pos
_Reload_frame
,
cls_frame
);
be_node_set_reg_class_in
(
res
,
n_
be_Reload_frame
,
cls_frame
);
arch_irn_set_flags
(
res
,
arch_irn_flags_rematerializable
);
a
=
(
be_frame_attr_t
*
)
get_irn_generic_attr
(
res
);
...
...
@@ -318,7 +318,7 @@ ir_node *be_new_Reload(const arch_register_class_t *cls,
* Matze: we should investigate if this is really needed, this solution
* looks very hacky to me
*/
be_set_constr_in
(
res
,
be
_pos
_Reload_frame
,
arch_no_register_req
);
be_set_constr_in
(
res
,
n_
be_Reload_frame
,
arch_no_register_req
);
return
res
;
}
...
...
@@ -326,25 +326,25 @@ ir_node *be_new_Reload(const arch_register_class_t *cls,
ir_node
*
be_get_Reload_mem
(
const
ir_node
*
irn
)
{
assert
(
be_is_Reload
(
irn
));
return
get_irn_n
(
irn
,
be
_pos
_Reload_mem
);
return
get_irn_n
(
irn
,
n_
be_Reload_mem
);
}
ir_node
*
be_get_Reload_frame
(
const
ir_node
*
irn
)
{
assert
(
be_is_Reload
(
irn
));
return
get_irn_n
(
irn
,
be
_pos
_Reload_frame
);
return
get_irn_n
(
irn
,
n_
be_Reload_frame
);
}
ir_node
*
be_get_Spill_val
(
const
ir_node
*
irn
)
{
assert
(
be_is_Spill
(
irn
));
return
get_irn_n
(
irn
,
be
_pos
_Spill_val
);
return
get_irn_n
(
irn
,
n_
be_Spill_val
);
}
ir_node
*
be_get_Spill_frame
(
const
ir_node
*
irn
)
{
assert
(
be_is_Spill
(
irn
));
return
get_irn_n
(
irn
,
be
_pos
_Spill_frame
);
return
get_irn_n
(
irn
,
n_
be_Spill_frame
);
}
ir_node
*
be_new_Perm
(
const
arch_register_class_t
*
cls
,
ir_node
*
block
,
...
...
@@ -450,12 +450,12 @@ ir_node *be_new_Copy(const arch_register_class_t *cls, ir_node *bl, ir_node *op)
ir_node
*
be_get_Copy_op
(
const
ir_node
*
cpy
)
{
return
get_irn_n
(
cpy
,
be
_pos
_Copy_op
);
return
get_irn_n
(
cpy
,
n_
be_Copy_op
);
}
void
be_set_Copy_op
(
ir_node
*
cpy
,
ir_node
*
op
)
{
set_irn_n
(
cpy
,
be
_pos
_Copy_op
,
op
);
set_irn_n
(
cpy
,
n_
be_Copy_op
,
op
);
}
ir_node
*
be_new_Keep
(
ir_node
*
block
,
int
n
,
ir_node
*
in
[])
...
...
@@ -494,15 +494,15 @@ ir_node *be_new_Call(dbg_info *dbg, ir_graph *irg, ir_node *bl, ir_node *mem,
ir_type
*
call_tp
)
{
be_call_attr_t
*
a
;
int
real_n
=
be
_pos
_Call_first_arg
+
n
;
int
real_n
=
n_
be_Call_first_arg
+
n
;
ir_node
*
irn
;
ir_node
**
real_in
;
NEW_ARR_A
(
ir_node
*
,
real_in
,
real_n
);
real_in
[
be
_pos
_Call_mem
]
=
mem
;
real_in
[
be
_pos
_Call_sp
]
=
sp
;
real_in
[
be
_pos
_Call_ptr
]
=
ptr
;
memcpy
(
&
real_in
[
be
_pos
_Call_first_arg
],
in
,
n
*
sizeof
(
in
[
0
]));
real_in
[
n_
be_Call_mem
]
=
mem
;
real_in
[
n_
be_Call_sp
]
=
sp
;
real_in
[
n_
be_Call_ptr
]
=
ptr
;
memcpy
(
&
real_in
[
n_
be_Call_first_arg
],
in
,
n
*
sizeof
(
in
[
0
]));
irn
=
new_ir_node
(
dbg
,
irg
,
bl
,
op_be_Call
,
mode_T
,
real_n
,
real_in
);
init_node_attr
(
irn
,
real_n
,
n_outs
);
...
...
@@ -640,24 +640,24 @@ ir_node *be_new_AddSP(const arch_register_t *sp, ir_node *bl, ir_node *old_sp,
ir_node
*
sz
)
{
ir_node
*
irn
;
ir_node
*
in
[
be
_pos
_AddSP_last
];
ir_node
*
in
[
n_
be_AddSP_last
];
const
arch_register_class_t
*
cls
;
ir_graph
*
irg
;
be_node_attr_t
*
attr
;
in
[
be
_pos
_AddSP_old_sp
]
=
old_sp
;
in
[
be
_pos
_AddSP_size
]
=
sz
;
in
[
n_
be_AddSP_old_sp
]
=
old_sp
;
in
[
n_
be_AddSP_size
]
=
sz
;
irg
=
get_Block_irg
(
bl
);
irn
=
new_ir_node
(
NULL
,
irg
,
bl
,
op_be_AddSP
,
mode_T
,
be
_pos
_AddSP_last
,
in
);
init_node_attr
(
irn
,
be
_pos
_AddSP_last
,
pn_be_AddSP_last
);
irn
=
new_ir_node
(
NULL
,
irg
,
bl
,
op_be_AddSP
,
mode_T
,
n_
be_AddSP_last
,
in
);
init_node_attr
(
irn
,
n_
be_AddSP_last
,
pn_be_AddSP_last
);
attr
=
(
be_node_attr_t
*
)
get_irn_generic_attr
(
irn
);
attr
->
exc
.
pin_state
=
op_pin_state_pinned
;
/* Set output constraint to stack register. */
be_set_constr_single_reg_in
(
irn
,
be
_pos
_AddSP_old_sp
,
sp
,
be_set_constr_single_reg_in
(
irn
,
n_
be_AddSP_old_sp
,
sp
,
arch_register_req_type_none
);
be_node_set_reg_class_in
(
irn
,
be
_pos
_AddSP_size
,
arch_register_get_class
(
sp
));
be_node_set_reg_class_in
(
irn
,
n_
be_AddSP_size
,
arch_register_get_class
(
sp
));
be_set_constr_single_reg_out
(
irn
,
pn_be_AddSP_sp
,
sp
,
arch_register_req_type_produces_sp
);
...
...
@@ -669,23 +669,23 @@ ir_node *be_new_AddSP(const arch_register_t *sp, ir_node *bl, ir_node *old_sp,
ir_node
*
be_new_SubSP
(
const
arch_register_t
*
sp
,
ir_node
*
bl
,
ir_node
*
old_sp
,
ir_node
*
sz
)
{
ir_node
*
irn
;
ir_node
*
in
[
be
_pos
_SubSP_last
];
ir_node
*
in
[
n_
be_SubSP_last
];
ir_graph
*
irg
;
be_node_attr_t
*
attr
;
in
[
be
_pos
_SubSP_old_sp
]
=
old_sp
;
in
[
be
_pos
_SubSP_size
]
=
sz
;
in
[
n_
be_SubSP_old_sp
]
=
old_sp
;
in
[
n_
be_SubSP_size
]
=
sz
;
irg
=
get_Block_irg
(
bl
);
irn
=
new_ir_node
(
NULL
,
irg
,
bl
,
op_be_SubSP
,
mode_T
,
be
_pos
_SubSP_last
,
in
);
init_node_attr
(
irn
,
be
_pos
_SubSP_last
,
pn_be_SubSP_last
);
irn
=
new_ir_node
(
NULL
,
irg
,
bl
,
op_be_SubSP
,
mode_T
,
n_
be_SubSP_last
,
in
);
init_node_attr
(
irn
,
n_
be_SubSP_last
,
pn_be_SubSP_last
);
attr
=
(
be_node_attr_t
*
)
get_irn_generic_attr
(
irn
);
attr
->
exc
.
pin_state
=
op_pin_state_pinned
;
/* Set output constraint to stack register. */
be_set_constr_single_reg_in
(
irn
,
be
_pos
_SubSP_old_sp
,
sp
,
be_set_constr_single_reg_in
(
irn
,
n_
be_SubSP_old_sp
,
sp
,
arch_register_req_type_none
);
be_node_set_reg_class_in
(
irn
,
be
_pos
_SubSP_size
,
arch_register_get_class
(
sp
));
be_node_set_reg_class_in
(
irn
,
n_
be_SubSP_size
,
arch_register_get_class
(
sp
));
be_set_constr_single_reg_out
(
irn
,
pn_be_SubSP_sp
,
sp
,
arch_register_req_type_produces_sp
);
return
irn
;
...
...
@@ -732,7 +732,7 @@ ir_node *be_new_FrameAddr(const arch_register_class_t *cls_frame, ir_node *bl, i
ir_node
*
be_get_FrameAddr_frame
(
const
ir_node
*
node
)
{
assert
(
be_is_FrameAddr
(
node
));
return
get_irn_n
(
node
,
be
_pos
_FrameAddr_ptr
);
return
get_irn_n
(
node
,
n_
be_FrameAddr_ptr
);
}
ir_entity
*
be_get_FrameAddr_entity
(
const
ir_node
*
node
)
...
...
@@ -767,12 +767,12 @@ ir_node *be_new_CopyKeep_single(const arch_register_class_t *cls, ir_node *bl, i
ir_node
*
be_get_CopyKeep_op
(
const
ir_node
*
cpy
)
{
return
get_irn_n
(
cpy
,
be
_pos
_CopyKeep_op
);
return
get_irn_n
(
cpy
,
n_
be_CopyKeep_op
);
}
void
be_set_CopyKeep_op
(
ir_node
*
cpy
,
ir_node
*
op
)
{
set_irn_n
(
cpy
,
be
_pos
_CopyKeep_op
,
op
);
set_irn_n
(
cpy
,
n_
be_CopyKeep_op
,
op
);
}
static
bool
be_has_frame_entity
(
const
ir_node
*
irn
)
...
...
ir/be/benode.h
View file @
5427ad0b
...
...
@@ -75,8 +75,8 @@ void be_init_op(void);
* Position numbers for the be_Spill inputs.
*/
enum
{
be
_pos
_Spill_frame
=
0
,
be
_pos
_Spill_val
=
1
n_
be_Spill_frame
=
0
,
n_
be_Spill_val
=
1
};
/**
...
...
@@ -90,8 +90,8 @@ ir_node *be_new_Spill(const arch_register_class_t *cls,
* Position numbers for the be_Reload inputs.
*/
enum
{
be
_pos
_Reload_frame
=
0
,
be
_pos
_Reload_mem
=
1
n_
be_Reload_frame
=
0
,
n_
be_Reload_mem
=
1
};
/**
...
...
@@ -105,7 +105,7 @@ ir_node *be_new_Reload(const arch_register_class_t *cls,
* Position numbers for the be_Copy inputs.
*/
enum
{
be
_pos
_Copy_op
=
0
n_
be_Copy_op
=
0
};
/**
...
...
@@ -156,7 +156,7 @@ void be_Keep_add_node(ir_node *keep, const arch_register_class_t *cls,
* Position numbers for the be_FrameAddr inputs
*/
enum
{
be
_pos
_FrameAddr_ptr
=
0
n_
be_FrameAddr_ptr
=
0
};
/** Create a new FrameAddr node. */
...
...
@@ -172,9 +172,9 @@ ir_entity *be_get_FrameAddr_entity(const ir_node *node);
* Position numbers for the be_AddSP inputs
*/
enum
{
be
_pos
_AddSP_old_sp
=
0
,
be
_pos
_AddSP_size
=
1
,
be
_pos
_AddSP_last
=
2
n_
be_AddSP_old_sp
=
0
,
n_
be_AddSP_size
=
1
,
n_
be_AddSP_last
=
2
};
enum
{
...
...
@@ -203,9 +203,9 @@ ir_node *be_new_AddSP(const arch_register_t *sp, ir_node *block,
* Position numbers for the be_SubSP inputs
*/
enum
{
be
_pos
_SubSP_old_sp
=
0
,
be
_pos
_SubSP_size
=
1
,
be
_pos
_SubSP_last
=
2
n_
be_SubSP_old_sp
=
0
,
n_
be_SubSP_size
=
1
,
n_
be_SubSP_last
=
2
};
enum
{
...
...
@@ -282,10 +282,10 @@ unsigned be_Call_get_pop(const ir_node *call);
* Position numbers for the be_Call inputs.
*/
enum
{
be
_pos
_Call_mem
=
0
,
/**< memory input of a be_Call node */
be
_pos
_Call_sp
=
1
,
/**< stack pointer input of a be_Call node */
be
_pos
_Call_ptr
=
2
,
/**< call pointer input of a be_Call node */
be
_pos
_Call_first_arg
=
3
/**< first argument input of a be_Call node */
n_
be_Call_mem
=
0
,
/**< memory input of a be_Call node */
n_
be_Call_sp
=
1
,
/**< stack pointer input of a be_Call node */
n_
be_Call_ptr
=
2
,
/**< call pointer input of a be_Call node */
n_
be_Call_first_arg
=
3
/**< first argument input of a be_Call node */
};
/**
...
...
@@ -321,9 +321,9 @@ ir_node *be_new_Call(dbg_info *dbg, ir_graph *irg, ir_node *block, ir_node *mem,
* Position numbers for the be_Return inputs.
*/
enum
{
be
_pos
_Return_mem
=
0
,
/**< memory input of a be_Return node */
be
_pos
_Return_sp
=
1
,
/**< stack pointer input of a be_Return node */
be
_pos
_Return_val
=
2
,
/**< first "real" return value if any */
n_
be_Return_mem
=
0
,
/**< memory input of a be_Return node */
n_
be_Return_sp
=
1
,
/**< stack pointer input of a be_Return node */
n_
be_Return_val
=
2
,
/**< first "real" return value if any */
};
/**
...
...
@@ -393,7 +393,7 @@ ir_node *be_reload(const arch_register_class_t *cls, ir_node *insert,
ir_mode
*
mode
,
ir_node
*
spill
);
enum
{
be
_pos
_CopyKeep_op
=
0
n_
be_CopyKeep_op
=
0
};
ir_node
*
be_new_CopyKeep
(
const
arch_register_class_t
*
cls
,
ir_node
*
block
,
ir_node
*
src
,
int
n
,
ir_node
*
in_keep
[],
...
...
ir/be/ia32/bearch_ia32.c
View file @
5427ad0b
...
...
@@ -991,7 +991,7 @@ static void transform_to_Load(ir_node *node)
ir_node
*
noreg
=
ia32_new_NoReg_gp
(
irg
);
ir_node
*
sched_point
=
NULL
;
ir_node
*
ptr
=
get_irg_frame
(
irg
);
ir_node
*
mem
=
get_irn_n
(
node
,
be
_pos
_Reload_mem
);
ir_node
*
mem
=
get_irn_n
(
node
,
n_
be_Reload_mem
);
ir_node
*
new_op
,
*
proj
;
const
arch_register_t
*
reg
;
...
...
@@ -1045,12 +1045,12 @@ static void transform_to_Store(ir_node *node)
dbg_info
*
dbg
=
get_irn_dbg_info
(
node
);
ir_node
*
block
=
get_nodes_block
(
node
);
ir_entity
*
ent
=
be_get_frame_entity
(
node
);
const
ir_node
*
spillval
=
get_irn_n
(
node
,
be
_pos
_Spill_val
);
const
ir_node
*
spillval
=
get_irn_n
(
node
,
n_
be_Spill_val
);
ir_mode
*
mode
=
get_spill_mode
(
spillval
);
ir_node
*
noreg
=
ia32_new_NoReg_gp
(
irg
);
ir_node
*
nomem
=
new_r_NoMem
(
irg
);
ir_node
*
ptr
=
get_irg_frame
(
irg
);
ir_node
*
val
=
get_irn_n
(
node
,
be
_pos
_Spill_val
);
ir_node
*
val
=
get_irn_n
(
node
,
n_
be_Spill_val
);
ir_node
*
store
;
ir_node
*
sched_point
=
NULL
;
...
...
ir/be/ia32/ia32_transform.c
View file @
5427ad0b
...
...
@@ -3953,8 +3953,8 @@ static ir_node *gen_be_FrameAddr(ir_node *node)
static
ir_node
*
gen_be_Return
(
ir_node
*
node
)
{
ir_graph
*
irg
=
current_ir_graph
;
ir_node
*
ret_val
=
get_irn_n
(
node
,
be
_pos
_Return_val
);
ir_node
*
ret_mem
=
get_irn_n
(
node
,
be
_pos
_Return_mem
);
ir_node
*
ret_val
=
get_irn_n
(
node
,
n_
be_Return_val
);
ir_node
*
ret_mem
=
get_irn_n
(
node
,
n_
be_Return_mem
);
ir_node
*
new_ret_val
=
be_transform_node
(
ret_val
);
ir_node
*
new_ret_mem
=
be_transform_node
(
ret_mem
);
ir_entity
*
ent
=
get_irg_entity
(
irg
);
...
...
@@ -4030,8 +4030,8 @@ static ir_node *gen_be_Return(ir_node *node)
*/
static
ir_node
*
gen_be_AddSP
(
ir_node
*
node
)
{
ir_node
*
sz
=
get_irn_n
(
node
,
be
_pos
_AddSP_size
);
ir_node
*
sp
=
get_irn_n
(
node
,
be
_pos
_AddSP_old_sp
);
ir_node
*
sz
=
get_irn_n
(
node
,
n_
be_AddSP_size
);
ir_node
*
sp
=
get_irn_n
(
node
,
n_
be_AddSP_old_sp
);
ir_node
*
new_node
=
gen_binop
(
node
,
sp
,
sz
,
new_bd_ia32_SubSP
,
match_am
|
match_immediate
);
...
...
@@ -4046,8 +4046,8 @@ static ir_node *gen_be_AddSP(ir_node *node)
*/
static
ir_node
*
gen_be_SubSP
(
ir_node
*
node
)
{
ir_node
*
sz
=
get_irn_n
(
node
,
be
_pos
_SubSP_size
);
ir_node
*
sp
=
get_irn_n
(
node
,
be
_pos
_SubSP_old_sp
);
ir_node
*
sz
=
get_irn_n
(
node
,
n_
be_SubSP_size
);
ir_node
*
sp
=
get_irn_n
(
node
,
n_
be_SubSP_old_sp
);
ir_node
*
new_node
=
gen_binop
(
node
,
sp
,
sz
,
new_bd_ia32_AddSP
,
match_am
|
match_immediate
);
...
...
@@ -4687,10 +4687,10 @@ static ir_node *gen_be_Call(ir_node *node)
dbg_info
*
const
dbgi
=
get_irn_dbg_info
(
node
);
ir_node
*
const
src_block
=
get_nodes_block
(
node
);
ir_node
*
const
block
=
be_transform_node
(
src_block
);
ir_node
*
const
src_mem
=
get_irn_n
(
node
,
be
_pos
_Call_mem
);
ir_node
*
const
src_sp
=
get_irn_n
(
node
,
be
_pos
_Call_sp
);
ir_node
*
const
src_mem
=
get_irn_n
(
node
,
n_
be_Call_mem
);
ir_node
*
const
src_sp
=
get_irn_n
(
node
,
n_
be_Call_sp
);
ir_node
*
const
sp
=
be_transform_node
(
src_sp
);
ir_node
*
const
src_ptr
=
get_irn_n
(
node
,
be
_pos
_Call_ptr
);
ir_node
*
const
src_ptr
=
get_irn_n
(
node
,
n_
be_Call_ptr
);
ia32_address_mode_t
am
;
ia32_address_t
*
const
addr
=
&
am
.
addr
;
ir_node
*
mem
;
...
...
@@ -4730,7 +4730,7 @@ static ir_node *gen_be_Call(ir_node *node)
i
=
get_irn_arity
(
node
)
-
1
;
fpcw
=
be_transform_node
(
get_irn_n
(
node
,
i
--
));
for
(;
i
>=
be
_pos
_Call_first_arg
;
--
i
)
{
for
(;
i
>=
n_
be_Call_first_arg
;
--
i
)
{
arch_register_req_t
const
*
const
req
=
arch_get_register_req
(
node
,
i
);
ir_node
*
const
reg_parm
=
be_transform_node
(
get_irn_n
(
node
,
i
));
...
...
ir/be/ia32/ia32_x87.c
View file @
5427ad0b
...
...
@@ -1937,7 +1937,7 @@ static int sim_Return(x87_state *state, ir_node *n)
/* only floating point return values must reside on stack */
for
(
i
=
0
;
i
<
n_res
;
++
i
)
{
ir_node
*
res
=
get_irn_n
(
n
,
be
_pos
_Return_val
+
i
);
ir_node
*
res
=
get_irn_n
(
n
,
n_
be_Return_val
+
i
);
if
(
mode_is_float
(
get_irn_mode
(
res
)))
++
n_float_res
;
...
...
ir/be/sparc/bearch_sparc.c
View file @
5427ad0b
...
...
@@ -171,8 +171,8 @@ static void transform_Reload(ir_node *node)
{
ir_node
*
block
=
get_nodes_block
(
node
);
dbg_info
*
dbgi
=
get_irn_dbg_info
(
node
);
ir_node
*
ptr
=
get_irn_n
(
node
,
be
_pos
_Spill_frame
);
ir_node
*
mem
=
get_irn_n
(
node
,
be
_pos
_Reload_mem
);
ir_node
*
ptr
=
get_irn_n
(
node
,
n_
be_Spill_frame
);
ir_node
*
mem
=
get_irn_n
(
node
,
n_
be_Reload_mem
);
ir_mode
*
mode
=
get_irn_mode
(
node
);
ir_entity
*
entity
=
be_get_frame_entity
(
node
);
const
arch_register_t
*
reg
;
...
...
@@ -200,10 +200,10 @@ static void transform_Spill(ir_node *node)
{
ir_node
*
block
=
get_nodes_block
(
node
);
dbg_info
*
dbgi
=
get_irn_dbg_info
(
node
);
ir_node
*
ptr
=
get_irn_n
(
node
,
be
_pos
_Spill_frame
);
ir_node
*
ptr
=
get_irn_n
(
node
,
n_
be_Spill_frame
);
ir_graph
*
irg
=
get_irn_irg
(
node
);
ir_node
*
mem
=
new_r_NoMem
(
irg
);
ir_node
*
val
=
get_irn_n
(
node
,
be
_pos
_Spill_val
);
ir_node
*
val
=
get_irn_n
(
node
,
n_
be_Spill_val
);
ir_mode
*
mode
=
get_irn_mode
(
val
);
ir_entity
*
entity
=
be_get_frame_entity
(
node
);
ir_node
*
sched_point
;
...
...
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