Commit 63bcb1a3 authored by Tobias Rapp's avatar Tobias Rapp
Browse files

amd64: Floating point register permutation

parent 1c8a3d61
......@@ -687,9 +687,13 @@ static void emit_be_Perm(const ir_node *node)
arch_register_class_t const* const cls0 = reg0->reg_class;
assert(cls0 == reg1->reg_class && "Register class mismatch at Perm");
if (cls0 == &amd64_reg_classes[CLASS_amd64_gp]) {
amd64_emitf(node, "xchg %^R, %^R", reg0, reg1);
if (cls0 != &amd64_reg_classes[CLASS_amd64_gp]) {
} else if (cls0 == &amd64_reg_classes[CLASS_amd64_xmm]) {
amd64_emitf(node, "pxor %^R, %^R", reg0, reg1);
amd64_emitf(node, "pxor %^R, %^R", reg1, reg0);
amd64_emitf(node, "pxor %^R, %^R", reg0, reg1);
} else {
panic("unexpected register class in be_Perm (%+F)", node);
}
}
......
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