added feature to register additional opcodes

removed some unused variables
fixed function type

ir/be/ia32/bearch_ia32.c

@@ -419,13 +419,13 @@ static void ia32_prepare_graph(void *self) {
 	irg_walk_blkwise_graph(cg->irg, ia32_place_consts_set_modes, ia32_transform_node, cg);
 	be_dump(cg->irg, "-transformed", dump_ir_block_graph_sched);
 
-	edges_deactivate(cg->irg);
-	dead_node_elimination(cg->irg);
-	edges_activate(cg->irg);
-
 	cg->mod = old_mod;
 
 	if (cg->opt.doam) {
+		edges_deactivate(cg->irg);
+		//dead_node_elimination(cg->irg);
+		edges_activate(cg->irg);
+
 		irg_walk_blkwise_graph(cg->irg, NULL, ia32_optimize_am, cg);
 		be_dump(cg->irg, "-am", dump_ir_block_graph_sched);
 	}

ir/be/ia32/ia32_new_nodes.c

@@ -1102,5 +1102,9 @@ int ia32_compare_immop_attr(ia32_attr_t *a, ia32_attr_t *b) {
 	return 1;
 }
 
+static void ia32_register_additional_opcodes(int n) {
+	/* we don't need any additional opcodes */
+}
+
 /* Include the generated constructor functions */
 #include "gen_ia32_new_nodes.c.inl"

ir/be/ia32/ia32_optimize.c

@@ -22,7 +22,7 @@
 #undef is_NoMem
 #define is_NoMem(irn) (get_irn_op(irn) == op_NoMem)
 
-typedef int *is_op_func_t(const ir_node *n);
+typedef int is_op_func_t(const ir_node *n);
 
 static int be_is_NoReg(be_abi_irg_t *babi, const ir_node *irn) {
 	if (be_abi_get_callee_save_irn(babi, &ia32_gp_regs[REG_XXX]) == irn ||
@@ -311,7 +311,6 @@ static int is_TestJmp_replacement(ir_node *cand, ir_node *irn) {
 	ir_node *in2       = get_irn_n(irn, 1);
 	int      i, n      = get_irn_arity(cand);
 	int      same_args = 0;
-	char    *c1, *c2;
 
 	for (i = 0; i < n - 1; i++) {
 		if (get_irn_n(cand, i)     == in1 &&
@@ -358,9 +357,8 @@ static int is_CondJmp_cand(const ir_node *irn) {
  * Checks if the arguments of cand are the same of irn.
  */
 static int is_CondJmp_replacement(ir_node *cand, ir_node *irn) {
-	int      i, n      = get_irn_arity(cand);
-	int      same_args = 0;
-	char    *c1, *c2;
+	int i, n      = get_irn_arity(cand);
+	int same_args = 0;
 
 	for (i = 0; i < n; i++) {
 		if (get_irn_n(cand, i) == get_irn_n(irn, i)) {

ir/be/ia32/ia32_spec.pl

@@ -3,12 +3,14 @@
 # This is the specification for the ia32 assembler Firm-operations
 
 # the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
-
 $arch = "ia32";
 
 # this string marks the beginning of a comment in emit
 $comment_string = "/*";
 
+# the number of additional opcodes you want to register
+$additional_opcodes = 0;
+
 # The node description is done as a perl hash initializer with the
 # following structure:
 #

ir/be/scripts/generate_new_opcodes.pl

@@ -16,6 +16,7 @@ my $cur_op     = "";
 my $line_nr    = 0;
 
 our $arch;
+our $additional_opcodes;
 our %nodes;
 
 # include spec file
@@ -50,6 +51,9 @@ my $cmp_attr_func;
 my $temp;
 my $n_opcodes = 2;    # we have two additional border opcodes (lowest/highest)
 
+# for registering additional opcodes
+$n_opcodes += $additional_opcodes if (defined($additional_opcodes));
+
 push(@obst_header, "void ".$arch."_create_opcodes(void);\n");
 
 foreach my $op (keys(%nodes)) {
@@ -313,7 +317,10 @@ void $arch\_create_opcodes(void) {
 ENDOFMAIN
 
 print OUT @obst_new_irop;
-print OUT "\n  $arch\_opcode_end = cur_opcode;\n";
+print OUT "\n  $arch\_register_additional_opcodes(cur_opcode);\n";
+print OUT "  $arch\_opcode_end = cur_opcode";
+print OUT " + $additional_opcodes" if (defined($additional_opcodes));
+print OUT ";\n";
 print OUT "}\n";
 
 close(OUT);