Skip to content

GitLab

Commit 6aceb043 authored by Christian Würdig's avatar Christian Würdig
Browse files

fixed spill lowering 

fixed cmp with immediate
emit %cl for shift/rotate ops
fixed some minor bugs
parent 011d0c93
Hide whitespace changes
Inline Side-by-side
ir/be/ia32/bearch_ia32.c
View file @ 6aceb043
......@@ -496,6 +496,16 @@ static void ia32_finish_irg_walker(ir_node *irn, void *env) {
}
}
/* If we have a CondJmp with immediate, we need to */
/* check if it's the right operand, otherwise we have */
/* to change it, as CMP doesn't support immediate as */
/* left operands. */
if (is_ia32_CondJmp(irn) && (is_ia32_ImmConst(irn) || is_ia32_ImmSymConst(irn)) && op_tp == ia32_AddrModeS) {
long pnc = get_negated_pnc(get_ia32_pncode(irn), get_ia32_res_mode(irn));
set_ia32_op_type(irn, ia32_AddrModeD);
set_ia32_pncode(irn, pnc);
}
/* check if there is a sub which need to be transformed */
ia32_transform_sub_to_neg_add(irn, cg);
......@@ -579,8 +589,9 @@ static void transform_to_Load(ia32_transform_env_t *env) {
reg = arch_get_irn_register(env->cg->arch_env, irn);
arch_set_irn_register(env->cg->arch_env, new_op, reg);
exchange(irn, proj);
SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
exchange(irn, proj);
}
/**
......@@ -614,7 +625,7 @@ static void transform_to_Store(ia32_transform_env_t *env) {
set_ia32_am_support(new_op, ia32_am_Dest);
set_ia32_op_type(new_op, ia32_AddrModeD);
set_ia32_am_flavour(new_op, ia32_B);
set_ia32_ls_mode(new_op, get_irn_mode(val));
set_ia32_ls_mode(new_op, mode);
set_ia32_frame_ent(new_op, ent);
set_ia32_use_frame(new_op);
......@@ -627,8 +638,9 @@ static void transform_to_Store(ia32_transform_env_t *env) {
sched_remove(irn);
}
exchange(irn, proj);
SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
exchange(irn, proj);
}
/**
......@@ -654,7 +666,8 @@ static void ia32_after_ra_walker(ir_node *node, void *env) {
transform_to_Load(&tenv);
}
else if (be_is_Spill(node)) {
tenv.mode = get_irn_mode(be_get_Spill_context(node));
/* we always spill the whole register */
tenv.mode = mode_is_float(get_irn_mode(be_get_Spill_context(node))) ? mode_D : mode_Is;
transform_to_Store(&tenv);
}
}
......
ir/be/ia32/bearch_ia32_t.h
View file @ 6aceb043
......@@ -9,6 +9,12 @@
#include "set.h"
#include "../be.h"
#ifdef NDEBUG
#define SET_IA32_ORIG_NODE(n, o)
#else
#define SET_IA32_ORIG_NODE(n, o) set_ia32_orig_node(n, o);
#endif /* NDEBUG */
/* some typedefs */
/**
......
ir/be/ia32/ia32_emitter.c
View file @ 6aceb043
......@@ -313,12 +313,18 @@ char *ia32_emit_binop(const ir_node *n, ia32_emit_env_t *env) {
const arch_register_t *in2 = get_in_reg(n, 3);
const arch_register_t *out = PRODUCES_RESULT(n) ? get_out_reg(n, 0) : NULL;
const arch_register_t *in;
const char *in_name;
in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
out = out ? out : in1;
in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
out = out ? out : in1;
in_name = arch_register_get_name(in);
snprintf(buf, SNPRINTF_BUF_LEN, "%%%s, %%%s", \
arch_register_get_name(out), arch_register_get_name(in));
if (is_ia32_emit_cl(n)) {
assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in) && "shift operation needs ecx");
in_name = "cl";
}
snprintf(buf, SNPRINTF_BUF_LEN, "%%%s, %%%s", arch_register_get_name(out), in_name);
}
break;
case ia32_AddrModeS:
......@@ -340,10 +346,17 @@ char *ia32_emit_binop(const ir_node *n, ia32_emit_env_t *env) {
else {
const arch_register_t *in1 = get_in_reg(n, 2);
ir_mode *mode = get_ia32_res_mode(n);
const char *in_name;
mode = mode ? mode : get_ia32_ls_mode(n);
in_name = ia32_get_reg_name_for_mode(env, mode, in1);
if (is_ia32_emit_cl(n)) {
assert(REGS_ARE_EQUAL(&ia32_gp_regs[REG_ECX], in1) && "shift operation needs ecx");
in_name = "cl";
}
mode = mode ? mode : get_ia32_ls_mode(n);
lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s, %%%s",
ia32_emit_am(n, env), ia32_get_reg_name_for_mode(env, mode, in1));
lc_esnprintf(ia32_get_arg_env(), buf, SNPRINTF_BUF_LEN, "%s, %%%s", ia32_emit_am(n, env), in_name);
}
break;
default:
......@@ -545,7 +558,7 @@ static const struct cmp2conditon_t cmp2condition_u[] = {
{ NULL, pn_Cmp_False }, /* always false */
{ "e", pn_Cmp_Eq }, /* == */
{ "b", pn_Cmp_Lt }, /* < */
{ "be", pn_Cmp_Le }, /* <= */
{ "be", pn_Cmp_Le }, /* <= */
{ "a", pn_Cmp_Gt }, /* > */
{ "ae", pn_Cmp_Ge }, /* >= */
{ "ne", pn_Cmp_Lg }, /* != */
......@@ -670,7 +683,7 @@ static void CondJmp_emitter(const ir_node *irn, ia32_emit_env_t *env) {
snprintf(cmd_buf, SNPRINTF_BUF_LEN, "cmp %s", ia32_emit_binop(irn, env));
lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
IA32_DO_EMIT(irn);
finish_CondJmp(F, irn, get_irn_mode(get_irn_n(irn, 2)));
finish_CondJmp(F, irn, get_ia32_res_mode(irn));
}
/**
......@@ -707,7 +720,7 @@ static void TestJmp_emitter(const ir_node *irn, ia32_emit_env_t *env) {
lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
IA32_DO_EMIT(irn);
finish_CondJmp(F, irn, get_irn_mode(get_irn_n(irn, 0)));
finish_CondJmp(F, irn, get_ia32_res_mode(irn));
#undef IA32_IS_IMMOP
}
......@@ -725,9 +738,9 @@ static void emit_ia32_CJmp(const ir_node *irn, ia32_emit_env_t *env) {
char cmnt_buf[SNPRINTF_BUF_LEN];
snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F omitted redundant test/cmp */", irn);
lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F omitted redundant test */", irn);
IA32_DO_EMIT(irn);
finish_CondJmp(F, irn, get_irn_mode(get_irn_n(irn, 0)));
finish_CondJmp(F, irn, get_ia32_res_mode(irn));
}
static void emit_ia32_CJmpAM(const ir_node *irn, ia32_emit_env_t *env) {
......@@ -738,7 +751,7 @@ static void emit_ia32_CJmpAM(const ir_node *irn, ia32_emit_env_t *env) {
snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F omitted redundant test/cmp */", irn);
IA32_DO_EMIT(irn);
finish_CondJmp(F, irn, get_irn_mode(get_irn_n(irn, 2)));
finish_CondJmp(F, irn, get_ia32_res_mode(irn));
}
/*********************************************************
......@@ -1282,59 +1295,6 @@ static void emit_be_Perm(const ir_node *irn, ia32_emit_env_t *emit_env) {
/**
* Emits code for an 8Bit Store.
*/
static void emit_ia32_Store8Bit(const ir_node *irn, ia32_emit_env_t *emit_env) {
FILE *F = emit_env->out;
char cmd_buf[SNPRINTF_BUF_LEN], cmnt_buf[SNPRINTF_BUF_LEN];
const arch_register_t *in1 = get_in_reg(irn, 2);
ir_mode *mode = get_ia32_ls_mode(irn);
/* In case an 8Bit SPill got transformed into an 8Bit Store, the */
/* register allocator had no chance to fulfill requirements. */
/* Check if we have a valid 8Bit register, otherwise emit a */
/* workaround. */
if (REGS_ARE_EQUAL(in1, &ia32_gp_regs[REG_EAX]) ||
REGS_ARE_EQUAL(in1, &ia32_gp_regs[REG_EBX]) ||
REGS_ARE_EQUAL(in1, &ia32_gp_regs[REG_ECX]) ||
REGS_ARE_EQUAL(in1, &ia32_gp_regs[REG_EDX]) ||
is_ia32_ImmConst(irn) ||
is_ia32_ImmSymConst(irn))
{
lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "mov %s", ia32_emit_binop(irn, emit_env));
lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn);
IA32_DO_EMIT(irn);
}
else {
snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* begin 8Bit Spill workaround %+F */", irn);
IA32_DO_EMIT(irn);
snprintf(cmd_buf, SNPRINTF_BUF_LEN, "push %%eax");
snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* save %%eax */");
IA32_DO_EMIT(irn);
snprintf(cmd_buf, SNPRINTF_BUF_LEN, "mov %%eax, %%%s", arch_register_get_name(in1));
snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* copy 8Bit value into %%eax */");
IA32_DO_EMIT(irn);
snprintf(cmd_buf, SNPRINTF_BUF_LEN, "mov %s, %%al", ia32_emit_am(irn, emit_env));
snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* store 8Bit value */");
IA32_DO_EMIT(irn);
snprintf(cmd_buf, SNPRINTF_BUF_LEN, "pop %%eax", ia32_emit_am(irn, emit_env));
snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* restore %%eax */");
IA32_DO_EMIT(irn);
snprintf(cmd_buf, SNPRINTF_BUF_LEN, " ");
lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* end of workaround %+F */", irn);
IA32_DO_EMIT(irn);
}
}
/***********************************************************************************
* _ __ _
* (_) / _| | |
......@@ -1374,7 +1334,6 @@ static void ia32_register_emitters(void) {
IA32_EMIT(Conv_FP2FP);
IA32_EMIT(Conv_I2I);
IA32_EMIT(Conv_I2I8Bit);
IA32_EMIT(Store8Bit);
/* benode emitter */
BE_EMIT(Call);
......@@ -1435,7 +1394,6 @@ static void ia32_emit_func_prolog(FILE *F, ir_graph *irg) {
entity *irg_ent = get_irg_entity(irg);
const char *irg_name = get_entity_name(irg_ent);
fprintf(F, "\t.text\n");
if (get_entity_visibility(irg_ent) == visibility_external_visible) {
fprintf(F, ".globl %s\n", irg_name);
}
......
ir/be/ia32/ia32_gen_decls.c
View file @ 6aceb043
......@@ -591,7 +591,7 @@ void ia32_gen_decls(FILE *out) {
size = obstack_object_size(&comm);
cp = obstack_finish(&comm);
if (size > 0) {
fprintf(out, "\t.common\n");
fprintf(out, "\t.text\n");
fwrite(cp, 1, size, out);
}
......
ir/be/ia32/ia32_new_nodes.c
View file @ 6aceb043
......@@ -185,7 +185,7 @@ static int dump_node_ia32(ir_node *n, FILE *F, dump_reason_t reason) {
case dump_node_nodeattr_txt:
if (is_ia32_ImmConst(n) || is_ia32_ImmSymConst(n)) {
char *pref = is_ia32_ImmSymConst(n) ? "SymC" : "";
char *pref = is_ia32_ImmSymConst(n) ? "SymC" : "";
const char *cnst = get_ia32_cnst(n);
fprintf(F, "[%s%s]", pref, cnst ? cnst : "NONE");
......@@ -669,6 +669,30 @@ int is_ia32_commutative(const ir_node *node) {
return attr->data.is_commutative;
}
/**
* Sets node emit_cl.
*/
void set_ia32_emit_cl(ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
attr->data.emit_cl = 1;
}
/**
* Clears node emit_cl.
*/
void clear_ia32_emit_cl(ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
attr->data.emit_cl = 0;
}
/**
* Checks if node is commutative.
*/
int is_ia32_emit_cl(const ir_node *node) {
ia32_attr_t *attr = get_ia32_attr(node);
return attr->data.emit_cl;
}
/**
* Gets the mode of the stored/loaded value (only set for Store/Load)
*/
......
ir/be/ia32/ia32_new_nodes.h
View file @ 6aceb043
......@@ -161,6 +161,21 @@ void clear_ia32_commutative(ir_node *node);
*/
int is_ia32_commutative(const ir_node *node);
/**
* Sets node emit_cl.
*/
void set_ia32_emit_cl(ir_node *node);
/**
* Clears node emit_cl.
*/
void clear_ia32_emit_cl(ir_node *node);
/**
* Checks if node is commutative.
*/
int is_ia32_emit_cl(const ir_node *node);
/**
* Gets the mode of the stored/loaded value (only set for Store/Load)
*/
......
ir/be/ia32/ia32_nodes_attr.h
View file @ 6aceb043
......@@ -85,7 +85,9 @@ typedef struct _ia32_attr_t {
unsigned is_commutative:1; /**< indicates whether op is commutative or not */
unsigned n_res:10; /**< number of results produced by this node */
unsigned emit_cl:1; /**< indicates whether we must emit cl instead of ecx (needed for shifts) */
unsigned n_res:9; /**< number of results produced by this node */
} data;
struct obstack *am_offs; /**< offsets for AddrMode */
......
ir/be/ia32/ia32_optimize.c
View file @ 6aceb043
......@@ -363,11 +363,11 @@ static int is_CondJmp_cand(const ir_node *irn) {
*/
static int is_CondJmp_replacement(ir_node *cand, ir_node *irn) {
int i, n = get_irn_arity(cand);
int same_args = 0;
int same_args = 1;
for (i = 0; i < n; i++) {
if (get_irn_n(cand, i) == get_irn_n(irn, i)) {
same_args = 1;
same_args = 0;
break;
}
}
......
ir/be/ia32/ia32_spec.pl
View file @ 6aceb043
......@@ -199,7 +199,7 @@ $additional_opcodes = 0;
"comment" => "construct Mul: Mul(a, b) = Mul(b, a) = a * b",
"cmp_attr" => " return ia32_compare_immop_attr(attr_a, attr_b);\n",
"reg_req" => { "in" => [ "gp", "gp", "gp", "gp", "none" ], "out" => [ "eax in_r3", "edx in_r4" ] },
"emit" => '. imul %ia32_emit_unop /* Mulh(%A1, %A2) -> %D1 */'
"emit" => '. imul %ia32_emit_binop /* Mulh(%A1, %A2) -> %D1 */'
},
"And" => {
......@@ -462,7 +462,8 @@ $additional_opcodes = 0;
"state" => "exc_pinned",
"comment" => "construct 8Bit Store: Store(ptr, val, mem) = ST ptr,val",
"cmp_attr" => " return ia32_compare_immop_attr(attr_a, attr_b);\n",
"reg_req" => { "in" => [ "gp", "gp", "eax ebx ecx edx", "none" ] }
"reg_req" => { "in" => [ "gp", "gp", "eax ebx ecx edx", "none" ] },
"emit" => '. mov %ia32_emit_binop /* Store(%A3) -> (%A1) */'
},
"Lea" => {
......
ir/be/ia32/ia32_transform.c
View file @ 6aceb043
......@@ -36,13 +36,6 @@
#include "gen_ia32_regalloc_if.h"
#ifdef NDEBUG
#define SET_IA32_ORIG_NODE(n, o)
#else
#define SET_IA32_ORIG_NODE(n, o) set_ia32_orig_node(n, o);
#endif /* NDEBUG */
#define SFP_SIGN "0x80000000"
#define DFP_SIGN "0x8000000000000000"
#define SFP_ABS "0x7FFFFFFF"
......@@ -153,7 +146,7 @@ static ident *gen_fp_known_const(ir_mode *mode, ia32_known_const_t kct) {
/**
* Prints the old node name on cg obst and returns a pointer to it.
*/
const char *get_old_node_name(ia32_transform_env_t *env) {
const char *ia32_get_old_node_name(ia32_transform_env_t *env) {
ia32_isa_t *isa = (ia32_isa_t *)env->cg->arch_env->isa;
lc_eoprintf(firm_get_arg_env(), isa->name_obst, "%+F", env->irn);
......@@ -254,7 +247,7 @@ static ir_node *gen_binop(ia32_transform_env_t *env, ir_node *op1, ir_node *op2,
}
}
SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
set_ia32_res_mode(new_op, mode);
......@@ -331,9 +324,10 @@ static ir_node *gen_shift_binop(ia32_transform_env_t *env, ir_node *op1, ir_node
/* set AM support */
set_ia32_am_support(new_op, ia32_am_Dest);
SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
set_ia32_res_mode(new_op, mode);
set_ia32_emit_cl(new_op);
return new_rd_Proj(dbg, irg, block, new_op, mode, 0);
}
......@@ -369,7 +363,7 @@ static ir_node *gen_unop(ia32_transform_env_t *env, ir_node *op, construct_unop_
set_ia32_am_support(new_op, ia32_am_Dest);
}
SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
set_ia32_res_mode(new_op, mode);
......@@ -493,7 +487,7 @@ static ir_node *gen_Add(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
}
}
SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
set_ia32_res_mode(new_op, mode);
......@@ -633,7 +627,7 @@ static ir_node *gen_Max(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
else {
new_op = new_rd_ia32_Max(env->dbg, env->irg, env->block, op1, op2, env->mode);
set_ia32_am_support(new_op, ia32_am_None);
SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
}
return new_op;
......@@ -658,7 +652,7 @@ static ir_node *gen_Min(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
else {
new_op = new_rd_ia32_Min(env->dbg, env->irg, env->block, op1, op2, env->mode);
set_ia32_am_support(new_op, ia32_am_None);
SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
}
return new_op;
......@@ -778,7 +772,7 @@ static ir_node *gen_Sub(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
}
}
SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
set_ia32_res_mode(new_op, mode);
......@@ -859,7 +853,7 @@ static ir_node *generate_DivMod(ia32_transform_env_t *env, ir_node *dividend, ir
be_new_Keep(&ia32_reg_classes[CLASS_ia32_gp], irg, block, 1, in_keep);
}
SET_IA32_ORIG_NODE(res, get_old_node_name(env));
SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(env));
set_ia32_res_mode(res, mode_Is);
......@@ -924,7 +918,7 @@ static ir_node *gen_Quot(ia32_transform_env_t *env, ir_node *op1, ir_node *op2)
set_ia32_am_support(new_op, ia32_am_Source);
}
set_ia32_res_mode(new_op, get_irn_mode(get_proj_for_pn(env->irn, pn_Quot_res)));
SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
return new_op;
}
......@@ -1074,7 +1068,7 @@ static ir_node *gen_Minus(ia32_transform_env_t *env, ir_node *op) {
set_ia32_sc(new_op, name);
SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
set_ia32_res_mode(new_op, env->mode);
set_ia32_immop_type(new_op, ia32_ImmSymConst);
......@@ -1083,7 +1077,7 @@ static ir_node *gen_Minus(ia32_transform_env_t *env, ir_node *op) {
}
else {
new_op = new_rd_ia32_vfchs(env->dbg, env->irg, env->block, op, env->mode);
SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
}
}
else {
......@@ -1137,7 +1131,7 @@ static ir_node *gen_Abs(ia32_transform_env_t *env, ir_node *op) {
set_ia32_sc(res, name);
SET_IA32_ORIG_NODE(res, get_old_node_name(env));
SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(env));
set_ia32_res_mode(res, mode);
set_ia32_immop_type(res, ia32_ImmSymConst);
......@@ -1146,25 +1140,25 @@ static ir_node *gen_Abs(ia32_transform_env_t *env, ir_node *op) {
}
else {
res = new_rd_ia32_vfabs(dbg, irg, block, op, mode);
SET_IA32_ORIG_NODE(res, get_old_node_name(env));
SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(env));
}
}
else {
res = new_rd_ia32_Cdq(dbg, irg, block, op, mode_T);
SET_IA32_ORIG_NODE(res, get_old_node_name(env));
SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(env));
set_ia32_res_mode(res, mode);
p_eax = new_rd_Proj(dbg, irg, block, res, mode, pn_EAX);
p_edx = new_rd_Proj(dbg, irg, block, res, mode, pn_EDX);
res = new_rd_ia32_Eor(dbg, irg, block, noreg_gp, noreg_gp, p_eax, p_edx, nomem, mode_T);
SET_IA32_ORIG_NODE(res, get_old_node_name(env));
SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(env));
set_ia32_res_mode(res, mode);
res = new_rd_Proj(dbg, irg, block, res, mode, 0);
res = new_rd_ia32_Sub(dbg, irg, block, noreg_gp, noreg_gp, res, p_edx, nomem, mode_T);
SET_IA32_ORIG_NODE(res, get_old_node_name(env));
SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(env));
set_ia32_res_mode(res, mode);
res = new_rd_Proj(dbg, irg, block, res, mode, 0);
......@@ -1220,7 +1214,7 @@ static ir_node *gen_Load(ia32_transform_env_t *env) {
set_ia32_am_flavour(new_op, am_flav);
set_ia32_ls_mode(new_op, mode);
SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
return new_op;
}
......@@ -1300,7 +1294,7 @@ static ir_node *gen_Store(ia32_transform_env_t *env) {
set_ia32_ls_mode(new_op, get_irn_mode(val));
set_ia32_immop_type(new_op, immop);
SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
return new_op;
}
......@@ -1358,12 +1352,13 @@ static ir_node *gen_Cond(ia32_transform_env_t *env) {
}
res = new_rd_ia32_TestJmp(dbg, irg, block, op1, op2, mode_T);
set_ia32_pncode(res, get_Proj_proj(sel));
set_ia32_res_mode(res, get_irn_mode(op1));
if (cnst) {
copy_ia32_Immop_attr(res, and);
}
SET_IA32_ORIG_NODE(res, get_old_node_name(env));
SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(env));
return res;
}
}
......@@ -1375,6 +1370,7 @@ static ir_node *gen_Cond(ia32_transform_env_t *env) {
res = new_rd_ia32_CondJmp(dbg, irg, block, noreg, noreg, expr, noreg, nomem, mode_T);
}
set_ia32_Immop_attr(res, cnst);
set_ia32_res_mode(res, get_irn_mode(expr));
}
else {
if (mode_is_float(get_irn_mode(cmp_a))) {
......@@ -1383,6 +1379,7 @@ static ir_node *gen_Cond(ia32_transform_env_t *env) {
else {
res = new_rd_ia32_CondJmp(dbg, irg, block, noreg, noreg, cmp_a, cmp_b, nomem, mode_T);
}
set_ia32_res_mode(res, get_irn_mode(cmp_a));
}
set_ia32_pncode(res, get_Proj_proj(sel));
......@@ -1391,9 +1388,10 @@ static ir_node *gen_Cond(ia32_transform_env_t *env) {
else {
res = new_rd_ia32_SwitchJmp(dbg, irg, block, sel, mode_T);
set_ia32_pncode(res, get_Cond_defaultProj(node));
set_ia32_res_mode(res, get_irn_mode(sel));
}
SET_IA32_ORIG_NODE(res, get_old_node_name(env));
SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(env));
return res;
}
......@@ -1437,7 +1435,7 @@ static ir_node *gen_CopyB(ia32_transform_env_t *env) {
set_ia32_immop_type(res, ia32_ImmConst);
}
SET_IA32_ORIG_NODE(res, get_old_node_name(env));
SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(env));
return res;
}
......@@ -1455,7 +1453,7 @@ static ir_node *gen_Mux(ia32_transform_env_t *env) {
ir_node *new_op = new_rd_ia32_CMov(env->dbg, env->irg, env->block, \
get_Mux_sel(node), get_Mux_false(node), get_Mux_true(node), env->mode);
SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
return new_op;
}
......@@ -1509,7 +1507,7 @@ static ir_node *gen_Mux(ia32_transform_env_t *env) {
// proj = new_rd_Proj(dbg, irg, block, new_op, src_mode, 0);
// set_ia32_Immop_tarval(new_op, new_tarval_from_long(n - m, mode_Is));
// set_ia32_am_support(new_op, ia32_am_Source);
// SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
// SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
// /* ASHR Sn, n - m */
// new_op = new_rd_ia32_Shrs(dbg, irg, block, noreg, noreg, proj, noreg, nomem, mode_T);
// set_ia32_Immop_tarval(new_op, new_tarval_from_long(n - m, mode_Is));
......@@ -1566,7 +1564,7 @@ static ir_node *gen_Conv(ia32_transform_env_t *env, ir_node *op) {
new_op = new_rd_ia32_Conv_FP2I(dbg, irg, block, noreg, noreg, op, nomem, mode_T);
/* if target mode is not int: add an additional downscale convert */
if (tgt_bits < 32) {
SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
set_ia32_res_mode(new_op, tgt_mode);
set_ia32_am_support(new_op, ia32_am_Source);
......@@ -1607,7 +1605,7 @@ static ir_node *gen_Conv(ia32_transform_env_t *env, ir_node *op) {
}
if (new_op) {
SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));
SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
set_ia32_res_mode(new_op, tgt_mode);
set_ia32_am_support(new_op, ia32_am_Source);
......@@ -1663,7 +1661,7 @@ static ir_node *gen_StackParam(ia32_transform_env_t *env) {
set_ia32_am_flavour(new_op, ia32_B);
set_ia32_ls_mode(new_op, mode);
SET_IA32_ORIG_NODE(new_op, get_old_node_name(env));