Commit 6b240a34 authored by Christoph Mallon's avatar Christoph Mallon
Browse files

be: Introduce a constraint for memory outputs.

parent 8d14210e
......@@ -184,7 +184,7 @@ Jmp => {
Start => {
irn_flags => [ "schedule_first" ],
state => "pinned",
out_reqs => [ "sp:I", "r0", "r1", "r2", "r3", "none" ],
out_reqs => [ "sp:I", "r0", "r1", "r2", "r3", "mem" ],
outs => [ "stack", "arg0", "arg1", "arg2", "arg3", "M" ],
ins => [],
},
......@@ -205,8 +205,8 @@ Load => {
op_flags => [ "uses_memory" ],
irn_flags => [ "rematerializable" ],
state => "exc_pinned",
in_reqs => [ "none", "gp" ],
out_reqs => [ "gp", "none" ],
in_reqs => [ "mem", "gp" ],
out_reqs => [ "gp", "mem" ],
ins => [ "mem", "ptr" ],
outs => [ "res", "M" ],
emit => '%D0 = load (%S1)',
......@@ -216,8 +216,8 @@ Store => {
op_flags => [ "uses_memory" ],
irn_flags => [ "rematerializable" ],
state => "exc_pinned",
in_reqs => [ "none", "gp", "gp" ],
out_reqs => [ "none" ],
in_reqs => [ "mem", "gp", "gp" ],
out_reqs => [ "mem" ],
ins => [ "mem", "ptr", "val" ],
outs => [ "M" ],
mode => "mode_M",
......@@ -270,8 +270,8 @@ fLoad => {
op_flags => [ "uses_memory" ],
irn_flags => [ "rematerializable" ],
state => "exc_pinned",
in_reqs => [ "none", "gp" ],
out_reqs => [ "fp", "none" ],
in_reqs => [ "mem", "gp" ],
out_reqs => [ "fp", "mem" ],
ins => [ "mem", "ptr" ],
outs => [ "res", "M" ],
emit => '%D0 = fload (%S1)',
......@@ -281,8 +281,8 @@ fStore => {
op_flags => [ "uses_memory" ],
irn_flags => [ "rematerializable" ],
state => "exc_pinned",
in_reqs => [ "none", "gp", "fp" ],
out_reqs => [ "none" ],
in_reqs => [ "mem", "gp", "fp" ],
out_reqs => [ "mem" ],
ins => [ "mem", "ptr", "val" ],
outs => [ "M" ],
mode => "mode_M",
......
......@@ -243,7 +243,7 @@ static ir_node *gen_Return(ir_node *node)
arch_register_req_t const **const reqs = be_allocate_in_reqs(irg, n_ins);
in[n_TEMPLATE_Return_mem] = be_transform_node(get_Return_mem(node));
reqs[n_TEMPLATE_Return_mem] = arch_no_register_req;
reqs[n_TEMPLATE_Return_mem] = arch_memory_req;
in[n_TEMPLATE_Return_stack] = get_irg_frame(irg);
reqs[n_TEMPLATE_Return_stack] = TEMPLATE_registers[REG_SP].single_req;
......@@ -269,7 +269,7 @@ static ir_node *gen_Phi(ir_node *node)
if (mode_needs_gp_reg(mode)) {
req = TEMPLATE_reg_classes[CLASS_TEMPLATE_gp].class_req;
} else {
req = arch_no_register_req;
req = arch_memory_req;
}
return be_transform_phi(node, req);
......
......@@ -83,7 +83,7 @@ my $binop = {
irn_flags => [ "modify_flags" ],
state => "exc_pinned",
in_reqs => "...",
out_reqs => [ "gp", "flags", "none" ],
out_reqs => [ "gp", "flags", "mem" ],
outs => [ "res", "flags", "M" ],
attr_type => "amd64_binop_addr_attr_t",
attr => "const amd64_binop_addr_attr_t *attr_init",
......@@ -93,7 +93,7 @@ my $binop_commutative = {
irn_flags => [ "modify_flags", "rematerializable", "commutative" ],
state => "exc_pinned",
in_reqs => "...",
out_reqs => [ "gp", "flags", "none" ],
out_reqs => [ "gp", "flags", "mem" ],
outs => [ "res", "flags", "M" ],
attr_type => "amd64_binop_addr_attr_t",
attr => "const amd64_binop_addr_attr_t *attr_init",
......@@ -103,7 +103,7 @@ my $divop = {
irn_flags => [ "modify_flags" ],
state => "pinned",
in_reqs => "...",
out_reqs => [ "rax", "flags", "none", "rdx" ],
out_reqs => [ "rax", "flags", "mem", "rdx" ],
outs => [ "res_div", "flags", "M", "res_mod" ],
attr_type => "amd64_addr_attr_t",
fixed => "amd64_addr_t addr = { { NULL, 0, X86_IMM_VALUE }, NO_INPUT, NO_INPUT, NO_INPUT, 0, AMD64_SEGMENT_DEFAULT };\n"
......@@ -119,7 +119,7 @@ my $mulop = {
irn_flags => [ "modify_flags" ],
state => "exc_pinned",
in_reqs => "...",
out_reqs => [ "rax", "flags", "none", "rdx" ],
out_reqs => [ "rax", "flags", "mem", "rdx" ],
outs => [ "res_low", "flags", "M", "res_high" ],
attr_type => "amd64_addr_attr_t",
attr => "amd64_insn_mode_t insn_mode, amd64_op_mode_t op_mode, amd64_addr_t addr",
......@@ -150,7 +150,7 @@ my $binopx = {
irn_flags => [ "rematerializable" ],
state => "exc_pinned",
in_reqs => "...",
out_reqs => [ "xmm", "none", "none" ],
out_reqs => [ "xmm", "none", "mem" ],
outs => [ "res", "none", "M" ],
attr_type => "amd64_binop_addr_attr_t",
attr => "const amd64_binop_addr_attr_t *attr_init",
......@@ -160,7 +160,7 @@ my $binopx_commutative = {
irn_flags => [ "rematerializable", "commutative" ],
state => "exc_pinned",
in_reqs => "...",
out_reqs => [ "xmm", "none", "none" ],
out_reqs => [ "xmm", "none", "mem" ],
outs => [ "res", "none", "M" ],
attr_type => "amd64_binop_addr_attr_t",
attr => "const amd64_binop_addr_attr_t *attr_init",
......@@ -169,7 +169,7 @@ my $binopx_commutative = {
my $cvtop2x = {
state => "exc_pinned",
in_reqs => "...",
out_reqs => [ "xmm", "none", "none" ],
out_reqs => [ "xmm", "none", "mem" ],
outs => [ "res", "none", "M" ],
attr_type => "amd64_addr_attr_t",
attr => "amd64_insn_mode_t insn_mode, amd64_op_mode_t op_mode, amd64_addr_t addr",
......@@ -178,7 +178,7 @@ my $cvtop2x = {
my $cvtopx2i = {
state => "exc_pinned",
in_reqs => "...",
out_reqs => [ "gp", "none", "none" ],
out_reqs => [ "gp", "none", "mem" ],
outs => [ "res", "none", "M" ],
attr_type => "amd64_addr_attr_t",
attr => "amd64_insn_mode_t insn_mode, amd64_op_mode_t op_mode, amd64_addr_t addr",
......@@ -188,7 +188,7 @@ my $movopx = {
state => "exc_pinned",
in_reqs => "...",
outs => [ "res", "none", "M" ],
out_reqs => [ "xmm", "none", "none" ],
out_reqs => [ "xmm", "none", "mem" ],
attr_type => "amd64_addr_attr_t",
attr => "amd64_op_mode_t op_mode, amd64_addr_t addr",
};
......@@ -198,7 +198,7 @@ push_am => {
op_flags => [ "uses_memory" ],
state => "exc_pinned",
in_reqs => "...",
out_reqs => [ "rsp:I", "none" ],
out_reqs => [ "rsp:I", "mem" ],
outs => [ "stack", "M" ],
attr_type => "amd64_addr_attr_t",
attr => "amd64_insn_mode_t insn_mode, amd64_addr_t addr",
......@@ -221,7 +221,7 @@ pop_am => {
op_flags => [ "uses_memory" ],
state => "exc_pinned",
in_reqs => "...",
out_reqs => [ "rsp:I", "none" ],
out_reqs => [ "rsp:I", "mem" ],
outs => [ "stack", "M" ],
attr_type => "amd64_addr_attr_t",
attr => "amd64_insn_mode_t insn_mode, amd64_addr_t addr",
......@@ -233,7 +233,7 @@ sub_sp => {
irn_flags => [ "modify_flags" ],
state => "pinned",
in_reqs => "...",
out_reqs => [ "rsp:I", "gp", "none" ],
out_reqs => [ "rsp:I", "gp", "mem" ],
outs => [ "stack", "addr", "M" ],
attr_type => "amd64_binop_addr_attr_t",
attr => "const amd64_binop_addr_attr_t *attr_init",
......@@ -355,7 +355,7 @@ mov_imm => {
movs => {
state => "exc_pinned",
in_reqs => "...",
out_reqs => [ "gp", "none", "none" ],
out_reqs => [ "gp", "none", "mem" ],
outs => [ "res", "unused", "M" ],
attr_type => "amd64_addr_attr_t",
attr => "amd64_insn_mode_t insn_mode, amd64_op_mode_t op_mode, amd64_addr_t addr",
......@@ -365,7 +365,7 @@ movs => {
mov_gp => {
state => "exc_pinned",
in_reqs => "...",
out_reqs => [ "gp", "none", "none" ],
out_reqs => [ "gp", "none", "mem" ],
outs => [ "res", "unused", "M" ],
attr_type => "amd64_addr_attr_t",
attr => "amd64_insn_mode_t insn_mode, amd64_op_mode_t op_mode, amd64_addr_t addr",
......@@ -375,7 +375,7 @@ ijmp => {
state => "pinned",
op_flags => [ "cfopcode", "unknown_jump" ],
in_reqs => "...",
out_reqs => [ "none", "none", "none" ],
out_reqs => [ "none", "none", "mem" ],
outs => [ "X", "unused", "M" ],
attr_type => "amd64_addr_attr_t",
attr => "amd64_insn_mode_t insn_mode, amd64_op_mode_t op_mode, amd64_addr_t addr",
......@@ -394,7 +394,7 @@ cmp => {
irn_flags => [ "modify_flags", "rematerializable" ],
state => "exc_pinned",
in_reqs => "...",
out_reqs => [ "none", "flags", "none" ],
out_reqs => [ "none", "flags", "mem" ],
outs => [ "dummy", "flags", "M" ],
attr_type => "amd64_binop_addr_attr_t",
attr => "const amd64_binop_addr_attr_t *attr_init",
......@@ -429,7 +429,7 @@ mov_store => {
op_flags => [ "uses_memory" ],
state => "exc_pinned",
in_reqs => "...",
out_reqs => [ "none" ],
out_reqs => [ "mem" ],
outs => [ "M" ],
attr_type => "amd64_binop_addr_attr_t",
attr => "const amd64_binop_addr_attr_t *attr_init",
......@@ -506,7 +506,7 @@ movs_store_xmm => {
op_flags => [ "uses_memory" ],
state => "exc_pinned",
in_reqs => "...",
out_reqs => [ "none" ],
out_reqs => [ "mem" ],
outs => [ "M" ],
attr_type => "amd64_binop_addr_attr_t",
attr => "const amd64_binop_addr_attr_t *attr_init",
......@@ -523,7 +523,7 @@ ucomis => {
irn_flags => [ "modify_flags", "rematerializable" ],
state => "exc_pinned",
in_reqs => "...",
out_reqs => [ "none", "flags", "none" ],
out_reqs => [ "none", "flags", "mem" ],
outs => [ "dummy", "flags", "M" ],
attr_type => "amd64_binop_addr_attr_t",
attr => "const amd64_binop_addr_attr_t *attr_init",
......@@ -623,7 +623,7 @@ movdqu_store => {
op_flags => [ "uses_memory" ],
state => "exc_pinned",
in_reqs => "...",
out_reqs => [ "none" ],
out_reqs => [ "mem" ],
outs => [ "M" ],
attr_type => "amd64_binop_addr_attr_t",
attr => "const amd64_binop_addr_attr_t *attr_init",
......
......@@ -134,54 +134,54 @@ static const arch_register_req_t amd64_requirement_xmm_same_0_not_1 = {
};
static const arch_register_req_t *mem_reqs[] = {
&arch_no_requirement,
&arch_memory_requirement,
};
static const arch_register_req_t *reg_mem_reqs[] = {
&amd64_class_reg_req_gp,
&arch_no_requirement,
&arch_memory_requirement,
};
static const arch_register_req_t *rsp_mem_reqs[] = {
&amd64_single_reg_req_gp_rsp,
&arch_no_requirement,
&arch_memory_requirement,
};
static const arch_register_req_t *rsp_reg_mem_reqs[] = {
&amd64_single_reg_req_gp_rsp,
&amd64_class_reg_req_gp,
&arch_no_requirement,
&arch_memory_requirement,
};
static const arch_register_req_t *xmm_mem_reqs[] = {
&amd64_class_reg_req_xmm,
&arch_no_requirement,
&arch_memory_requirement,
};
static const arch_register_req_t *reg_reg_mem_reqs[] = {
&amd64_class_reg_req_gp,
&amd64_class_reg_req_gp,
&arch_no_requirement,
&arch_memory_requirement,
};
static const arch_register_req_t *xmm_reg_mem_reqs[] = {
&amd64_class_reg_req_xmm,
&amd64_class_reg_req_gp,
&arch_no_requirement,
&arch_memory_requirement,
};
static const arch_register_req_t *reg_reg_reg_mem_reqs[] = {
&amd64_class_reg_req_gp,
&amd64_class_reg_req_gp,
&amd64_class_reg_req_gp,
&arch_no_requirement,
&arch_memory_requirement,
};
static const arch_register_req_t *xmm_reg_reg_mem_reqs[] = {
&amd64_class_reg_req_xmm,
&amd64_class_reg_req_gp,
&amd64_class_reg_req_gp,
&arch_no_requirement,
&arch_memory_requirement,
};
static const arch_register_req_t *reg_flags_reqs[] = {
......@@ -203,7 +203,7 @@ static const arch_register_req_t *rax_reg_rdx_mem_reqs[] = {
&amd64_single_reg_req_gp_rax,
&amd64_class_reg_req_gp,
&amd64_single_reg_req_gp_rdx,
&arch_no_requirement,
&arch_memory_requirement,
};
static const arch_register_req_t *reg_reqs[] = {
......@@ -1526,7 +1526,7 @@ static ir_node *gen_Return(ir_node *node)
ir_node **in = ALLOCAN(ir_node*, n_ins);
in[n_amd64_ret_mem] = new_mem;
reqs[n_amd64_ret_mem] = arch_no_register_req;
reqs[n_amd64_ret_mem] = arch_memory_req;
in[n_amd64_ret_stack] = sp;
reqs[n_amd64_ret_stack] = amd64_registers[REG_RSP].single_req;
......@@ -1720,7 +1720,7 @@ static ir_node *gen_Call(ir_node *node)
}
/* memory input */
in_req[in_arity] = arch_no_register_req;
in_req[in_arity] = arch_memory_req;
int mem_pos = in_arity;
addr.mem_input = mem_pos;
++in_arity;
......@@ -1749,7 +1749,7 @@ static ir_node *gen_Call(ir_node *node)
fix_node_mem_proj(call, mem_proj);
/* create output register reqs */
arch_set_irn_register_req_out(call, pn_amd64_call_M, arch_no_register_req);
arch_set_irn_register_req_out(call, pn_amd64_call_M, arch_memory_req);
arch_copy_irn_out_info(call, pn_amd64_call_stack, incsp);
arch_register_class_t const *const flags = &amd64_reg_classes[CLASS_amd64_flags];
......@@ -1985,7 +1985,7 @@ static ir_node *gen_Phi(ir_node *node)
} else if (mode_is_float(mode)) {
req = amd64_reg_classes[CLASS_amd64_xmm].class_req;
} else {
req = arch_no_register_req;
req = arch_memory_req;
}
return be_transform_phi(node, req);
......
......@@ -115,7 +115,7 @@ static int amd64_get_sp_bias(const ir_node *node)
static const arch_register_req_t *am_pushpop_base_reqs[] = {
&amd64_single_reg_req_gp_rsp,
&amd64_class_reg_req_gp,
&arch_no_requirement,
&arch_memory_requirement,
};
static ir_node *create_push(ir_node *node, ir_node *schedpoint, ir_node *sp,
......
......@@ -519,8 +519,8 @@ Ldr => {
state => "exc_pinned",
ins => [ "ptr", "mem" ],
outs => [ "res", "M" ],
in_reqs => [ "gp", "none" ],
out_reqs => [ "gp", "none" ],
in_reqs => [ "gp", "mem" ],
out_reqs => [ "gp", "mem" ],
emit => 'ldr%ML %D0, [%S0, #%o]',
attr_type => "arm_load_store_attr_t",
attr => "ir_mode *ls_mode, ir_entity *entity, int entity_sign, long offset, bool is_frame_entity",
......@@ -531,8 +531,8 @@ Str => {
state => "exc_pinned",
ins => [ "ptr", "val", "mem" ],
outs => [ "M" ],
in_reqs => [ "gp", "gp", "none" ],
out_reqs => [ "none" ],
in_reqs => [ "gp", "gp", "mem" ],
out_reqs => [ "mem" ],
emit => 'str%MS %S1, [%S0, #%o]',
mode => "mode_M",
attr_type => "arm_load_store_attr_t",
......@@ -557,7 +557,7 @@ Suf => {
Dvf => {
in_reqs => [ "fpa", "fpa" ],
out_reqs => [ "fpa", "none" ],
out_reqs => [ "fpa", "mem" ],
emit => 'dvf%MA %D0, %S0, %S1',
outs => [ "res", "M" ],
attr_type => "arm_farith_attr_t",
......@@ -601,8 +601,8 @@ Ldf => {
state => "exc_pinned",
ins => [ "ptr", "mem" ],
outs => [ "res", "M" ],
in_reqs => [ "gp", "none" ],
out_reqs => [ "fpa", "none" ],
in_reqs => [ "gp", "mem" ],
out_reqs => [ "fpa", "mem" ],
emit => 'ldf%MF %D0, [%S0, #%o]',
attr_type => "arm_load_store_attr_t",
attr => "ir_mode *ls_mode, ir_entity *entity, int entity_sign, long offset, bool is_frame_entity",
......@@ -614,8 +614,8 @@ Stf => {
ins => [ "ptr", "val", "mem" ],
outs => [ "M" ],
mode => "mode_M",
in_reqs => [ "gp", "fpa", "none" ],
out_reqs => [ "none" ],
in_reqs => [ "gp", "fpa", "mem" ],
out_reqs => [ "mem" ],
emit => 'stf%MF %S1, [%S0, #%o]',
attr_type => "arm_load_store_attr_t",
attr => "ir_mode *ls_mode, ir_entity *entity, int entity_sign, long offset, bool is_frame_entity",
......
......@@ -1786,7 +1786,7 @@ static ir_node *gen_Return(ir_node *node)
ir_node **in = ALLOCAN(ir_node*, n_ins);
in[n_arm_Return_mem] = new_mem;
reqs[n_arm_Return_mem] = arch_no_register_req;
reqs[n_arm_Return_mem] = arch_memory_req;
in[n_arm_Return_sp] = sp;
reqs[n_arm_Return_sp] = sp_reg->single_req;
......@@ -1846,7 +1846,7 @@ static ir_node *gen_Call(ir_node *node)
/* memory input */
int mem_pos = in_arity++;
in_req[mem_pos] = arch_no_register_req;
in_req[mem_pos] = arch_memory_req;
/* stack pointer (create parameter stackframe + align stack)
* Note that we always need an IncSP to ensure stack alignment */
ir_node *new_frame = get_stack_pointer_for(node);
......@@ -1954,7 +1954,7 @@ static ir_node *gen_Call(ir_node *node)
arch_set_irn_register_reqs_in(res, in_req);
/* create output register reqs */
arch_set_irn_register_req_out(res, pn_arm_Bl_M, arch_no_register_req);
arch_set_irn_register_req_out(res, pn_arm_Bl_M, arch_memory_req);
arch_copy_irn_out_info(res, pn_arm_Bl_stack, incsp);
for (size_t o = 0; o < n_caller_saves; ++o) {
......@@ -2004,7 +2004,7 @@ static ir_node *gen_Phi(ir_node *node)
/* all integer operations are on 32bit registers now */
req = arm_reg_classes[CLASS_arm_gp].class_req;
} else {
req = arch_no_register_req;
req = arch_memory_req;
}
return be_transform_phi(node, req);
......
......@@ -13,12 +13,27 @@
#include "benode.h"
#include "beinfo.h"
#include "beirg.h"
#include "bemodule.h"
#include "ircons_t.h"
#include "irnode_t.h"
#include "irop_t.h"
#include "raw_bitset.h"
#include "util.h"
static arch_register_class_t arch_memory_cls = {
.name = "memory",
.mode = NULL, /* Filled in at initialization. */
.regs = NULL,
.class_req = arch_memory_req,
.index = (unsigned)-1,
.n_regs = 0,
.manual_ra = true,
};
arch_register_req_t const arch_memory_requirement = {
.cls = &arch_memory_cls,
};
static arch_register_class_t arch_none_cls = {
.name = "none",
.mode = NULL,
......@@ -122,7 +137,7 @@ void be_make_start_mem(be_start_info_t *const info, ir_node *const start, unsign
{
info->pos = pos;
info->irn = NULL;
arch_set_irn_register_req_out(start, pos, arch_no_register_req);
arch_set_irn_register_req_out(start, pos, arch_memory_req);
}
void be_make_start_out(be_start_info_t *const info, ir_node *const start,
......@@ -144,7 +159,7 @@ ir_node *be_get_start_proj(ir_graph *const irg, be_start_info_t *const info)
/* This is already the transformed start node. */
ir_node *const start = get_irg_start(irg);
arch_register_class_t const *const cls = arch_get_irn_register_req_out(start, info->pos)->cls;
info->irn = new_r_Proj(start, cls->mode ? cls->mode : mode_M, info->pos);
info->irn = new_r_Proj(start, cls->mode, info->pos);
}
return info->irn;
}
......@@ -155,3 +170,9 @@ void arch_copy_irn_out_info(ir_node *const dst, unsigned const dst_pos, ir_node
reg_out_info_t *const dst_info = get_out_info_n(dst, dst_pos);
*dst_info = *src_info;
}
BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch)
void be_init_arch(void)
{
arch_memory_cls.mode = mode_M;
}
......@@ -20,6 +20,9 @@
#include "beinfo.h"
#include "be.h"
extern arch_register_req_t const arch_memory_requirement;
#define arch_memory_req (&arch_memory_requirement)
extern arch_register_req_t const arch_no_requirement;
#define arch_no_register_req (&arch_no_requirement)
......
......@@ -261,8 +261,8 @@ ir_node *be_make_asm(ir_node const *const node, ir_node **in, arch_register_req_
/* Add memory input and output. */
ARR_APP1(ir_node*, in, be_transform_node(get_ASM_mem(node)));
ARR_APP1(arch_register_req_t const*, in_reqs, arch_no_register_req);
ARR_APP1(arch_register_req_t const*, out_reqs, arch_no_register_req);
ARR_APP1(arch_register_req_t const*, in_reqs, arch_memory_req);
ARR_APP1(arch_register_req_t const*, out_reqs, arch_memory_req);
dbg_info *const dbgi = get_irn_dbg_info(node);
unsigned const n_ins = ARR_LEN(in);
......
......@@ -50,18 +50,21 @@ void be_info_new_node(ir_graph *irg, ir_node *node)
* Set backend info for some middleend nodes which still appear in
* backend graphs
*/
arch_irn_flags_t flags = arch_irn_flag_not_scheduled;
arch_irn_flags_t flags = arch_irn_flag_not_scheduled;
arch_register_req_t const *req = arch_no_register_req;
switch (get_irn_opcode(node)) {
case iro_Block:
case iro_Dummy:
case iro_NoMem:
case iro_Anchor:
case iro_Pin:
case iro_Sync:
case iro_Bad:
case iro_End:
case iro_Unknown:
break;
case iro_NoMem:
case iro_Pin:
case iro_Sync:
req = arch_memory_req;
break;
case iro_Phi:
flags = arch_irn_flag_schedule_first;
break;
......@@ -71,7 +74,7 @@ void be_info_new_node(ir_graph *irg, ir_node *node)
info->flags = flags;
info->out_infos = NEW_ARR_DZ(reg_out_info_t, obst, 1);
info->out_infos[0].req = arch_no_register_req;
info->out_infos[0].req = req;
}
static void new_phi_copy_attr(ir_graph *irg, const ir_node *old_node,
......
......@@ -24,6 +24,7 @@ struct be_module_list_entry_t {
struct be_module_list_entry_t *next; /**< Points to the next entry. */
};
void be_init_arch(void);
void be_init_arch_TEMPLATE(void);
void be_init_arch_amd64(void);
void be_init_arch_arm(void);
......@@ -73,6 +74,7 @@ void be_init_modules(void)
return;
run_once = true;
be_init_arch();
be_init_blocksched();
be_init_chordal_common();
be_init_copyopt();
......
......@@ -178,6 +178,10 @@ ir_node *be_new_MemPerm(ir_node *const block, int n, ir_node *const *const in)
ir_node *const irn = new_ir_node(NULL, irg, block, op_be_MemPerm, mode_T, n, in);
init_node_attr(irn, n, arch_irn_flags_none);
for (int i = 0; i < n; ++i) {
be_node_set_register_req_in( irn, i, arch_memory_req);
arch_set_irn_register_req_out(irn, i, arch_memory_req);
}
be_memperm_attr_t *attr = (be_memperm_attr_t*)get_irn_generic_attr(irn);
attr->in_entities = OALLOCNZ(get_irg_obstack(irg), ir_entity*, n);
......
......@@ -282,7 +282,7 @@ static void spill_phi(spill_env_t *env, spill_info_t *spillinfo)
/* build a new PhiM */
ir_node *const block = get_nodes_block(phi);
ir_node *const phim = be_new_Phi0(block, mode_M, arch_no_register_req);
ir_node *const phim = be_new_Phi0(block, mode_M, arch_memory_req);
sched_add_after(block, phim);
/* override or replace spills list... */
......
......@@ -146,7 +146,7 @@ static void spill_phi(minibelady_env_t *env, ir_node *phi)
/* create a Phi-M */
ir_node *const block = get_nodes_block(phi);
ir_node *const phim = be_new_Phi0(block, mode_M, arch_no_register_req);
ir_node *const phim = be_new_Phi0(block, mode_M, arch_memory_req);
spill_info->spill = phim;
sched_add_after(block, phim);
......
......@@ -63,7 +63,7 @@ ir_node *be_transform_phi(ir_node *node, const arch_register_req_t *req)
* and fix this later */
ir_node **ins = get_irn_in(node)+1;
int arity = get_irn_arity(node);
ir_mode *mode = req->cls->mode ? req->cls->mode : get_irn_mode(</