Commit 6c716ff9 authored by Matthias Braun's avatar Matthias Braun
Browse files

move arch_dump functions to be_dump

parent 85b6b1a3
......@@ -22,6 +22,7 @@
#include "xmalloc.h"
#include "bearch.h"
#include "bedump.h"
#include "TEMPLATE_nodes_attr.h"
#include "TEMPLATE_new_nodes.h"
......@@ -52,7 +53,7 @@ static void TEMPLATE_dump_node(FILE *F, const ir_node *n, dump_reason_t reason)
break;
case dump_node_info_txt:
arch_dump_reqs_and_registers(F, n);
be_dump_reqs_and_registers(F, n);
break;
}
}
......
......@@ -24,6 +24,7 @@
#include "xmalloc.h"
#include "bearch.h"
#include "bedump.h"
#include "amd64_nodes_attr.h"
#include "amd64_new_nodes.h"
......@@ -84,7 +85,7 @@ static void amd64_dump_node(FILE *F, const ir_node *n, dump_reason_t reason)
break;
case dump_node_info_txt:
arch_dump_reqs_and_registers(F, n);
be_dump_reqs_and_registers(F, n);
const amd64_attr_t *attr = get_amd64_attr_const(n);
fprintf(F, "mode = %s\n", get_op_mode_string(attr->op_mode));
amd64_op_mode_t op_mode = attr->op_mode;
......
......@@ -28,6 +28,7 @@
#include "arm_optimize.h"
#include "bearch_arm_t.h"
#include "bearch.h"
#include "bedump.h"
static bool arm_has_address_attr(const ir_node *node)
{
......@@ -89,7 +90,7 @@ static void arm_dump_node(FILE *F, const ir_node *n, dump_reason_t reason)
break;
case dump_node_info_txt:
arch_dump_reqs_and_registers(F, n);
be_dump_reqs_and_registers(F, n);
if (has_load_store_attr(n)) {
const arm_load_store_attr_t *attr
......
......@@ -149,116 +149,6 @@ bool arch_reg_is_allocatable(const arch_register_req_t *req,
return true;
}
/**
* Print information about a register requirement in human readable form
* @param F output stream/file
* @param req The requirements structure to format.
*/
static void arch_dump_register_req(FILE *const F, arch_register_req_t const *const req)
{
if (req == NULL || req->type == arch_register_req_type_none) {
fprintf(F, "n/a");
return;
}
fprintf(F, "%s", req->cls->name);
if (arch_register_req_is(req, limited)) {
unsigned n_regs = req->cls->n_regs;
unsigned i;
fprintf(F, " limited to");
for (i = 0; i < n_regs; ++i) {
if (rbitset_is_set(req->limited, i)) {
const arch_register_t *reg = &req->cls->regs[i];
fprintf(F, " %s", reg->name);
}
}
}
if (arch_register_req_is(req, should_be_same)) {
const unsigned other = req->other_same;
int i;
fprintf(F, " same as");
for (i = 0; 1U << i <= other; ++i) {
if (other & (1U << i)) {
ir_fprintf(F, " #%d", i);
}
}
}
if (arch_register_req_is(req, must_be_different)) {
const unsigned other = req->other_different;
int i;
fprintf(F, " different from");
for (i = 0; 1U << i <= other; ++i) {
if (other & (1U << i)) {
ir_fprintf(F, " #%d", i);
}
}
}
if (req->width != 1) {
fprintf(F, " width:%d", req->width);
}
if (arch_register_req_is(req, aligned)) {
fprintf(F, " aligned");
}
if (arch_register_req_is(req, ignore)) {
fprintf(F, " ignore");
}
if (arch_register_req_is(req, produces_sp)) {
fprintf(F, " produces_sp");
}
}
void arch_dump_reqs_and_registers(FILE *F, const ir_node *node)
{
backend_info_t *const info = be_get_info(node);
/* don't fail on invalid graphs */
if (!info || (!info->in_reqs && get_irn_arity(node) != 0) || !info->out_infos) {
fprintf(F, "invalid register requirements!!!\n");
return;
}
foreach_irn_in(node, i, op) {
const arch_register_req_t *req = arch_get_irn_register_req_in(node, i);
fprintf(F, "inreq #%d = ", i);
arch_dump_register_req(F, req);
arch_register_t const *const reg = be_get_info(skip_Proj_const(op))->out_infos ? arch_get_irn_register(op) : NULL;
fprintf(F, " [%s]\n", reg ? reg->name : "n/a");
}
be_foreach_out(node, o) {
const arch_register_req_t *req = arch_get_irn_register_req_out(node, o);
fprintf(F, "outreq #%u = ", o);
arch_dump_register_req(F, req);
const arch_register_t *reg = arch_get_irn_register_out(node, o);
fprintf(F, " [%s]\n", reg != NULL ? reg->name : "n/a");
}
fprintf(F, "flags =");
arch_irn_flags_t flags = arch_get_irn_flags(node);
if (flags == arch_irn_flags_none) {
fprintf(F, " none");
} else {
if (flags & arch_irn_flag_dont_spill)
fprintf(F, " unspillable");
if (flags & arch_irn_flag_rematerializable)
fprintf(F, " remat");
if (flags & arch_irn_flag_modify_flags)
fprintf(F, " modify_flags");
if (flags & arch_irn_flag_simple_jump)
fprintf(F, " simple_jump");
if (flags & arch_irn_flag_not_scheduled)
fprintf(F, " not_scheduled");
if (flags & arch_irn_flag_schedule_first)
fprintf(F, " schedule_first");
}
fprintf(F, " (0x%x)\n", (unsigned)flags);
}
void be_make_start_mem(be_start_info_t *const info, ir_node *const start, unsigned const pos)
{
info->pos = pos;
......
......@@ -71,9 +71,6 @@ ENUM_BITSET(arch_register_req_type_t)
extern arch_register_req_t const arch_no_requirement;
#define arch_no_register_req (&arch_no_requirement)
void arch_dump_register_reqs(FILE *F, const ir_node *node);
void arch_dump_reqs_and_registers(FILE *F, const ir_node *node);
void arch_set_frame_offset(ir_node *irn, int bias);
ir_entity *arch_get_frame_entity(const ir_node *irn);
......
......@@ -163,3 +163,113 @@ void be_liveness_dump(FILE *F, const be_lv_t *lv)
w.out = F;
irg_block_walk_graph(lv->irg, lv_dump_block_walker, NULL, &w);
}
/**
* Print information about a register requirement in human readable form
* @param F output stream/file
* @param req The requirements structure to format.
*/
static void dump_register_req(FILE *const F, arch_register_req_t const *const req)
{
if (req == NULL || req->type == arch_register_req_type_none) {
fprintf(F, "n/a");
return;
}
fprintf(F, "%s", req->cls->name);
if (arch_register_req_is(req, limited)) {
unsigned n_regs = req->cls->n_regs;
unsigned i;
fprintf(F, " limited to");
for (i = 0; i < n_regs; ++i) {
if (rbitset_is_set(req->limited, i)) {
const arch_register_t *reg = &req->cls->regs[i];
fprintf(F, " %s", reg->name);
}
}
}
if (arch_register_req_is(req, should_be_same)) {
const unsigned other = req->other_same;
int i;
fprintf(F, " same as");
for (i = 0; 1U << i <= other; ++i) {
if (other & (1U << i)) {
ir_fprintf(F, " #%d", i);
}
}
}
if (arch_register_req_is(req, must_be_different)) {
const unsigned other = req->other_different;
int i;
fprintf(F, " different from");
for (i = 0; 1U << i <= other; ++i) {
if (other & (1U << i)) {
ir_fprintf(F, " #%d", i);
}
}
}
if (req->width != 1) {
fprintf(F, " width:%d", req->width);
}
if (arch_register_req_is(req, aligned)) {
fprintf(F, " aligned");
}
if (arch_register_req_is(req, ignore)) {
fprintf(F, " ignore");
}
if (arch_register_req_is(req, produces_sp)) {
fprintf(F, " produces_sp");
}
}
void be_dump_reqs_and_registers(FILE *F, const ir_node *node)
{
backend_info_t *const info = be_get_info(node);
/* don't fail on invalid graphs */
if (!info || (!info->in_reqs && get_irn_arity(node) != 0) || !info->out_infos) {
fprintf(F, "invalid register requirements!!!\n");
return;
}
foreach_irn_in(node, i, op) {
const arch_register_req_t *req = arch_get_irn_register_req_in(node, i);
fprintf(F, "inreq #%d = ", i);
dump_register_req(F, req);
arch_register_t const *const reg = be_get_info(skip_Proj_const(op))->out_infos ? arch_get_irn_register(op) : NULL;
fprintf(F, " [%s]\n", reg ? reg->name : "n/a");
}
be_foreach_out(node, o) {
const arch_register_req_t *req = arch_get_irn_register_req_out(node, o);
fprintf(F, "outreq #%u = ", o);
dump_register_req(F, req);
const arch_register_t *reg = arch_get_irn_register_out(node, o);
fprintf(F, " [%s]\n", reg != NULL ? reg->name : "n/a");
}
fprintf(F, "flags =");
arch_irn_flags_t flags = arch_get_irn_flags(node);
if (flags == arch_irn_flags_none) {
fprintf(F, " none");
} else {
if (flags & arch_irn_flag_dont_spill)
fprintf(F, " unspillable");
if (flags & arch_irn_flag_rematerializable)
fprintf(F, " remat");
if (flags & arch_irn_flag_modify_flags)
fprintf(F, " modify_flags");
if (flags & arch_irn_flag_simple_jump)
fprintf(F, " simple_jump");
if (flags & arch_irn_flag_not_scheduled)
fprintf(F, " not_scheduled");
if (flags & arch_irn_flag_schedule_first)
fprintf(F, " schedule_first");
}
fprintf(F, " (0x%x)\n", (unsigned)flags);
}
......@@ -40,4 +40,6 @@ void be_liveness_dump(FILE *F, const be_lv_t *lv);
*/
void be_dump_liveness_block(be_lv_t *lv, FILE *F, const ir_node *block);
void be_dump_reqs_and_registers(FILE *F, const ir_node *node);
#endif
......@@ -42,6 +42,7 @@
#include "besched.h"
#include "benode.h"
#include "bearch.h"
#include "bedump.h"
typedef struct be_node_attr_t {
except_attr exc;
......@@ -612,7 +613,7 @@ void be_dump_phi_reg_reqs(FILE *F, const ir_node *node, dump_reason_t reason)
case dump_node_info_txt: {
ir_graph *irg = get_irn_irg(node);
if (irg_is_constrained(irg, IR_GRAPH_CONSTRAINT_BACKEND)) {
arch_dump_reqs_and_registers(F, node);
be_dump_reqs_and_registers(F, node);
}
break;
}
......@@ -650,7 +651,7 @@ static void dump_node(FILE *f, const ir_node *irn, dump_reason_t reason)
}
break;
case dump_node_info_txt:
arch_dump_reqs_and_registers(f, irn);
be_dump_reqs_and_registers(f, irn);
switch (get_be_irn_opcode(irn)) {
case beo_IncSP: {
......
......@@ -30,6 +30,7 @@
#include "xmalloc.h"
#include "bearch.h"
#include "bedump.h"
#include "beinfo.h"
#include "bearch_ia32_t.h"
......@@ -155,7 +156,7 @@ static void ia32_dump_node(FILE *F, const ir_node *n, dump_reason_t reason)
break;
case dump_node_info_txt:
arch_dump_reqs_and_registers(F, n);
be_dump_reqs_and_registers(F, n);
/* dump op type */
fprintf(F, "op = ");
......
......@@ -24,6 +24,7 @@
#include "bearch.h"
#include "bearch_sparc_t.h"
#include "bedump.h"
#include "sparc_nodes_attr.h"
#include "sparc_new_nodes.h"
......@@ -77,7 +78,7 @@ static void sparc_dump_node(FILE *F, const ir_node *n, dump_reason_t reason)
break;
case dump_node_info_txt:
arch_dump_reqs_and_registers(F, n);
be_dump_reqs_and_registers(F, n);
const sparc_attr_t *sparc_attr = get_sparc_attr_const(n);
if (sparc_attr->immediate_value_entity) {
ir_fprintf(F, "entity: %+F (offset %d)\n",
......
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