Commit 7670bd0d authored by Christoph Mallon's avatar Christoph Mallon
Browse files

be: Add and use be_new_Copy_before_reg().

parent feeff92a
......@@ -236,13 +236,7 @@ swap:;
}
}
ir_node *const block = get_nodes_block(node);
ir_node *const copy = be_new_Copy(block, in_node);
/* Destination is the out register. */
arch_set_irn_register(copy, out_reg);
/* Insert copy before the node into the schedule. */
sched_add_before(node, copy);
ir_node *const copy = be_new_Copy_before_reg(in_node, node, out_reg);
/* Set copy as in. */
set_irn_n(node, same_pos, copy);
......
......@@ -203,7 +203,6 @@ static void lower_perm_node(ir_node *const perm, arch_register_class_t const *co
DBG((dbg, LEVEL_1, "%+F has %d unresolved constraints\n", perm, (int)(pair - pairs)));
ir_node *const block = get_nodes_block(perm);
/* Build Copy chains. */
for (unsigned i = 0; i != n_regs; ++i) {
if (rbitset_is_set(inregs, i))
......@@ -213,11 +212,9 @@ static void lower_perm_node(ir_node *const perm, arch_register_class_t const *co
unsigned k = i;
for (reg_pair_t const *p; (p = oregmap[k]);) {
oregmap[k] = NULL;
ir_node *const copy = be_new_Copy(block, p->in_node);
ir_node *const copy = be_new_Copy_before_reg(p->in_node, perm, p->out_reg);
DBG((dbg, LEVEL_2, "%+F: inserting %+F for %+F from %s to %s\n", perm, copy, p->in_node, p->in_reg, p->out_reg));
arch_set_irn_register(copy, p->out_reg);
exchange(p->out_node, copy);
sched_add_before(perm, copy);
const unsigned new_k = p->in_reg->index;
if (oregmap[new_k] == NULL) {
......@@ -249,26 +246,20 @@ static void lower_perm_node(ir_node *const perm, arch_register_class_t const *co
}
reg_pair_t *start = oregmap[i];
ir_node *save_copy = be_new_Copy(block, start->in_node);
arch_set_irn_register(save_copy, free_reg);
sched_add_before(perm, save_copy);
ir_node *const save_copy = be_new_Copy_before_reg(start->in_node, perm, free_reg);
reg_pair_t *p = oregmap[start->in_reg->index];
do {
ir_node *copy = be_new_Copy(block, p->in_node);
arch_set_irn_register(copy, p->out_reg);
ir_node *const copy = be_new_Copy_before_reg(p->in_node, perm, p->out_reg);
exchange(p->out_node, copy);
sched_add_before(perm, copy);
unsigned const in_idx = p->in_reg->index;
rbitset_clear(inregs, in_idx);
p = oregmap[in_idx];
} while (p != start);
rbitset_clear(inregs, start->in_reg->index);
ir_node *restore_copy = be_new_Copy(block, save_copy);
arch_set_irn_register(restore_copy, start->out_reg);
ir_node *const restore_copy = be_new_Copy_before_reg(save_copy, perm, start->out_reg);
exchange(start->out_node, restore_copy);
sched_add_before(perm, restore_copy);
}
} else {
/* Decompose cycles into transpositions.
......@@ -291,6 +282,7 @@ static void lower_perm_node(ir_node *const perm, arch_register_class_t const *co
* r2 r3 r4 r5 r1 +---+
* r2 r3 r4 r5 r1
*/
ir_node *const block = get_nodes_block(perm);
for (unsigned i = 0; i != n_regs;) {
if (!rbitset_is_set(inregs, i)) {
++i;
......
......@@ -19,6 +19,7 @@
#include "beirg.h"
#include "belive.h"
#include "benode.h"
#include "besched.h"
#include "bitfiddle.h"
#include "fourcc.h"
#include "irbackedge_t.h"
......@@ -225,6 +226,15 @@ ir_node *be_get_Copy_op(const ir_node *cpy)
return get_irn_n(cpy, n_be_Copy_op);
}
ir_node *be_new_Copy_before_reg(ir_node *const val, ir_node *const before, arch_register_t const *const reg)
{
ir_node *const block = get_nodes_block(before);
ir_node *const copy = be_new_Copy(block, val);
sched_add_before(before, copy);
arch_set_irn_register_out(copy, 0, reg);
return copy;
}
ir_node *be_new_Keep(ir_node *const block, int const n,
ir_node *const *const in)
{
......
......@@ -79,6 +79,11 @@ ir_node *be_new_Copy(ir_node *block, ir_node *in);
/** Returns the Copy Argument. */
ir_node *be_get_Copy_op(const ir_node *cpy);
/**
* Insert a Copy of @p val into @p reg before @p before.
*/
ir_node *be_new_Copy_before_reg(ir_node *val, ir_node *before, arch_register_t const *reg);
/**
* Make a new Perm node.
*/
......
......@@ -138,12 +138,10 @@ static void impl_parcopy(const arch_register_class_t *cls,
for (unsigned i = 0; i < num_restores; ++i) {
const unsigned src_reg = restore_srcs[i];
const unsigned dst_reg = restore_dsts[i];
ir_node *src = phi_args[src_reg];
ir_node *copy = be_new_Copy(block, src);
sched_add_before(before, copy);
const arch_register_t *reg = arch_register_for_index(cls, dst_reg);
arch_set_irn_register(copy, reg);
ir_node *const src = phi_args[src_reg];
arch_register_t const *const reg = arch_register_for_index(cls, dst_reg);
ir_node *const copy = be_new_Copy_before_reg(src, before, reg);
ir_node *phi = phis[dst_reg];
set_irn_n(phi, pred_nr, copy);
......
......@@ -269,12 +269,7 @@ static void assure_should_be_same_requirements(ir_node *node)
/* no-one else is using the out reg, we can simply copy it
* (the register can't be live since the operation will override it
* anyway) */
ir_node *const block = get_nodes_block(node);
ir_node *const copy = be_new_Copy(block, in_node);
/* destination is the out register */
arch_set_irn_register(copy, out_reg);
/* insert copy before the node into the schedule */
sched_add_before(node, copy);
ir_node *const copy = be_new_Copy_before_reg(in_node, node, out_reg);
/* set copy as in */
set_irn_n(node, same_pos, copy);
......
......@@ -58,8 +58,6 @@ static int get_first_same(const arch_register_req_t *req)
*/
static void assure_should_be_same_requirements(ir_node *node)
{
ir_node *block = get_nodes_block(node);
/* check all OUT requirements, if there is a should_be_same */
be_foreach_out(node, i) {
const arch_register_req_t *req = arch_get_irn_register_req_out(node, i);
......@@ -100,14 +98,7 @@ static void assure_should_be_same_requirements(ir_node *node)
* (the register can't be live since the operation will override it
* anyway) */
if (uses_out_reg == NULL) {
ir_node *copy = be_new_Copy(block, in_node);
/* destination is the out register */
arch_set_irn_register(copy, out_reg);
/* insert copy before the node into the schedule */
sched_add_before(node, copy);
ir_node *const copy = be_new_Copy_before_reg(in_node, node, out_reg);
/* set copy as in */
set_irn_n(node, same_pos, copy);
continue;
......
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