Commit 77499709 authored by Matthias Braun's avatar Matthias Braun
Browse files

amd64: use 32/64bit versions of binops

parent 6d1c1211
......@@ -95,10 +95,12 @@ Push => {
Add => {
irn_flags => [ "rematerializable" ],
state => "exc_pinned",
attr => "amd64_insn_mode_t insn_mode",
init_attr => "attr->data.insn_mode = insn_mode;",
reg_req => { in => [ "gp", "gp" ], out => [ "in_r1 !in_r2" ] },
ins => [ "left", "right" ],
outs => [ "res" ],
emit => "add %S1, %D0",
emit => "add%M %S1, %D0",
mode => $mode_gp,
modified_flags => 1,
},
......@@ -106,10 +108,12 @@ Add => {
And => {
irn_flags => [ "rematerializable" ],
state => "exc_pinned",
attr => "amd64_insn_mode_t insn_mode",
init_attr => "attr->data.insn_mode = insn_mode;",
reg_req => { in => [ "gp", "gp" ], out => [ "in_r1 !in_r2" ] },
ins => [ "left", "right" ],
outs => [ "res" ],
emit => "and %S1, %D0",
emit => "and%M %S1, %D0",
mode => $mode_gp,
modified_flags => 1,
},
......@@ -117,10 +121,12 @@ And => {
IMul => {
irn_flags => [ "rematerializable" ],
state => "exc_pinned",
attr => "amd64_insn_mode_t insn_mode",
init_attr => "attr->data.insn_mode = insn_mode;",
reg_req => { in => [ "gp", "gp" ], out => [ "in_r1 !in_r2" ] },
ins => [ "left", "right" ],
outs => [ "res" ],
emit => "imul %S1, %D0",
emit => "imul%M %S1, %D0",
mode => $mode_gp,
am => "source,binary",
modified_flags => $status_flags
......@@ -129,51 +135,61 @@ IMul => {
Or => {
irn_flags => [ "rematerializable" ],
state => "exc_pinned",
attr => "amd64_insn_mode_t insn_mode",
init_attr => "attr->data.insn_mode = insn_mode;",
reg_req => { in => [ "gp", "gp" ], out => [ "in_r1 !in_r2" ] },
ins => [ "left", "right" ],
outs => [ "res" ],
emit => "or %S1, %D0",
emit => "or%M %S1, %D0",
mode => $mode_gp,
modified_flags => 1,
},
Shl => {
irn_flags => [ "rematerializable" ],
attr => "amd64_insn_mode_t insn_mode",
init_attr => "attr->data.insn_mode = insn_mode;",
reg_req => { in => [ "gp", "rcx" ], out => [ "in_r1 !in_r2" ] },
ins => [ "val", "count" ],
out => [ "res" ],
emit => "shl %%cl, %D0",
emit => "shl%M %%cl, %D0",
mode => $mode_gp,
modified_flags => $status_flags
},
Shr => {
irn_flags => [ "rematerializable" ],
attr => "amd64_insn_mode_t insn_mode",
init_attr => "attr->data.insn_mode = insn_mode;",
reg_req => { in => [ "gp", "rcx" ], out => [ "in_r1 !in_r2" ] },
ins => [ "val", "count" ],
out => [ "res" ],
emit => "shr %%cl, %D0",
emit => "shr%M %%cl, %D0",
mode => $mode_gp,
modified_flags => $status_flags
},
Sar => {
irn_flags => [ "rematerializable" ],
attr => "amd64_insn_mode_t insn_mode",
init_attr => "attr->data.insn_mode = insn_mode;",
reg_req => { in => [ "gp", "rcx" ], out => [ "in_r1 !in_r2" ] },
ins => [ "val", "count" ],
out => [ "res" ],
emit => "sar %%cl, %D0",
emit => "sar%M %%cl, %D0",
mode => $mode_gp,
modified_flags => $status_flags
},
Sub => {
irn_flags => [ "rematerializable" ],
attr => "amd64_insn_mode_t insn_mode",
init_attr => "attr->data.insn_mode = insn_mode;",
state => "exc_pinned",
reg_req => { in => [ "gp", "gp" ], out => [ "in_r1 !in_r2" ] },
ins => [ "left", "right" ],
outs => [ "res" ],
emit => "sub %S1, %D0",
emit => "sub%M %S1, %D0",
mode => $mode_gp,
modified_flags => 1,
},
......@@ -205,11 +221,13 @@ Not => {
Xor => {
irn_flags => [ "rematerializable" ],
attr => "amd64_insn_mode_t insn_mode",
init_attr => "attr->data.insn_mode = insn_mode;",
state => "exc_pinned",
reg_req => { in => [ "gp", "gp" ], out => [ "in_r1 !in_r2" ] },
ins => [ "left", "right" ],
outs => [ "res" ],
emit => "xor %S1, %D0",
emit => "xor%M %S1, %D0",
mode => $mode_gp,
modified_flags => 1,
},
......@@ -251,10 +269,11 @@ Cmp => {
out => [ "flags" ] },
ins => [ "left", "right" ],
outs => [ "eflags" ],
emit => "cmp %S1, %S0",
attr => "int ins_permuted, int cmp_unsigned",
emit => "cmp%M %S1, %S0",
attr => "amd64_insn_mode_t insn_mode, int ins_permuted, int cmp_unsigned",
init_attr => "attr->data.ins_permuted = ins_permuted;\n".
"\tattr->data.cmp_unsigned = cmp_unsigned;\n",
"\tattr->data.cmp_unsigned = cmp_unsigned;\n".
"\tattr->data.insn_mode = insn_mode;\n",
mode => $mode_flags,
modified_flags => 1,
},
......
......@@ -73,7 +73,10 @@ static ir_node *gen_SymConst(ir_node *node)
return new_bd_amd64_Const(dbgi, block, INSN_MODE_32, 0, false, entity);
}
static ir_node *gen_binop(ir_node *const node, ir_node *(*const new_node)(dbg_info*, ir_node*, ir_node*, ir_node*))
typedef ir_node* (*binop_constructor)(dbg_info *dbgi, ir_node *block,
ir_node *left, ir_node *right, amd64_insn_mode_t insn_mode);
static ir_node *gen_binop(ir_node *const node, binop_constructor const new_node)
{
dbg_info *const dbgi = get_irn_dbg_info(node);
ir_node *const block = be_transform_node(get_nodes_block(node));
......@@ -81,8 +84,10 @@ static ir_node *gen_binop(ir_node *const node, ir_node *(*const new_node)(dbg_in
ir_node *const new_op1 = be_transform_node(op1);
ir_node *const op2 = get_binop_right(node);
ir_node *const new_op2 = be_transform_node(op2);
return new_node(dbgi, block, new_op1, new_op2);
ir_mode *const mode = get_irn_mode(node);
amd64_insn_mode_t imode
= get_mode_size_bits(mode) > 32 ? INSN_MODE_64 : INSN_MODE_32;
return new_node(dbgi, block, new_op1, new_op2, imode);
}
static ir_node *gen_Add (ir_node *const node) { return gen_binop(node, &new_bd_amd64_Add); }
......@@ -173,6 +178,11 @@ static ir_node *gen_Cmp(ir_node *node)
panic("Floating point not implemented yet!");
}
amd64_insn_mode_t insn_mode
= get_mode_size_bits(cmp_mode) > 32 ? INSN_MODE_64 : INSN_MODE_32;
/* mode < 32 not correctly implemented yet */
assert(get_mode_size_bits(cmp_mode) >= 32);
assert(get_irn_mode(op2) == cmp_mode);
is_unsigned = !mode_is_signed(cmp_mode);
......@@ -180,7 +190,7 @@ static ir_node *gen_Cmp(ir_node *node)
/* new_op1 = gen_extension(dbgi, block, new_op1, cmp_mode); */
new_op2 = be_transform_node(op2);
/* new_op2 = gen_extension(dbgi, block, new_op2, cmp_mode); */
return new_bd_amd64_Cmp(dbgi, block, new_op1, new_op2, false,
return new_bd_amd64_Cmp(dbgi, block, new_op1, new_op2, insn_mode, false,
is_unsigned);
}
......
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