Commit 7c5ef5e3 authored by Christian Würdig's avatar Christian Würdig
Browse files

code refactoring for full addressmode support and more architecture independence

parent 3c93cdbd
......@@ -41,6 +41,8 @@ static set *cur_reg_set = NULL;
#undef is_Start
#define is_Start(irn) (get_irn_opcode(irn) == iro_Start)
extern ir_node *be_new_NoReg(ir_graph *irg);
/**************************************************
* _ _ _ __
* | | | (_)/ _|
......@@ -133,6 +135,7 @@ static const arch_register_req_t *ia32_get_irn_reg_req(const void *self, arch_re
assert(irn_req && "missing requirement for regparam");
memcpy(req, &(irn_req->req), sizeof(*req));
return req;
//return NULL;
}
else if (is_Proj(irn)) {
if (pos == -1) {
......@@ -170,9 +173,9 @@ static const arch_register_req_t *ia32_get_irn_reg_req(const void *self, arch_re
if (is_Phi(irn)) {
DB((mod, LEVEL_1, "returning standard reqs for %+F\n", irn));
if (mode_is_float(mode))
memcpy(req, &(ia32_default_req_ia32_floating_point.req), sizeof(*req));
memcpy(req, &(ia32_default_req_ia32_fp.req), sizeof(*req));
else if (mode_is_int(mode) || mode_is_reference(mode))
memcpy(req, &(ia32_default_req_ia32_general_purpose.req), sizeof(*req));
memcpy(req, &(ia32_default_req_ia32_gp.req), sizeof(*req));
else if (mode == mode_T || mode == mode_M) {
DBG((mod, LEVEL_1, "ignoring Phi node %+F\n", irn));
return NULL;
......@@ -195,7 +198,7 @@ static const arch_register_req_t *ia32_get_irn_reg_req(const void *self, arch_re
}
else if (get_irn_op(irn) == op_Return && pos > 0) {
DB((mod, LEVEL_1, "returning reqs EAX for %+F\n", irn));
memcpy(req, &(ia32_default_req_ia32_general_purpose_eax.req), sizeof(*req));
memcpy(req, &(ia32_default_req_ia32_gp_eax.req), sizeof(*req));
}
else {
DB((mod, LEVEL_1, "returning NULL for %+F (not ia32)\n", irn));
......@@ -275,7 +278,7 @@ static arch_irn_flags_t ia32_get_flags(const void *self, const ir_node *irn) {
if (is_ia32_irn(irn))
return get_ia32_flags(irn);
else {
if (is_Start_Proj(irn) || is_Unknown(irn))
if (is_Start_Proj(irn))
return arch_irn_flags_ignore;
return 0;
......@@ -337,7 +340,7 @@ static void ia32_prepare_graph(void *self) {
irg_walk_blkwise_graph(cg->irg, check_for_alloca, NULL, &(cg->has_alloca));
if (cg->has_alloca) {
ia32_general_purpose_regs[REG_EBP].type = arch_register_type_ignore;
ia32_gp_regs[REG_EBP].type = arch_register_type_ignore;
}
irg_walk_blkwise_graph(cg->irg, ia32_place_consts, ia32_transform_node, cg);
......@@ -350,6 +353,7 @@ static void ia32_prepare_graph(void *self) {
* Stack reservation and StackParam lowering.
*/
static void ia32_finish_irg(ir_graph *irg, ia32_code_gen_t *cg) {
#if 0
firm_dbg_module_t *mod = cg->mod;
ir_node *frame = get_irg_frame(irg);
ir_node *end_block = get_irg_end_block(irg);
......@@ -363,10 +367,10 @@ static void ia32_finish_irg(ir_graph *irg, ia32_code_gen_t *cg) {
/* Determine stack register */
if (cg->has_alloca) {
stack_reg = &ia32_general_purpose_regs[REG_EBP];
stack_reg = &ia32_gp_regs[REG_EBP];
}
else {
stack_reg = &ia32_general_purpose_regs[REG_ESP];
stack_reg = &ia32_gp_regs[REG_ESP];
}
/* If frame is used, then we need to reserve some stackspace. */
......@@ -443,6 +447,7 @@ static void ia32_finish_irg(ir_graph *irg, ia32_code_gen_t *cg) {
sched_add_after(sched_point, stack_free);
}
}
#endif
}
......@@ -470,15 +475,18 @@ static ir_node *ia32_lower_spill(void *self, ir_node *spill) {
ir_node *ptr = get_irg_frame(cg->irg);
ir_node *val = be_get_Spill_context(spill);
ir_node *mem = new_rd_NoMem(cg->irg);
ir_node *noreg = be_new_NoReg(cg->irg);
ir_mode *mode = get_irn_mode(spill);
ir_node *res;
entity *ent = be_get_spill_entity(spill);
unsigned offs = get_entity_offset_bytes(ent);
char buf[64];
DB((cg->mod, LEVEL_1, "lower_spill: got offset %d for %+F\n", offs, ent));
res = new_rd_ia32_Store(dbg, cg->irg, block, ptr, val, mem, mode);
set_ia32_am_offs(res, new_tarval_from_long(offs, mode_Iu));
res = new_rd_ia32_Store(dbg, cg->irg, block, ptr, noreg, val, mem, mode);
snprintf(buf, sizeof(buf), "%d", offs);
add_ia32_am_offs(res, buf);
return res;
}
......@@ -493,24 +501,29 @@ static ir_node *ia32_lower_reload(void *self, ir_node *reload) {
ir_node *ptr = get_irg_frame(cg->irg);
ir_mode *mode = get_irn_mode(reload);
ir_node *pred = get_irn_n(reload, 0);
tarval *tv;
ir_node *noreg = be_new_NoReg(cg->irg);
char buf[64];
char *ofs;
ir_node *res;
if (be_is_Spill(pred)) {
entity *ent = be_get_spill_entity(pred);
unsigned offs = get_entity_offset_bytes(ent);
DB((cg->mod, LEVEL_1, "lower_reload: got offset %d for %+F\n", offs, ent));
tv = new_tarval_from_long(offs, mode_Iu);
snprintf(buf, sizeof(buf), "%d", offs);
}
else if (is_ia32_Store(pred)) {
tv = get_ia32_am_offs(pred);
ofs = get_ia32_am_offs(pred);
strncpy(buf, ofs, sizeof(buf));
free(ofs);
}
else {
assert(0 && "unsupported Reload predecessor");
}
res = new_rd_ia32_Load(dbg, cg->irg, block, ptr, pred, mode);
set_ia32_am_offs(res, tv);
res = new_rd_ia32_Load(dbg, cg->irg, block, ptr, noreg, pred, mode);
add_ia32_am_offs(res, buf);
return res;
}
......@@ -522,10 +535,10 @@ static const arch_register_t *ia32_get_stack_register(void *self) {
ia32_code_gen_t *cg = self;
if (cg->has_alloca) {
return &ia32_general_purpose_regs[REG_EBP];
return &ia32_gp_regs[REG_EBP];
}
return &ia32_general_purpose_regs[REG_ESP];
return &ia32_gp_regs[REG_ESP];
}
/**
......@@ -543,7 +556,7 @@ static void ia32_codegen(void *self) {
}
ia32_finish_irg(irg, cg);
dump_ir_block_graph_sched(irg, "-finished");
//dump_ir_block_graph_sched(irg, "-finished");
ia32_gen_routine(out, irg, cg);
cur_reg_set = NULL;
......@@ -674,17 +687,17 @@ long ia32_handle_call_proj(const void *self, ir_node *proj, int is_keep) {
assert(pn == 0 && "only one floating point result supported");
/* Get the proj number for the floating point result */
pn = ia32_get_reg_projnum(&ia32_floating_point_regs[REG_XMM0], isa->reg_projnum_map);
pn = ia32_get_reg_projnum(&ia32_fp_regs[REG_XMM0], isa->reg_projnum_map);
}
else {
/* In case of 64bit return value, the result is */
/* in EDX:EAX and we have two result projs. */
switch (pn) {
case 0:
pn = ia32_get_reg_projnum(&ia32_general_purpose_regs[REG_EAX], isa->reg_projnum_map);
pn = ia32_get_reg_projnum(&ia32_gp_regs[REG_EAX], isa->reg_projnum_map);
break;
case 1:
pn = ia32_get_reg_projnum(&ia32_general_purpose_regs[REG_EDX], isa->reg_projnum_map);
pn = ia32_get_reg_projnum(&ia32_gp_regs[REG_EDX], isa->reg_projnum_map);
break;
default:
assert(0 && "only two int results supported");
......@@ -696,7 +709,7 @@ long ia32_handle_call_proj(const void *self, ir_node *proj, int is_keep) {
}
else {
/* Set mode to floating point if required */
if (!strcmp(ia32_reg_classes[CLASS_ia32_floating_point].name,
if (!strcmp(ia32_reg_classes[CLASS_ia32_fp].name,
ia32_projnum_reg_req_map[pn]->req.cls->name)) {
set_irn_mode(proj, mode_F);
}
......@@ -722,7 +735,7 @@ list_sched_selector_t ia32_sched_selector;
* Returns the reg_pressure scheduler with to_appear_in_schedule() overloaded
*/
static const list_sched_selector_t *ia32_get_list_sched_selector(const void *self) {
memcpy(&ia32_sched_selector, reg_pressure_selector, sizeof(list_sched_selector_t));
memcpy(&ia32_sched_selector, trivial_selector, sizeof(list_sched_selector_t));
ia32_sched_selector.to_appear_in_schedule = ia32_to_appear_in_schedule;
return &ia32_sched_selector;
}
......
......@@ -25,6 +25,17 @@
static const arch_env_t *arch_env = NULL;
char *ia32_emit_binop(ir_node *irn) {
return "R1, R2";
}
char *ia32_emit_unop(ir_node *irn) {
return "R";
}
char *ia32_emit_am(ir_node *irn) {
return "AM";
}
/*************************************************************
* _ _ __ _ _
......@@ -41,35 +52,24 @@ static const arch_env_t *arch_env = NULL;
* Return node's tarval as string.
*/
const char *node_const_to_str(ir_node *n) {
char *buf;
tarval *tv = get_ia32_Immop_tarval(n);
char *s = get_ia32_cnst(n);
if (tv) {
buf = xmalloc(SNPRINTF_BUF_LEN);
tarval_snprintf(buf, SNPRINTF_BUF_LEN, tv);
return buf;
}
else if (get_ia32_old_ir(n)) {
return get_sc_name(get_ia32_old_ir(n));
}
else
return "0";
if (!s)
s = "NULL";
return s;
}
/**
* Returns node's offset as string.
*/
char *node_offset_to_str(ir_node *n) {
char *buf;
tarval *tv = get_ia32_am_offs(n);
char *s = get_ia32_am_offs(n);
if (tv) {
buf = xmalloc(SNPRINTF_BUF_LEN);
tarval_snprintf(buf, SNPRINTF_BUF_LEN, tv);
return buf;
}
else
return "";
if (!s)
s = "";
return s;
}
/* We always pass the ir_node which is a pointer. */
......@@ -736,15 +736,10 @@ void ia32_emit_node(ir_node *irn, void *env) {
#define EMIT(a) if (get_irn_opcode(irn) == iro_##a) { emit_##a(irn, emit_env); return; }
/* generated int emitter functions */
IA32_EMIT(Copy);
IA32_EMIT(Perm);
IA32_EMIT(Const);
IA32_EMIT(Add);
IA32_EMIT(Add_i);
IA32_EMIT(Sub);
IA32_EMIT(Sub_i);
IA32_EMIT(Minus);
IA32_EMIT(Inc);
IA32_EMIT(Dec);
......@@ -753,30 +748,21 @@ void ia32_emit_node(ir_node *irn, void *env) {
IA32_EMIT(Min);
IA32_EMIT(And);
IA32_EMIT(And_i);
IA32_EMIT(Or);
IA32_EMIT(Or_i);
IA32_EMIT(Eor);
IA32_EMIT(Eor_i);
IA32_EMIT(Not);
IA32_EMIT(Shl);
IA32_EMIT(Shl_i);
IA32_EMIT(Shr);
IA32_EMIT(Shr_i);
IA32_EMIT(Shrs);
IA32_EMIT(Shrs_i);
IA32_EMIT(RotL);
IA32_EMIT(RotL_i);
IA32_EMIT(RotR);
IA32_EMIT(Lea);
IA32_EMIT(Lea_i);
IA32_EMIT(Mul);
IA32_EMIT(Mul_i);
IA32_EMIT(Cltd);
IA32_EMIT(Cdq);
IA32_EMIT(DivMod);
IA32_EMIT(Store);
......@@ -787,7 +773,6 @@ void ia32_emit_node(ir_node *irn, void *env) {
IA32_EMIT(fAdd);
IA32_EMIT(fSub);
IA32_EMIT(fMinus);
IA32_EMIT(fMul);
IA32_EMIT(fDiv);
......@@ -800,11 +785,8 @@ void ia32_emit_node(ir_node *irn, void *env) {
/* other emitter functions */
IA32_EMIT(CondJmp);
IA32_EMIT(CondJmp_i);
IA32_EMIT(SwitchJmp);
IA32_EMIT(Call);
IA32_EMIT(Alloca);
IA32_EMIT(Alloca_i);
EMIT(Jmp);
EMIT(Proj);
......
......@@ -18,7 +18,9 @@ typedef struct _emit_env_t {
const lc_arg_env_t *ia32_get_arg_env(void);
void equalize_dest_src(FILE *F, ir_node *n);
char *ia32_emit_binop(ir_node *irn);
char *ia32_emit_unop(ir_node *irn);
char *ia32_emit_am(ir_node *irn);
int get_ia32_reg_nr(ir_node *irn, int posi, int in_out);
const char *get_ia32_in_reg_name(ir_node *irn, int pos);
......
......@@ -18,44 +18,44 @@ static int maxnum_fpreg_args = 5; /* maximum number of float arguments passed
/* this is the order of the assigned registers usesd for parameter passing */
const ia32_register_req_t *gpreg_param_req_std[] = {
&ia32_default_req_ia32_general_purpose_eax,
&ia32_default_req_ia32_general_purpose_ecx,
&ia32_default_req_ia32_general_purpose_edx,
&ia32_default_req_ia32_general_purpose_ebx,
&ia32_default_req_ia32_general_purpose_edi,
&ia32_default_req_ia32_general_purpose_esi
&ia32_default_req_ia32_gp_eax,
&ia32_default_req_ia32_gp_ecx,
&ia32_default_req_ia32_gp_edx,
&ia32_default_req_ia32_gp_ebx,
&ia32_default_req_ia32_gp_edi,
&ia32_default_req_ia32_gp_esi
};
const ia32_register_req_t *gpreg_param_req_this[] = {
&ia32_default_req_ia32_general_purpose_ecx,
&ia32_default_req_ia32_general_purpose_eax,
&ia32_default_req_ia32_general_purpose_edx,
&ia32_default_req_ia32_general_purpose_ebx,
&ia32_default_req_ia32_general_purpose_edi,
&ia32_default_req_ia32_general_purpose_esi
&ia32_default_req_ia32_gp_ecx,
&ia32_default_req_ia32_gp_eax,
&ia32_default_req_ia32_gp_edx,
&ia32_default_req_ia32_gp_ebx,
&ia32_default_req_ia32_gp_edi,
&ia32_default_req_ia32_gp_esi
};
const ia32_register_req_t *fpreg_param_req_std[] = {
&ia32_default_req_ia32_floating_point_xmm0,
&ia32_default_req_ia32_floating_point_xmm1,
&ia32_default_req_ia32_floating_point_xmm2,
&ia32_default_req_ia32_floating_point_xmm3,
&ia32_default_req_ia32_floating_point_xmm4,
&ia32_default_req_ia32_floating_point_xmm5,
&ia32_default_req_ia32_floating_point_xmm6,
&ia32_default_req_ia32_floating_point_xmm7
&ia32_default_req_ia32_fp_xmm0,
&ia32_default_req_ia32_fp_xmm1,
&ia32_default_req_ia32_fp_xmm2,
&ia32_default_req_ia32_fp_xmm3,
&ia32_default_req_ia32_fp_xmm4,
&ia32_default_req_ia32_fp_xmm5,
&ia32_default_req_ia32_fp_xmm6,
&ia32_default_req_ia32_fp_xmm7
};
const ia32_register_req_t *fpreg_param_req_this[] = {
NULL, /* in case of a "this" pointer, the first parameter must not be a float */
&ia32_default_req_ia32_floating_point_xmm0,
&ia32_default_req_ia32_floating_point_xmm1,
&ia32_default_req_ia32_floating_point_xmm2,
&ia32_default_req_ia32_floating_point_xmm3,
&ia32_default_req_ia32_floating_point_xmm4,
&ia32_default_req_ia32_floating_point_xmm5,
&ia32_default_req_ia32_floating_point_xmm6,
&ia32_default_req_ia32_floating_point_xmm7
&ia32_default_req_ia32_fp_xmm0,
&ia32_default_req_ia32_fp_xmm1,
&ia32_default_req_ia32_fp_xmm2,
&ia32_default_req_ia32_fp_xmm3,
&ia32_default_req_ia32_fp_xmm4,
&ia32_default_req_ia32_fp_xmm5,
&ia32_default_req_ia32_fp_xmm6,
&ia32_default_req_ia32_fp_xmm7
};
......@@ -247,13 +247,13 @@ long ia32_translate_proj_pos(const ir_node *proj) {
else if (is_ia32_Store(pred)) {
return 0;
}
else if (is_ia32_CondJmp(pred) || is_ia32_CondJmp_i(pred)) {
else if (is_ia32_CondJmp(pred)) {
return 0;
}
else if (is_ia32_SwitchJmp(pred)) {
return 0;
}
else if (is_ia32_Cltd(pred) || is_ia32_Mul(pred)) {
else if (is_ia32_Cdq(pred) || is_ia32_Mulh(pred)) {
if (nr == pn_EAX)
return 0;
if (nr == pn_EDX)
......@@ -265,6 +265,12 @@ long ia32_translate_proj_pos(const ir_node *proj) {
if (nr == pn_DivMod_res_mod || pn_Mod_res)
return 1;
}
else if (is_ia32_fDiv(pred)) {
if (nr == pn_Quot_res)
return 0;
else
assert(0 && "there should be no more Projs for a fDiv");
}
else if (is_ia32_Call(pred)) {
return 0;
}
......
This diff is collapsed.
......@@ -30,47 +30,52 @@ const char *get_sc_name(ir_node *symc);
/**
* Returns the attributes of an ia32 node.
*/
asmop_attr *get_ia32_attr(const ir_node *node);
ia32_attr_t *get_ia32_attr(const ir_node *node);
/**
* Gets the type of an ia32 node.
*/
asmop_type_t get_ia32_op_type(const ir_node *node);
ia32_op_type_t get_ia32_op_type(const ir_node *node);
/**
* Sets the type of an ia32 node.
*/
void set_ia32_op_type(const ir_node *node, asmop_type_t tp);
void set_ia32_op_type(ir_node *node, ia32_op_type_t tp);
/**
* Gets the addr mode type of an ia32 node
* Gets the supported addrmode of an ia32 node
*/
addrmode_type_t get_ia32_am_type(const ir_node *node);
ia32_am_type_t get_ia32_am_support(const ir_node *node);
/**
* Sets the addr mode type of an ia32 node
* Sets the supported addrmode of an ia32 node
*/
void set_ia32_am_type(const ir_node *node, addrmode_type_t am_tp);
void set_ia32_am_support(ir_node *node, ia32_am_type_t am_tp);
/**
* Gets the addr mode offset.
* Gets the joined addrmode offset.
*/
tarval *get_ia32_am_offs(const ir_node *node);
char *get_ia32_am_offs(const ir_node *node);
/**
* Sets the offset for addr mode.
* Adds an offset for addrmode.
*/
void set_ia32_am_offs(ir_node *node, tarval *am_offs);
void add_ia32_am_offs(ir_node *node, char *offset);
/**
* Subs an offset for addrmode.
*/
void sub_ia32_am_offs(ir_node *node, char *offset);
/**
* Gets the addr mode const.
*/
tarval *get_ia32_am_const(const ir_node *node);
int get_ia32_am_scale(const ir_node *node);
/**
* Sets the const for addr mode.
*/
void set_ia32_am_const(ir_node *node, tarval *am_const);
void set_ia32_am_scale(ir_node *node, int scale);
/**
* Return the tarval of an immediate operation or NULL in case of SymConst
......@@ -83,14 +88,19 @@ tarval *get_ia32_Immop_tarval(const ir_node *node);
void set_ia32_Immop_tarval(ir_node *node, tarval *tv);
/**
* Return the old_ir attribute.
* Return the sc attribute.
*/
char *get_ia32_sc(const ir_node *node);
/**
* Sets the sc attribute.
*/
ir_node *get_ia32_old_ir(const ir_node *node);
void set_ia32_sc(ir_node *node, char *sc);
/**
* Sets the old_ir attribute.
* Gets the string representation of the internal const (tv or symconst)
*/
void set_ia32_old_ir(ir_node *node, ir_node *old_ir);
char *get_ia32_cnst(ir_node *node);
/**
* Returns the argument register requirements of an ia32 node.
......@@ -165,12 +175,12 @@ int get_ia32_n_res(const ir_node *node);
/**
* Returns the flavour of an ia32 node,
*/
op_flavour_t get_ia32_flavour(const ir_node *node);
ia32_op_flavour_t get_ia32_flavour(const ir_node *node);
/**
* Sets the flavour of an ia32 node to flavour_Div/Mod/DivMod/Mul/Mulh.
*/
void set_ia32_flavour(ir_node *node, op_flavour_t op_flav);
void set_ia32_flavour(ir_node *node, ia32_op_flavour_t op_flav);
/**
* Returns the projnum code.
......@@ -217,18 +227,19 @@ void set_ia32_Const_attr(ir_node *ia32_cnst, ir_node *cnst);
/**
* Sets the AddrMode attribute
* @param direction The "direction" of AM ('S' source or 'D' destination)
*/
void set_ia32_AddrMode(ir_node *node);
void set_ia32_AddrMode(ir_node *node, char direction);
/**
* Returns whether or not the node is an AddrMode node.
* Returns whether or not the node is an AddrModeS node.
*/
int is_ia32_AddrMode(ir_node *node);
int is_ia32_AddrModeS(ir_node *node);
/**
* Checks whether or not an ir_node is an ia32 node
* Returns whether or not the node is an AddrModeD node.
*/
int is_ia32_irn(const ir_node *node);
int is_ia32_AddrModeD(ir_node *node);
/* Include the generated headers */
#include "gen_ia32_new_nodes.h"
......
#ifndef _IA32_NODES_ATTR_H_
#define _IA32_NODES_ATTR_H_
#include <obstack.h>
#include "firm_types.h"
#include "../bearch.h"
typedef enum { flavour_Div = 1, flavour_Mod, flavour_DivMod, flavour_Mul, flavour_Mulh } op_flavour_t;
typedef enum { flavour_Div = 1, flavour_Mod, flavour_DivMod, flavour_Mul, flavour_Mulh } ia32_op_flavour_t;
typedef enum { pn_EAX, pn_EDX } pn_ia32_Register;
typedef enum { asmop_Normal, asmop_Const, asmop_SymConst, asmop_AddrMode } asmop_type_t;
typedef enum { ia32_Normal, ia32_Const, ia32_SymConst, ia32_AddrModeD, ia32_AddrModeS } ia32_op_type_t;
typedef enum {
am_Reg = 1, /**<< (%reg) */
am_OffsReg, /**<< o(%reg) */
am_RegReg, /**<< (%reg, %reg) */
am_RegConst, /**<< ( , %reg, const) */
am_OffsRegConst, /**<< o( , %reg, const) */
am_OffsRegReg, /**<< o(%reg, %reg) */
am_RegRegConst, /**<< (%reg, %reg, const) */
am_OffsRegRegConst /**<< o(%reg, %reg, const) */
} addrmode_type_t;
ia32_am_None = 0, /**<< no addrmode support */
ia32_am_Dest = 1, /**<< addrmode for destination only */
ia32_am_Source = 2, /**<< addrmode for source only */
ia32_am_Full = 3 /**<< full addmode support */
} ia32_am_type_t;
typedef struct _ia32_register_req_t {
const arch_register_req_t req;
int pos; /**<< in case of "should be same/different" we need to remember the pos to get the irn */
} ia32_register_req_t;
typedef struct _ia32_asmop_attr {
asmop_type_t tp; /**<< ia32 node type */
addrmode_type_t am_tp; /**<< addr mode type */
typedef struct _ia32_attr_t {
ia32_op_type_t tp; /**<< ia32 node type */
ia32_am_type_t am_support; /**<< indicates addrmode type supported by this node */
tarval *am_offs; /**<< offset for AddrMode */
tarval *am_const; /**<< shift const for AddrMode */
struct obstack *am_offs; /**<< offsets for AddrMode */
int am_scale; /**<< addrmode scale for index register */
tarval *tv; /**<< tarval for immediate operations */
ir_node *old_ir; /**<< old ir node to avoid duplicating information (symconst in case of asmop_SymConst) */
tarval *tv; /**<< tarval for immediate operations */
char *sc; /**<< symconst name */
char *cnst; /**<< points to the string representation of the constant value (either tv or sc) */