Commit 7d9b4c45 authored by Christian Würdig's avatar Christian Würdig
Browse files

removed some unused variables

added debug messages
made code ansi compliant (according to gcc)
parent 3821cefb
......@@ -77,7 +77,6 @@ static const arch_register_req_t *ia32_get_irn_reg_req(const void *self, arch_re
long node_pos = pos == -1 ? 0 : pos;
ir_mode *mode = get_irn_mode(irn);
firm_dbg_module_t *mod = firm_dbg_register(DEBUG_MODULE);
const ia32_irn_ops_t *ops = self;
if (mode == mode_T || mode == mode_M) {
DBG((mod, LEVEL_1, "ignoring mode_T, mode_M node %+F\n", irn));
......@@ -443,7 +442,6 @@ static void transform_to_Store(ia32_transform_env_t *env) {
*/
static void ia32_after_ra_walker(ir_node *node, void *env) {
ia32_code_gen_t *cg = env;
ir_node *new_node = NULL;
ia32_transform_env_t tenv;
if (is_Block(node))
......@@ -669,7 +667,14 @@ void ia32_get_call_abi(const void *self, ir_type *method_type, be_abi_call_t *ab
int i, ignore;
ir_mode **modes;
const arch_register_t *reg;
be_abi_call_flags_t call_flags = { 0, 0, 1, 0, 1 };
be_abi_call_flags_t call_flags;
/* set abi flags for calls */
call_flags.bits.left_to_right = 0;
call_flags.bits.store_args_sequential = 0;
call_flags.bits.try_omit_fp = 1;
call_flags.bits.fp_free = 0;
call_flags.bits.call_has_imm = 1;
/* get the between type and the frame pointer save entity */
between_type = get_between_type();
......
......@@ -55,22 +55,6 @@ extern int obstack_printf(struct obstack *obst, char *fmt, ...);
* |_|
***********************************************************************************/
/**
* Prints a tarval to file F.
* @param F output file
* @param tv tarval
* @param brackets 1 == print square brackets around tarval
*/
static void fprintf_tv(FILE *F, tarval *tv, int brackets) {
char buf[1024];
tarval_snprintf(buf, sizeof(buf), tv);
if (brackets)
fprintf(F, "[%s]", buf);
else
fprintf(F, "%s", buf);
}
/**
* Returns the name of a SymConst.
* @param symc the SymConst
......@@ -327,7 +311,7 @@ static int dump_node_ia32(ir_node *n, FILE *F, dump_reason_t reason) {
fprintf(F, "AM scale = %d\n", get_ia32_am_scale(n));
/* dump pn code */
fprintf(F, "pn_code = %d\n", get_ia32_pncode(n));
fprintf(F, "pn_code = %ld\n", get_ia32_pncode(n));
/* dump n_res */
fprintf(F, "n_res = %d\n", get_ia32_n_res(n));
......
......@@ -382,7 +382,6 @@ static int load_store_addr_is_equal(const ir_node *load, const ir_node *store,
*/
static ir_node *fold_addr(be_abi_irg_t *babi, ir_node *irn, firm_dbg_module_t *mod, ir_node *noreg) {
ir_graph *irg = get_irn_irg(irn);
ir_mode *mode = get_irn_mode(irn);
dbg_info *dbg = get_irn_dbg_info(irn);
ir_node *block = get_nodes_block(irn);
ir_node *res = irn;
......@@ -605,7 +604,6 @@ static ir_node *fold_addr(be_abi_irg_t *babi, ir_node *irn, firm_dbg_module_t *m
*/
void ia32_optimize_am(ir_node *irn, void *env) {
ia32_code_gen_t *cg = env;
ir_graph *irg = cg->irg;
firm_dbg_module_t *mod = cg->mod;
ir_node *res = irn;
be_abi_irg_t *babi = cg->birg->abi;
......@@ -646,7 +644,13 @@ void ia32_optimize_am(ir_node *irn, void *env) {
/* Do not try to create a LEA if one of the operands is a Load. */
/* check is irn is a candidate for address calculation */
if (is_candidate(block, irn, 1)) {
DBG((mod, LEVEL_1, "\tfound address calculation candidate %+F ... ", irn));
res = fold_addr(babi, irn, mod, noreg_gp);
if (res == irn)
DB((mod, LEVEL_1, "transformed into %+F\n", res));
else
DB((mod, LEVEL_1, "not transformed\n"));
}
}
......@@ -672,6 +676,8 @@ void ia32_optimize_am(ir_node *irn, void *env) {
left = get_irn_n(irn, 0);
if (is_ia32_Lea(left)) {
DBG((mod, LEVEL_1, "\nmerging %+F into %+F\n", left, irn));
/* get the AM attributes from the LEA */
add_ia32_am_offs(irn, get_ia32_am_offs(left));
set_ia32_am_scale(irn, get_ia32_am_scale(left));
......@@ -686,6 +692,8 @@ void ia32_optimize_am(ir_node *irn, void *env) {
}
/* check if the node is an address mode candidate */
else if (is_candidate(block, irn, 0)) {
DBG((mod, LEVEL_1, "\tfound address mode candidate %+F ... ", irn));
left = get_irn_n(irn, 2);
if (get_irn_arity(irn) == 4) {
/* it's an "unary" operation */
......@@ -811,6 +819,8 @@ void ia32_optimize_am(ir_node *irn, void *env) {
mem_proj = get_mem_proj(store);
set_Proj_pred(mem_proj, irn);
set_Proj_proj(mem_proj, 1);
DB((mod, LEVEL_1, "merged with %+F and %+F into dest AM\n", load, store));
}
} /* if (store) */
else if (get_ia32_am_support(irn) & ia32_am_Source) {
......@@ -882,6 +892,8 @@ void ia32_optimize_am(ir_node *irn, void *env) {
set_Proj_pred(mem_proj, irn);
set_Proj_proj(mem_proj, 1);
}
DB((mod, LEVEL_1, "merged with %+F into source AM\n", left));
}
}
}
......
......@@ -182,7 +182,6 @@ static ir_node *gen_binop(ia32_transform_env_t *env, ir_node *op1, ir_node *op2,
ir_node *nomem = new_NoMem();
ir_node *expr_op, *imm_op;
/* Check if immediate optimization is on and */
/* if it's an operation with immediate. */
if (! env->cg->opt.immops) {
......@@ -208,11 +207,13 @@ static ir_node *gen_binop(ia32_transform_env_t *env, ir_node *op1, ir_node *op2,
if (mode_is_float(mode)) {
/* floating point operations */
if (imm_op) {
DB((mod, LEVEL_1, "FP with immediate ..."));
new_op = func(dbg, irg, block, noreg_gp, noreg_gp, expr_op, noreg_fp, nomem, mode_T);
set_ia32_Immop_attr(new_op, imm_op);
set_ia32_am_support(new_op, ia32_am_None);
}
else {
DB((mod, LEVEL_1, "FP binop ..."));
new_op = func(dbg, irg, block, noreg_gp, noreg_gp, op1, op2, nomem, mode_T);
set_ia32_am_support(new_op, ia32_am_Source);
}
......@@ -221,6 +222,7 @@ static ir_node *gen_binop(ia32_transform_env_t *env, ir_node *op1, ir_node *op2,
/* integer operations */
if (imm_op) {
/* This is expr + const */
DB((mod, LEVEL_1, "INT with immediate ..."));
new_op = func(dbg, irg, block, noreg_gp, noreg_gp, expr_op, noreg_gp, nomem, mode_T);
set_ia32_Immop_attr(new_op, imm_op);
......@@ -228,6 +230,7 @@ static ir_node *gen_binop(ia32_transform_env_t *env, ir_node *op1, ir_node *op2,
set_ia32_am_support(new_op, ia32_am_Dest);
}
else {
DB((mod, LEVEL_1, "INT binop ..."));
/* This is a normal operation */
new_op = func(dbg, irg, block, noreg_gp, noreg_gp, op1, op2, nomem, mode_T);
......@@ -295,12 +298,14 @@ static ir_node *gen_shift_binop(ia32_transform_env_t *env, ir_node *op1, ir_node
/* integer operations */
if (imm_op) {
/* This is shift/rot with const */
DB((mod, LEVEL_1, "Shift/Rot with immediate ..."));
new_op = func(dbg, irg, block, noreg, noreg, expr_op, noreg, nomem, mode_T);
set_ia32_Immop_attr(new_op, imm_op);
}
else {
/* This is a normal shift/rot */
DB((mod, LEVEL_1, "Shift/Rot binop ..."));
new_op = func(dbg, irg, block, noreg, noreg, op1, op2, nomem, mode_T);
}
......@@ -323,6 +328,7 @@ static ir_node *gen_unop(ia32_transform_env_t *env, ir_node *op, construct_unop_
ir_node *new_op = NULL;
ir_mode *mode = env->mode;
dbg_info *dbg = env->dbg;
firm_dbg_module_t *mod = env->mod;
ir_graph *irg = env->irg;
ir_node *block = env->block;
ir_node *noreg = ia32_new_NoReg_gp(env->cg);
......@@ -331,10 +337,12 @@ static ir_node *gen_unop(ia32_transform_env_t *env, ir_node *op, construct_unop_
new_op = func(dbg, irg, block, noreg, noreg, op, nomem, mode_T);
if (mode_is_float(mode)) {
DB((mod, LEVEL_1, "FP unop ..."));
/* floating point operations don't support implicit store */
set_ia32_am_support(new_op, ia32_am_None);
}
else {
DB((mod, LEVEL_1, "INT unop ..."));
set_ia32_am_support(new_op, ia32_am_Dest);
}
......@@ -356,7 +364,6 @@ static ir_node *gen_imm_Add(ia32_transform_env_t *env, ir_node *expr_op, ir_node
tarval *tv = get_ia32_Immop_tarval(const_op);
firm_dbg_module_t *mod = env->mod;
dbg_info *dbg = env->dbg;
ir_mode *mode = env->mode;
ir_graph *irg = env->irg;
ir_node *block = env->block;
ir_node *noreg = ia32_new_NoReg_gp(env->cg);
......@@ -644,7 +651,6 @@ static ir_node *gen_imm_Sub(ia32_transform_env_t *env, ir_node *expr_op, ir_node
tarval *tv = get_ia32_Immop_tarval(const_op);
firm_dbg_module_t *mod = env->mod;
dbg_info *dbg = env->dbg;
ir_mode *mode = env->mode;
ir_graph *irg = env->irg;
ir_node *block = env->block;
ir_node *noreg = ia32_new_NoReg_gp(env->cg);
......@@ -1174,17 +1180,6 @@ static ir_node *gen_Store(ia32_transform_env_t *env) {
/**
* Transforms a Call and its arguments corresponding to the calling convention.
*
* @param env The transformation environment
* @return The created ia32 Call node
*/
static ir_node *gen_Call(ia32_transform_env_t *env) {
}
/**
* Transforms a Cond -> Proj[b] -> Cmp into a CondJmp or CondJmp_i
*
......@@ -1252,7 +1247,6 @@ static ir_node *gen_CopyB(ia32_transform_env_t *env) {
ir_node *src = get_CopyB_src(node);
ir_node *dst = get_CopyB_dst(node);
ir_node *mem = get_CopyB_mem(node);
ir_node *noreg = ia32_new_NoReg_gp(env->cg);
int size = get_type_size_bytes(get_CopyB_type(node));
int rem;
......@@ -1396,6 +1390,7 @@ void ia32_transform_node(ir_node *node, void *env) {
BINOP(Shl);
BINOP(Shr);
BINOP(Shrs);
BINOP(Rot);
BINOP(Quot);
......
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