- Allocate register slots array separately on obstack

- "Fix" TEMPLATE backend
- Load TEMPLATE backend in bemodules
- fix ppc32 not scheduling alot of nodes

[r14319]

ir/be/TEMPLATE/TEMPLATE_new_nodes.c

@@ -157,15 +157,15 @@ static int TEMPLATE_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
 			}
 
 			/* dump OUT requirements */
-			if (attr->n_res > 0) {
+			if (ARR_LEN(attr->slots) > 0) {
 				reqs = get_TEMPLATE_out_req_all(n);
 				dump_reg_req(F, n, reqs, 1);
 			}
 
 			/* dump assigned registers */
 			slots = get_TEMPLATE_slots(n);
-			if (slots && attr->n_res > 0) {
-				for (i = 0; i < attr->n_res; i++) {
+			if (slots && ARR_LEN(attr->slots) > 0) {
+				for (i = 0; i < ARR_LEN(attr->slots); i++) {
 					if (slots[i]) {
 						fprintf(F, "reg #%d = %s\n", i, slots[i]->name);
 					}
@@ -318,7 +318,7 @@ const char *get_TEMPLATE_out_reg_name(const ir_node *node, int pos) {
 	const TEMPLATE_attr_t *attr = get_TEMPLATE_attr_const(node);
 
 	assert(is_TEMPLATE_irn(node) && "Not an TEMPLATE node.");
-	assert(pos < attr->n_res && "Invalid OUT position.");
+	assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
 	assert(attr->slots[pos]  && "No register assigned");
 
 	return arch_register_get_name(attr->slots[pos]);
@@ -331,7 +331,7 @@ int get_TEMPLATE_out_regnr(const ir_node *node, int pos) {
 	const TEMPLATE_attr_t *attr = get_TEMPLATE_attr_const(node);
 
 	assert(is_TEMPLATE_irn(node) && "Not an TEMPLATE node.");
-	assert(pos < attr->n_res && "Invalid OUT position.");
+	assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
 	assert(attr->slots[pos]  && "No register assigned");
 
 	return arch_register_get_index(attr->slots[pos]);
@@ -344,26 +344,18 @@ const arch_register_t *get_TEMPLATE_out_reg(const ir_node *node, int pos) {
 	const TEMPLATE_attr_t *attr = get_TEMPLATE_attr_const(node);
 
 	assert(is_TEMPLATE_irn(node) && "Not an TEMPLATE node.");
-	assert(pos < attr->n_res && "Invalid OUT position.");
+	assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
 	assert(attr->slots[pos]  && "No register assigned");
 
 	return attr->slots[pos];
 }
 
-/**
- * Sets the number of results.
- */
-void set_TEMPLATE_n_res(ir_node *node, int n_res) {
-	TEMPLATE_attr_t *attr = get_TEMPLATE_attr(node);
-	attr->n_res      = n_res;
-}
-
 /**
  * Returns the number of results.
  */
 int get_TEMPLATE_n_res(const ir_node *node) {
 	const TEMPLATE_attr_t *attr = get_TEMPLATE_attr_const(node);
-	return attr->n_res;
+	return ARR_LEN(attr->slots);
 }
 
 /**
@@ -375,14 +367,16 @@ void init_TEMPLATE_attributes(ir_node *node, arch_irn_flags_t flags,
                               const be_execution_unit_t ***execution_units,
                               int n_res, unsigned latency)
 {
+	ir_graph        *irg  = get_irn_irg(node);
+	struct obstack  *obst = get_irg_obstack(irg);
 	TEMPLATE_attr_t *attr = get_TEMPLATE_attr(node);
 
-	attr->flags = flags;
+	attr->flags   = flags;
 	attr->out_req = out_reqs;
-	attr->in_req = in_reqs;
-	attr->n_res = n_res;
+	attr->in_req  = in_reqs;
 
-	memset((void *)attr->slots, 0, n_res * sizeof(attr->slots[0]));
+	attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res);
+	memset(attr->slots, 0, n_res * sizeof(attr->slots[0]));
 }
 
 /***************************************************************************************

ir/be/TEMPLATE/TEMPLATE_new_nodes.h

@@ -107,11 +107,6 @@ int get_TEMPLATE_out_regnr(const ir_node *node, int pos);
  */
 const arch_register_t *get_TEMPLATE_out_reg(const ir_node *node, int pos);
 
-/**
- * Sets the number of results.
- */
-void set_TEMPLATE_n_res(ir_node *node, int n_res);
-
 /**
  * Returns the number of results.
  */

ir/be/TEMPLATE/TEMPLATE_nodes_attr.h

@@ -32,13 +32,11 @@ typedef struct TEMPLATE_attr_t  TEMPLATE_attr_t;
 struct TEMPLATE_attr_t
 {
 	arch_irn_flags_t flags;     /**< indicating if spillable, rematerializeable ... etc. */
-	int              n_res;     /**< number of results for this node */
 
 	const arch_register_req_t **in_req;  /**< register requirements for arguments */
 	const arch_register_req_t **out_req; /**< register requirements for results */
 
-	/* must be last, dynamically allocated */
-	const arch_register_t *slots[1];         /**< register slots for assigned registers */
+	const arch_register_t **slots;       /**< register slots for assigned registers */
 };
 
 #endif

ir/be/TEMPLATE/bearch_TEMPLATE.c

@@ -558,7 +558,10 @@ const arch_irn_handler_t *TEMPLATE_get_irn_handler(const void *self) {
 }
 
 int TEMPLATE_to_appear_in_schedule(void *block_env, const ir_node *irn) {
-	return is_TEMPLATE_irn(irn);
+	if(!is_TEMPLATE_irn(irn))
+		return -1;
+
+	return 1;
 }
 
 /**
@@ -594,7 +597,7 @@ static int TEMPLATE_get_reg_class_alignment(const void *self, const arch_registe
 /**
  * Returns the libFirm configuration parameter for this backend.
  */
-static const backend_params *TEMPLATE_get_libfirm_params(void) {
+static const backend_params *TEMPLATE_get_backend_params(void) {
 	static arch_dep_params_t ad = {
 		1,  /* allow subs */
 		0,  /* Muls are fast enough on Firm */
@@ -630,6 +633,10 @@ static const be_machine_t *TEMPLATE_get_machine(const void *self) {
 	return NULL;
 }
 
+static ir_graph **TEMPLATE_get_backend_irg_list(const void *self, ir_graph ***irgs) {
+	return NULL;
+}
+
 
 const arch_isa_if_t TEMPLATE_isa_if = {
 	TEMPLATE_init,
@@ -643,9 +650,10 @@ const arch_isa_if_t TEMPLATE_isa_if = {
 	TEMPLATE_get_list_sched_selector,
 	TEMPLATE_get_ilp_sched_selector,
 	TEMPLATE_get_reg_class_alignment,
-    TEMPLATE_get_libfirm_params,
+    TEMPLATE_get_backend_params,
 	TEMPLATE_get_allowed_execution_units,
-	TEMPLATE_get_machine
+	TEMPLATE_get_machine,
+	TEMPLATE_get_backend_irg_list
 };
 
 void be_init_arch_TEMPLATE(void)

ir/be/arm/arm_new_nodes.c

@@ -170,15 +170,15 @@ static int arm_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
 			}
 
 			/* dump OUT requirements */
-			if (attr->n_res > 0) {
+			if (ARR_LEN(attr->slots) > 0) {
 				reqs = get_arm_out_req_all(n);
 				dump_reg_req(F, n, reqs, 1);
 			}
 
 			/* dump assigned registers */
 			slots = get_arm_slots(n);
-			if (slots && attr->n_res > 0) {
-				for (i = 0; i < attr->n_res; i++) {
+			if (slots && ARR_LEN(attr->slots) > 0) {
+				for (i = 0; i < ARR_LEN(attr->slots); i++) {
 					if (slots[i]) {
 						fprintf(F, "reg #%d = %s\n", i, slots[i]->name);
 					}
@@ -347,7 +347,7 @@ const char *get_arm_out_reg_name(const ir_node *node, int pos) {
 	arm_attr_t *attr = get_arm_attr(node);
 
 	assert(is_arm_irn(node) && "Not an arm node.");
-	assert(pos < attr->n_res && "Invalid OUT position.");
+	assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
 	assert(attr->slots[pos]  && "No register assigned");
 
 	return arch_register_get_name(attr->slots[pos]);
@@ -360,7 +360,7 @@ int get_arm_out_regnr(const ir_node *node, int pos) {
 	arm_attr_t *attr = get_arm_attr(node);
 
 	assert(is_arm_irn(node) && "Not an arm node.");
-	assert(pos < attr->n_res && "Invalid OUT position.");
+	assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
 	assert(attr->slots[pos]  && "No register assigned");
 
 	return arch_register_get_index(attr->slots[pos]);
@@ -373,26 +373,18 @@ const arch_register_t *get_arm_out_reg(const ir_node *node, int pos) {
 	arm_attr_t *attr = get_arm_attr(node);
 
 	assert(is_arm_irn(node) && "Not an arm node.");
-	assert(pos < attr->n_res && "Invalid OUT position.");
+	assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
 	assert(attr->slots[pos]  && "No register assigned");
 
 	return attr->slots[pos];
 }
 
-/**
- * Sets the number of results.
- */
-void set_arm_n_res(ir_node *node, int n_res) {
-	arm_attr_t *attr = get_arm_attr(node);
-	attr->n_res      = n_res;
-}
-
 /**
  * Returns the number of results.
  */
 int get_arm_n_res(const ir_node *node) {
 	arm_attr_t *attr = get_arm_attr(node);
-	return attr->n_res;
+	return ARR_LEN(attr->slots);
 }
 /**
  * Returns the tarvalue
@@ -487,10 +479,12 @@ arm_shift_modifier get_arm_shift_modifier(const ir_node *node) {
 void init_arm_attributes(ir_node *node, int flags, const arch_register_req_t ** in_reqs,
 						 const arch_register_req_t ** out_reqs, const be_execution_unit_t ***execution_units,
 						 int n_res, unsigned latency) {
-	arm_attr_t *attr = get_arm_attr(node);
+	ir_graph       *irg  = get_irn_irg(node);
+	struct obstack *obst = get_irg_obstack(irg);
+	arm_attr_t     *attr = get_arm_attr(node);
+
 	attr->in_req           = in_reqs;
 	attr->out_req          = out_reqs;
-	attr->n_res            = n_res;
 	attr->flags            = flags;
 	attr->instr_fl         = (ARM_COND_AL << 3) | ARM_SHF_NONE;
 	attr->value            = NULL;
@@ -499,7 +493,8 @@ void init_arm_attributes(ir_node *node, int flags, const arch_register_req_t **
 	attr->n_projs          = 0;
 	attr->default_proj_num = 0;
 
-	memset((void *)attr->slots, 0, n_res * sizeof(attr->slots[0]));
+	attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res);
+	memset(attr->slots, 0, n_res * sizeof(attr->slots[0]));
 }
 
 static int arm_comp_condJmp(arm_attr_t *attr_a, arm_attr_t *attr_b) {

ir/be/arm/arm_new_nodes.h

@@ -110,11 +110,6 @@ int get_arm_out_regnr(const ir_node *node, int pos);
  */
 const arch_register_t *get_arm_out_reg(const ir_node *node, int pos);
 
-/**
- * Sets the number of results.
- */
-void set_arm_n_res(ir_node *node, int n_res);
-
 /**
  * Returns the number of results.
  */

ir/be/arm/arm_nodes_attr.h

@@ -82,7 +82,6 @@ typedef enum _arm_condition {
 
 typedef struct _arm_attr_t {
 	arch_irn_flags_t flags;             /**< indicating if spillable, rematerializeable ... etc. */
-	int              n_res;             /**< number of results for this node */
 
 	const arch_register_req_t **in_req;  /**< register requirements for arguments */
 	const arch_register_req_t **out_req; /**< register requirements for results */
@@ -95,8 +94,7 @@ typedef struct _arm_attr_t {
 	int n_projs;
 	long default_proj_num;
 
-	/* must be last, dynamically allocated */
-	const arch_register_t *slots[1];    /**< register slots for assigned registers */
+	const arch_register_t **slots;      /**< register slots for assigned registers */
 } arm_attr_t;
 
 /**

ir/be/bemodule.c

@@ -52,6 +52,7 @@ void be_init_arch_ppc32(void);
 void be_init_arch_mips(void);
 void be_init_arch_arm(void);
 void be_init_arch_sta(void);
+void be_init_arch_TEMPLATE(void);
 void be_init_ilpsched(void);
 void be_init_copyilp(void);
 void be_init_javacoal(void);
@@ -109,6 +110,7 @@ void be_init_modules(void)
 	be_init_arch_ppc32();
 	be_init_arch_mips();
 	be_init_arch_arm();
+	be_init_arch_TEMPLATE();
 
 #ifdef WITH_ILP
 	be_init_ilpsched();

ir/be/ia32/bearch_ia32.c

@@ -1764,8 +1764,6 @@ const arch_irn_handler_t *ia32_get_irn_handler(const void *self) {
 
 int ia32_to_appear_in_schedule(void *block_env, const ir_node *irn) {
 	if(!is_ia32_irn(irn)) {
-		if (is_ASM(irn))
-			return 1;
 		return -1;
 	}
 

ir/be/ia32/ia32_emitter.c

@@ -250,7 +250,7 @@ void ia32_emit_dest_register(ia32_emit_env_t *env, const ir_node *node, int pos)
 
 void ia32_emit_x87_name(ia32_emit_env_t *env, const ir_node *node, int pos)
 {
-	ia32_attr_t *attr = get_ia32_attr(node);
+	const ia32_attr_t *attr = get_ia32_attr_const(node);
 
 	assert(pos < 3);
 	be_emit_char(env, '%');
@@ -472,10 +472,10 @@ void ia32_emit_x87_binop(ia32_emit_env_t *env, const ir_node *node) {
 				// should not happen...
 				assert(0);
 			} else {
-				ia32_attr_t *attr = get_ia32_attr(node);
-				const arch_register_t *in1 = attr->x87[0];
-				const arch_register_t *in2 = attr->x87[1];
-				const arch_register_t *out = attr->x87[2];
+				const ia32_attr_t     *attr = get_ia32_attr_const(node);
+				const arch_register_t *in1  = attr->x87[0];
+				const arch_register_t *in2  = attr->x87[1];
+				const arch_register_t *out  = attr->x87[2];
 				const arch_register_t *in;
 
 				in  = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
@@ -870,9 +870,9 @@ void emit_ia32_xCondJmp(ia32_emit_env_t *env, const ir_node *node) {
  */
 static
 void emit_ia32_x87CondJmp(ia32_emit_env_t *env, const ir_node *node) {
-	ia32_attr_t *attr = get_ia32_attr(node);
-	const char *reg = attr->x87[1]->name;
-	long pnc = get_ia32_pncode(node);
+	const ia32_attr_t *attr = get_ia32_attr_const(node);
+	const char        *reg  = attr->x87[1]->name;
+	long               pnc  = get_ia32_pncode(node);
 
 	switch (get_ia32_irn_opcode(node)) {
 	case iro_ia32_fcomrJmp:
@@ -1316,7 +1316,7 @@ void emit_Jmp(ia32_emit_env_t *env, const ir_node *node) {
 static
 void emit_ia32_Immediate(ia32_emit_env_t *env, const ir_node *node)
 {
-	ia32_attr_t *attr = get_ia32_attr(node);
+	const ia32_attr_t *attr = get_ia32_attr_const(node);
 
 	if(attr->am_sc != NULL) {
 		ident *id = get_entity_ld_ident(attr->am_sc);
@@ -1339,13 +1339,13 @@ const char* emit_asm_operand(ia32_emit_env_t *env, const ir_node *node,
                              const char *s)
 {
 	const arch_register_t *reg;
-	const char  *reg_name;
-	char         c;
-	char         modifier = 0;
-	int          num      = -1;
-	ia32_attr_t *attr;
-	int          n_outs;
-	int          p;
+	const char            *reg_name;
+	char                   c;
+	char                   modifier = 0;
+	int                    num      = -1;
+	const ia32_attr_t     *attr;
+	int                    n_outs;
+	int                    p;
 
 	assert(*s == '%');
 	c = *(++s);
@@ -1394,8 +1394,8 @@ const char* emit_asm_operand(ia32_emit_env_t *env, const ir_node *node,
 	}
 
 	/* get register */
-	attr   = get_ia32_attr(node);
-	n_outs = attr->data.n_res;
+	attr   = get_ia32_attr_const(node);
+	n_outs = ARR_LEN(attr->slots);
 	if(num < n_outs) {
 		reg = get_out_reg(env, node, num);
 	} else {
@@ -1449,9 +1449,9 @@ const char* emit_asm_operand(ia32_emit_env_t *env, const ir_node *node,
 static
 void emit_ia32_Asm(ia32_emit_env_t *env, const ir_node *node)
 {
-	ia32_attr_t *attr     = get_ia32_attr(node);
-	ident       *asm_text = attr->cnst_val.asm_text;
-	const char  *s        = get_id_str(asm_text);
+	const ia32_attr_t *attr     = get_ia32_attr_const(node);
+	ident             *asm_text = attr->cnst_val.asm_text;
+	const char        *s        = get_id_str(asm_text);
 
 	be_emit_cstring(env, "# Begin ASM \t");
 	be_emit_finish_line_gas(env, node);

ir/be/ia32/ia32_new_nodes.c

@@ -418,13 +418,9 @@ static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
  *                                       |___/
  ***************************************************************************************************/
 
-/**
- * Wraps get_irn_generic_attr() as it takes no const ir_node, so we need to do a cast.
- * Firm was made by people hating const :-(
- */
-ia32_attr_t *get_ia32_attr(const ir_node *node) {
+ia32_attr_t *get_ia32_attr(ir_node *node) {
 	assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes");
-	return (ia32_attr_t *)get_irn_generic_attr((ir_node *)node);
+	return (ia32_attr_t *)get_irn_generic_attr(node);
 }
 
 const ia32_attr_t *get_ia32_attr_const(const ir_node *node) {
@@ -436,7 +432,7 @@ const ia32_attr_t *get_ia32_attr_const(const ir_node *node) {
  * Gets the type of an ia32 node.
  */
 ia32_op_type_t get_ia32_op_type(const ir_node *node) {
-	ia32_attr_t *attr = get_ia32_attr(node);
+	const ia32_attr_t *attr = get_ia32_attr_const(node);
 	return attr->data.tp;
 }
 
@@ -452,7 +448,7 @@ void set_ia32_op_type(ir_node *node, ia32_op_type_t tp) {
  * Gets the immediate op type of an ia32 node.
  */
 ia32_immop_type_t get_ia32_immop_type(const ir_node *node) {
-	ia32_attr_t *attr = get_ia32_attr(node);
+	const ia32_attr_t *attr = get_ia32_attr_const(node);
 	return attr->data.imm_tp;
 }
 
@@ -460,7 +456,7 @@ ia32_immop_type_t get_ia32_immop_type(const ir_node *node) {
  * Gets the supported address mode of an ia32 node
  */
 ia32_am_type_t get_ia32_am_support(const ir_node *node) {
-	ia32_attr_t *attr = get_ia32_attr(node);
+	const ia32_attr_t *attr = get_ia32_attr_const(node);
 	return attr->data.am_support;
 }
 
@@ -476,7 +472,7 @@ void set_ia32_am_support(ir_node *node, ia32_am_type_t am_tp) {
  * Gets the address mode flavour of an ia32 node
  */
 ia32_am_flavour_t get_ia32_am_flavour(const ir_node *node) {
-	ia32_attr_t *attr = get_ia32_attr(node);
+	const ia32_attr_t *attr = get_ia32_attr_const(node);
 	return attr->data.am_flavour;
 }
 
@@ -492,7 +488,7 @@ void set_ia32_am_flavour(ir_node *node, ia32_am_flavour_t am_flavour) {
  * Gets the address mode offset as int.
  */
 int get_ia32_am_offs_int(const ir_node *node) {
-	ia32_attr_t *attr = get_ia32_attr(node);
+	const ia32_attr_t *attr = get_ia32_attr_const(node);
 	return attr->am_offs;
 }
 
@@ -513,7 +509,7 @@ void add_ia32_am_offs_int(ir_node *node, int offset) {
  * Returns the symconst entity associated to address mode.
  */
 ir_entity *get_ia32_am_sc(const ir_node *node) {
-	ia32_attr_t *attr = get_ia32_attr(node);
+	const ia32_attr_t *attr = get_ia32_attr_const(node);
 	return attr->am_sc;
 }
 
@@ -545,7 +541,7 @@ void clear_ia32_am_sc_sign(ir_node *node) {
  * Returns the sign bit for address mode symconst.
  */
 int is_ia32_am_sc_sign(const ir_node *node) {
-	ia32_attr_t *attr = get_ia32_attr(node);
+	const ia32_attr_t *attr = get_ia32_attr_const(node);
 	return attr->data.am_sc_sign;
 }
 
@@ -553,7 +549,7 @@ int is_ia32_am_sc_sign(const ir_node *node) {
  * Gets the addr mode const.
  */
 int get_ia32_am_scale(const ir_node *node) {
-	ia32_attr_t *attr = get_ia32_attr(node);
+	const ia32_attr_t *attr = get_ia32_attr_const(node);
 	return attr->data.am_scale;
 }
 
@@ -569,7 +565,7 @@ void set_ia32_am_scale(ir_node *node, int scale) {
  * Return the tarval of an immediate operation or NULL in case of SymConst
  */
 tarval *get_ia32_Immop_tarval(const ir_node *node) {
-	ia32_attr_t *attr = get_ia32_attr(node);
+	const ia32_attr_t *attr = get_ia32_attr_const(node);
 	assert(attr->data.imm_tp == ia32_ImmConst);
     return attr->cnst_val.tv;
 }
@@ -590,7 +586,7 @@ void set_ia32_Immop_symconst(ir_node *node, ir_entity *entity) {
 }
 
 ir_entity *get_ia32_Immop_symconst(const ir_node *node) {
-	ia32_attr_t *attr = get_ia32_attr(node);
+	const ia32_attr_t *attr = get_ia32_attr_const(node);
 	assert(attr->data.imm_tp == ia32_ImmSymConst);
 	return attr->cnst_val.sc;
 }
@@ -615,7 +611,7 @@ void clear_ia32_use_frame(ir_node *node) {
  * Gets the uses_frame flag.
  */
 int is_ia32_use_frame(const ir_node *node) {
-	ia32_attr_t *attr = get_ia32_attr(node);
+	const ia32_attr_t *attr = get_ia32_attr_const(node);
 	return attr->data.use_frame;
 }
 
@@ -639,7 +635,7 @@ void clear_ia32_commutative(ir_node *node) {
  * Checks if node is commutative.
  */
 int is_ia32_commutative(const ir_node *node) {
-	ia32_attr_t *attr = get_ia32_attr(node);
+	const ia32_attr_t *attr = get_ia32_attr_const(node);
 	return attr->data.is_commutative;
 }
 
@@ -663,7 +659,7 @@ void clear_ia32_emit_cl(ir_node *node) {
  * Checks if node needs %cl.
  */
 int is_ia32_emit_cl(const ir_node *node) {
-	ia32_attr_t *attr = get_ia32_attr(node);
+	const ia32_attr_t *attr = get_ia32_attr_const(node);
 	return attr->data.emit_cl;
 }
 
@@ -687,7 +683,7 @@ void clear_ia32_got_lea(ir_node *node) {
  * Checks if node got lea.
  */
 int is_ia32_got_lea(const ir_node *node) {
-	ia32_attr_t *attr = get_ia32_attr(node);
+	const ia32_attr_t *attr = get_ia32_attr_const(node);
 	return attr->data.got_lea;
 }
 
@@ -702,7 +698,7 @@ void clear_ia32_need_stackent(ir_node *node) {
 }
 
 int is_ia32_need_stackent(const ir_node *node) {
-	ia32_attr_t *attr = get_ia32_attr(node);
+	const ia32_attr_t *attr = get_ia32_attr_const(node);
 	return attr->data.need_stackent;
 }
 
@@ -710,7 +706,7 @@ int is_ia32_need_stackent(const ir_node *node) {
  * Gets the mode of the stored/loaded value (only set for Store/Load)
  */
 ir_mode *get_ia32_ls_mode(const ir_node *node) {
-	ia32_attr_t *attr = get_ia32_attr(node);
+	const ia32_attr_t *attr = get_ia32_attr_const(node);
 	return attr->ls_mode;
 }
 
@@ -726,7 +722,7 @@ void set_ia32_ls_mode(ir_node *node, ir_mode *mode) {
  * Gets the frame entity assigned to this node.
  */
 ir_entity *get_ia32_frame_ent(const ir_node *node) {
-	ia32_attr_t *attr = get_ia32_attr(node);
+	const ia32_attr_t *attr = get_ia32_attr_const(node);
 	return attr->frame_ent;
 }
 
@@ -747,7 +743,7 @@ void set_ia32_frame_ent(ir_node *node, ir_entity *ent) {
  * Gets the instruction latency.
  */
 unsigned get_ia32_latency(const ir_node *node) {
-	ia32_attr_t *attr = get_ia32_attr(node);
+	const ia32_attr_t *attr = get_ia32_attr_const(node);
 	return attr->latency;
 }
 
@@ -763,7 +759,7 @@ void set_ia32_latency(ir_node *node, unsigned latency) {
  * Returns the argument register requirements of an ia32 node.
  */
 const arch_register_req_t **get_ia32_in_req_all(const ir_node *node) {
-	ia32_attr_t *attr = get_ia32_attr(node);
+	const ia32_attr_t *attr = get_ia32_attr_const(node);
 	return attr->in_req;
 }
 
@@ -779,7 +775,7 @@ void set_ia32_in_req_all(ir_node *node, const arch_register_req_t **reqs) {
  * Returns the result register requirements of an ia32 node.
  */
 const arch_register_req_t **get_ia32_out_req_all(const ir_node *node) {
-	ia32_attr_t *attr = get_ia32_attr(node);
+	const ia32_attr_t *attr = get_ia32_attr_const(node);
 	return attr->out_req;
 }
 
@@ -795,7 +791,7 @@ void set_ia32_out_req_all(ir_node *node, const arch_register_req_t **reqs) {
  * Returns the argument register requirement at position pos of an ia32 node.
  */
 const arch_register_req_t *get_ia32_in_req(const ir_node *node, int pos) {
-	ia32_attr_t *attr = get_ia32_attr(node);
+	const ia32_attr_t *attr = get_ia32_attr_const(node);
 	if(attr->in_req == NULL)
 		return arch_no_register_req;
 
@@ -806,7 +802,7 @@ const arch_register_req_t *get_ia32_in_req(const ir_node *node, int pos) {
  * Returns the result register requirement at position pos of an ia32 node.
  */
 const arch_register_req_t *get_ia32_out_req(const ir_node *node, int pos) {
-	ia32_attr_t *attr = get_ia32_attr(node);
+	const ia32_attr_t *attr = get_ia32_attr_const(node);
 	if(attr->out_req == NULL)
 		return arch_no_register_req;
 
@@ -833,7 +829,7 @@ void set_ia32_req_in(ir_node *node, const arch_register_req_t *req, int pos) {
  * Returns the register flag of an ia32 node.
  */
 arch_irn_flags_t get_ia32_flags(const ir_node *node) {
-	ia32_attr_t *attr = get_ia32_attr(node);
+	const ia32_attr_t *attr = get_ia32_attr_const(node);
 	return attr->data.flags;
 }
 
@@ -849,31 +845,23 @@ void set_ia32_flags(ir_node *node, arch_irn_flags_t flags) {
  * Returns the result register slots of an ia32 node.
  */
 const arch_register_t **get_ia32_slots(const ir_node *node) {
-	ia32_attr_t *attr = get_ia32_attr(node);
+	const ia32_attr_t *attr = get_ia32_attr_const(node);
 	return attr->slots;