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Zwinkau
libfirm
Commits
819e65a1
Commit
819e65a1
authored
Sep 23, 2011
by
Matthias Braun
Browse files
sparc: mark has_delay_slot as node flag
parent
218f0c5c
Changes
3
Hide whitespace changes
Inline
Side-by-side
ir/be/sparc/sparc_emitter.c
View file @
819e65a1
...
...
@@ -307,13 +307,11 @@ static bool is_no_instruction(const ir_node *node)
static
bool
has_delay_slot
(
const
ir_node
*
node
)
{
if
(
is_sparc_Ba
(
node
)
&&
ba_is_fallthrough
(
node
))
return
false
;
if
(
is_sparc_Ba
(
node
))
{
return
!
ba_is_fallthrough
(
node
);
}
return
is_sparc_Bicc
(
node
)
||
is_sparc_fbfcc
(
node
)
||
is_sparc_Ba
(
node
)
||
is_sparc_SwitchJmp
(
node
)
||
is_sparc_Call
(
node
)
||
is_sparc_SDiv
(
node
)
||
is_sparc_UDiv
(
node
)
||
is_sparc_Return
(
node
);
return
arch_get_irn_flags
(
node
)
&
sparc_arch_irn_flag_has_delay_slot
;
}
/** returns true if the emitter for this sparc node can produce more than one
...
...
ir/be/sparc/sparc_nodes_attr.h
View file @
819e65a1
...
...
@@ -47,6 +47,7 @@ enum sparc_arch_irn_flags_t {
sparc_arch_irn_flag_needs_64bit_spillslot
=
arch_irn_flags_backend
<<
2
,
sparc_arch_irn_flag_immediate_form
=
arch_irn_flags_backend
<<
3
,
sparc_arch_irn_flag_aggregate_return
=
arch_irn_flags_backend
<<
4
,
sparc_arch_irn_flag_has_delay_slot
=
arch_irn_flags_backend
<<
5
,
};
/**
...
...
ir/be/sparc/sparc_spec.pl
View file @
819e65a1
...
...
@@ -121,7 +121,6 @@ $mode_fp4 = "mode_E"; # not correct, we need to register a new mode
$default_attr_type
=
"
sparc_attr_t
";
$default_copy_attr
=
"
sparc_copy_attr
";
%init_attr
=
(
sparc_attr_t
=>
"
\t
init_sparc_attributes(res, irn_flags_, in_reqs, exec_units, n_res);
",
sparc_load_store_attr_t
=>
"
\t
init_sparc_attributes(res, irn_flags_, in_reqs, exec_units, n_res);
",
...
...
@@ -146,6 +145,7 @@ $default_copy_attr = "sparc_copy_attr";
%custom_irn_flags
=
(
modifies_flags
=>
"
(arch_irn_flags_t)sparc_arch_irn_flag_modifies_flags
",
modifies_fp_flags
=>
"
(arch_irn_flags_t)sparc_arch_irn_flag_modifies_fp_flags
",
has_delay_slot
=>
"
(arch_irn_flags_t)sparc_arch_irn_flag_has_delay_slot
",
);
my
%cmp_operand_constructors
=
(
...
...
@@ -460,6 +460,7 @@ FrameAddr => {
Bicc
=>
{
op_flags
=>
[
"
labeled
",
"
cfopcode
",
"
forking
"
],
irn_flags
=>
[
"
has_delay_slot
"
],
state
=>
"
pinned
",
mode
=>
"
mode_T
",
attr_type
=>
"
sparc_jmp_cond_attr_t
",
...
...
@@ -472,6 +473,7 @@ Bicc => {
fbfcc
=>
{
op_flags
=>
[
"
labeled
",
"
cfopcode
",
"
forking
"
],
irn_flags
=>
[
"
has_delay_slot
"
],
state
=>
"
pinned
",
mode
=>
"
mode_T
",
attr_type
=>
"
sparc_jmp_cond_attr_t
",
...
...
@@ -483,6 +485,8 @@ fbfcc => {
},
Ba
=>
{
# Note: has_delay_slot depends on wether it is a fallthrough or not, so we
# have special code for this in sparc_emitter
state
=>
"
pinned
",
op_flags
=>
[
"
cfopcode
"
],
irn_flags
=>
[
"
simple_jump
"
],
...
...
@@ -501,6 +505,7 @@ Start => {
Return
=>
{
state
=>
"
pinned
",
op_flags
=>
[
"
cfopcode
"
],
irn_flags
=>
[
"
has_delay_slot
"
],
arity
=>
"
variable
",
mode
=>
"
mode_X
",
constructors
=>
{
...
...
@@ -518,7 +523,7 @@ Return => {
},
Call
=>
{
irn_flags
=>
[
"
modifies_flags
",
"
modifies_fp_flags
"
],
irn_flags
=>
[
"
modifies_flags
",
"
modifies_fp_flags
"
,
"
has_delay_slot
"
],
state
=>
"
exc_pinned
",
arity
=>
"
variable
",
out_arity
=>
"
variable
",
...
...
@@ -548,6 +553,7 @@ Cmp => { # aka SubccZero
SwitchJmp
=>
{
op_flags
=>
[
"
labeled
",
"
cfopcode
",
"
forking
"
],
irn_flags
=>
[
"
has_delay_slot
"
],
state
=>
"
pinned
",
mode
=>
"
mode_T
",
reg_req
=>
{
in
=>
[
"
gp
"
],
out
=>
[
]
},
...
...
@@ -681,7 +687,7 @@ UMulh => {
},
SDiv
=>
{
irn_flags
=>
[
"
rematerializable
"
],
irn_flags
=>
[
"
rematerializable
"
,
"
has_delay_slot
"
],
state
=>
"
exc_pinned
",
ins
=>
[
"
dividend_high
",
"
dividend_low
",
"
divisor
"
],
outs
=>
[
"
res
",
"
M
"
],
...
...
@@ -689,7 +695,7 @@ SDiv => {
},
UDiv
=>
{
irn_flags
=>
[
"
rematerializable
"
],
irn_flags
=>
[
"
rematerializable
"
,
"
has_delay_slot
"
],
state
=>
"
exc_pinned
",
ins
=>
[
"
dividend_high
",
"
dividend_low
",
"
divisor
"
],
outs
=>
[
"
res
",
"
M
"
],
...
...
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