removed some unused variables and functions

ir/be/ia32/ia32_emitter.c

@@ -784,13 +784,6 @@ static void emit_ia32_CondJmp(const ir_node *irn, ia32_emit_env_t *env) {
 	CondJmp_emitter(irn, env);
 }
 
-/**
- * Emits code for conditional jump with immediate.
- */
-static void emit_ia32_CondJmp_i(const ir_node *irn, ia32_emit_env_t *env) {
-	CondJmp_emitter(irn, env);
-}
-
 /**
  * Emits code for conditional test and jump.
  */
@@ -1488,6 +1481,7 @@ static void ia32_emit_func_prolog(FILE *F, ir_graph *irg) {
 	entity     *irg_ent  = get_irg_entity(irg);
 	const char *irg_name = get_entity_name(irg_ent);
 
+	fprintf(F, "\t.section\t.text\n");
 	if (get_entity_visibility(irg_ent) == visibility_external_visible) {
 		fprintf(F, ".globl %s\n", irg_name);
 	}

ir/be/ia32/ia32_gen_decls.c

@@ -113,41 +113,6 @@ static void dump_arith_tarval(struct obstack *obst, tarval *tv, int bytes)
   }
 }
 
-/*
- * dump an arithmetic tarval
- */
-static void ia32_dump_arith_tarval(struct obstack *obst, tarval *tv, int bytes)
-{
-  switch (bytes) {
-
-  case 1:
-    obstack_printf(obst, "\t.byte\t");
-    break;
-
-  case 2:
-    obstack_printf(obst, "\t.value\t");
-    break;
-
-  case 4:
-    obstack_printf(obst, "\t.long\t");
-    break;
-
-  case 8:
-    obstack_printf(obst, "\t.quad\t");
-    break;
-
-  case 10:
-  case 12:
-    break;
-
-  default:
-    fprintf(stderr, "Try to dump an tarval with %d bytes\n", bytes);
-    assert(0);
-  }
-  dump_arith_tarval(obst, tv, bytes);
-}
-
-
 /*
  * dump an atomic value
  */

ir/be/ia32/ia32_new_nodes.c

@@ -1161,7 +1161,7 @@ void alloc_ia32_reg_slots(ir_node *node, int num) {
 	ia32_attr_t *attr = get_ia32_attr(node);
 
 	if (num) {
-		attr->slots = NEW_ARR_D(arch_register_t*, get_irg_obstack(get_irn_irg(node)), num);
+		attr->slots = (const arch_register_t **)NEW_ARR_D(arch_register_t*, get_irg_obstack(get_irn_irg(node)), num);
 		memset(attr->slots, 0, sizeof(attr->slots[0]) * num);
 	}
 	else {
@@ -1212,7 +1212,7 @@ static void ia32_copy_attr(const ir_node *old_node, ir_node *new_node) {
 	memcpy(attr_new, attr_old, sizeof(*attr_new));
 
 	/* copy the register slots */
-	attr_new->slots = NEW_ARR_D(arch_register_t*, get_irg_obstack(get_irn_irg(new_node)), n_res);
+	attr_new->slots = (const arch_register_t **)NEW_ARR_D(arch_register_t*, get_irg_obstack(get_irn_irg(new_node)), n_res);
 	memcpy((void *)attr_new->slots, (void *)attr_old->slots, sizeof(attr_new->slots[0]) * n_res);
 }
 

ir/be/ia32/ia32_optimize.c

@@ -609,7 +609,6 @@ static ir_node *fold_addr(ia32_code_gen_t *cg, ir_node *irn, firm_dbg_module_t *
 	int         dolea      = 0;
 	int         have_am_sc = 0;
 	int         am_sc_sign = 0;
-	ident      *am_sc_lea  = NULL;
 	ident      *am_sc      = NULL;
 	ir_node    *left, *right, *temp;
 	ir_node    *base, *index;

ir/be/ia32/ia32_transform.c

@@ -1241,32 +1241,39 @@ static ir_node *gen_Load(ia32_transform_env_t *env) {
 	ir_node    *node  = env->irn;
 	ir_node    *noreg = ia32_new_NoReg_gp(env->cg);
 	ir_node    *ptr   = get_Load_ptr(node);
+	ir_node    *lptr  = ptr;
 	ir_mode    *mode  = get_Load_mode(node);
-	const char *offs  = NULL;
+	int        is_imm = 0;
 	ir_node *new_op;
 	ia32_am_flavour_t am_flav = ia32_B;
 
 	/* address might be a constant (symconst or absolute address) */
 	if (is_ia32_Const(ptr)) {
-		offs = get_ia32_cnst(ptr);
-		ptr  = noreg;
+		lptr   = noreg;
+		is_imm = 1;
 	}
 
 	if (mode_is_float(mode)) {
 		if (USE_SSE2(env->cg))
-			new_op = new_rd_ia32_fLoad(env->dbg, env->irg, env->block, ptr, noreg, get_Load_mem(node), env->mode);
+			new_op = new_rd_ia32_fLoad(env->dbg, env->irg, env->block, lptr, noreg, get_Load_mem(node), env->mode);
 		else {
 			env->cg->used_x87 = 1;
-			new_op = new_rd_ia32_vfld(env->dbg, env->irg, env->block, ptr, noreg, get_Load_mem(node), env->mode);
+			new_op = new_rd_ia32_vfld(env->dbg, env->irg, env->block, lptr, noreg, get_Load_mem(node), env->mode);
 		}
 	}
 	else {
-		new_op = new_rd_ia32_Load(env->dbg, env->irg, env->block, ptr, noreg, get_Load_mem(node), env->mode);
+		new_op = new_rd_ia32_Load(env->dbg, env->irg, env->block, lptr, noreg, get_Load_mem(node), env->mode);
 	}
 
 	/* base is an constant address */
-	if (offs) {
-		add_ia32_am_offs(new_op, offs);
+	if (is_imm) {
+		if (get_ia32_immop_type(ptr) == ia32_ImmSymConst) {
+			set_ia32_am_sc(new_op, get_ia32_id_cnst(ptr));
+		}
+		else {
+			add_ia32_am_offs(new_op, get_ia32_cnst(ptr));
+		}
+
 		am_flav = ia32_O;
 	}
 
@@ -1296,13 +1303,14 @@ static ir_node *gen_Store(ia32_transform_env_t *env) {
 	ir_node *noreg   = ia32_new_NoReg_gp(env->cg);
 	ir_node *val     = get_Store_value(node);
 	ir_node *ptr     = get_Store_ptr(node);
+	ir_node *sptr    = ptr;
 	ir_node *mem     = get_Store_mem(node);
 	ir_mode *mode    = get_irn_mode(val);
 	ir_node *sval    = val;
-	const char *offs = NULL;
+	int      is_imm  = 0;
 	ir_node *new_op;
 	ia32_am_flavour_t am_flav = ia32_B;
-  ia32_immop_type_t immop   = ia32_ImmNone;
+	ia32_immop_type_t immop   = ia32_ImmNone;
 
 	if (! mode_is_float(mode)) {
 		/* in case of storing a const (but not a symconst) -> make it an attribute */
@@ -1323,20 +1331,20 @@ static ir_node *gen_Store(ia32_transform_env_t *env) {
 
 	/* address might be a constant (symconst or absolute address) */
 	if (is_ia32_Const(ptr)) {
-		offs = get_ia32_cnst(ptr);
-		ptr  = noreg;
+		sptr   = noreg;
+		is_imm = 0;
 	}
 
 	if (mode_is_float(mode)) {
 		if (USE_SSE2(env->cg))
-			new_op = new_rd_ia32_fStore(env->dbg, env->irg, env->block, ptr, noreg, sval, mem, mode_T);
+			new_op = new_rd_ia32_fStore(env->dbg, env->irg, env->block, sptr, noreg, sval, mem, mode_T);
 		else {
 			env->cg->used_x87 = 1;
-			new_op = new_rd_ia32_vfst(env->dbg, env->irg, env->block, ptr, noreg, sval, mem, mode_T);
+			new_op = new_rd_ia32_vfst(env->dbg, env->irg, env->block, sptr, noreg, sval, mem, mode_T);
 		}
 	}
 	else if (get_mode_size_bits(mode) == 8) {
-		new_op = new_rd_ia32_Store8Bit(env->dbg, env->irg, env->block, ptr, noreg, sval, mem, mode_T);
+		new_op = new_rd_ia32_Store8Bit(env->dbg, env->irg, env->block, sptr, noreg, sval, mem, mode_T);
 	}
 	else {
 		new_op = new_rd_ia32_Store(env->dbg, env->irg, env->block, ptr, noreg, sval, mem, mode_T);
@@ -1348,8 +1356,14 @@ static ir_node *gen_Store(ia32_transform_env_t *env) {
 	}
 
 	/* base is an constant address */
-	if (offs) {
-		add_ia32_am_offs(new_op, offs);
+	if (is_imm) {
+		if (get_ia32_immop_type(ptr) == ia32_ImmSymConst) {
+			set_ia32_am_sc(new_op, get_ia32_id_cnst(ptr));
+		}
+		else {
+			add_ia32_am_offs(new_op, get_ia32_cnst(ptr));
+		}
+
 		am_flav = ia32_O;
 	}
 

ir/be/ia32/ia32_x87.c

@@ -6,6 +6,11 @@
  *
  * $Id$
  */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif /* HAVE_CONFIG_H */
+
 #include <assert.h>
 
 #include "irnode_t.h"
@@ -20,14 +25,20 @@
 #include "irprintf.h"
 #include "debug.h"
 
-#include "..\belive_t.h"
-#include "..\besched.h"
-#include "..\benode_t.h"
+#include "../belive_t.h"
+#include "../besched.h"
+#include "../benode_t.h"
 #include "ia32_new_nodes.h"
 #include "gen_ia32_new_nodes.h"
 #include "gen_ia32_regalloc_if.h"
 #include "ia32_x87.h"
 
+#ifndef NDEBUG
+#define DEBUG_ONLY(x) x
+#else  /* NDEBUG */
+#define DEBUG_ONLY(x)
+#endif /* NDEBUG */
+
 #define N_x87_REGS 8
 
 /* first and second binop index */
@@ -629,7 +640,7 @@ static unsigned is_vfp_live(const arch_register_t *reg, unsigned live) {
 /**
  * dump liveness info.
  */
-static vfp_dump_live(unsigned live) {
+static void vfp_dump_live(unsigned live) {
 	int i;
 
 	DB((dbg, LEVEL_2, "Live registers here: \n"));