Commit 858a9f4c authored by Christoph Mallon's avatar Christoph Mallon
Browse files

Add arch_get_irn_reg_class_out().

[r22912]
parent 7621bbf1
......@@ -864,7 +864,7 @@ static ir_node *gen_Load(ir_node *node) {
if (be_get_Proj_for_pn(node, pn_Load_res) == NULL) {
/* add a result proj and a Keep to produce a pseudo use */
ir_node *proj = new_r_Proj(irg, block, new_load, mode_Iu, pn_arm_Load_res);
be_new_Keep(arch_get_irn_reg_class(proj, -1), irg, block, 1, &proj);
be_new_Keep(arch_get_irn_reg_class_out(proj), irg, block, 1, &proj);
}
return new_load;
......
......@@ -171,6 +171,8 @@ int arch_reg_is_allocatable(const ir_node *irn, int pos, const arch_register_t *
*/
const arch_register_class_t *arch_get_irn_reg_class(const ir_node *irn, int pos);
#define arch_get_irn_reg_class_out(irn) arch_get_irn_reg_class(irn, -1)
/**
* Get the register allocated at a certain output operand of a node.
* @param irn The node.
......@@ -203,11 +205,8 @@ arch_irn_flags_t arch_irn_get_flags(const ir_node *irn);
#define arch_irn_is(irn, flag) ((arch_irn_get_flags(irn) & arch_irn_flags_ ## flag) != 0)
#define arch_irn_has_reg_class(irn, pos, cls) \
((cls) == arch_get_irn_reg_class(irn, pos))
#define arch_irn_consider_in_reg_alloc(cls, irn) \
(arch_irn_has_reg_class(irn, -1, cls) && !arch_irn_is(irn, ignore))
(arch_get_irn_reg_class_out(irn) == (cls) && !arch_irn_is(irn, ignore))
/**
* Get the operations of an irn.
......
......@@ -411,7 +411,7 @@ static void co_collect_units(ir_node *irn, void *env)
int o, arg_pos;
ir_node *arg = get_irn_n(irn, i);
assert(arch_get_irn_reg_class(arg, -1) == co->cls && "Argument not in same register class.");
assert(arch_get_irn_reg_class_out(arg) == co->cls && "Argument not in same register class.");
if (arg == irn)
continue;
if (nodes_interfere(co->cenv, irn, arg)) {
......
......@@ -304,18 +304,18 @@ static void copystat_collect_cls(be_chordal_env_t *cenv) {
all_phi_classes = get_all_phi_classes(pc_obj);
foreach_ir_nodeset(all_phi_nodes, n, iter) {
if (arch_get_irn_reg_class(n, -1) == cenv->cls)
if (arch_get_irn_reg_class_out(n) == cenv->cls)
stat_phi_node(cenv, n);
}
foreach_ir_nodeset(all_copy_nodes, n, iter) {
if (arch_get_irn_reg_class(n, -1) == cenv->cls)
if (arch_get_irn_reg_class_out(n) == cenv->cls)
stat_copy_node(cenv, n);
}
foreach_pset(all_phi_classes, pc) {
ir_node *member = pc[0];
if (arch_get_irn_reg_class(member, -1) == cenv->cls)
if (arch_get_irn_reg_class_out(member) == cenv->cls)
stat_phi_class(cenv, pc);
}
......@@ -449,7 +449,7 @@ typedef struct color_saver {
static void save_load(ir_node *irn, void *env) {
color_save_t *saver = env;
if (saver->chordal_env->cls == arch_get_irn_reg_class(irn, -1)) {
if (saver->chordal_env->cls == arch_get_irn_reg_class_out(irn)) {
if (saver->flag == 0) { /* save */
const arch_register_t *reg = arch_get_irn_register(irn);
pmap_insert(saver->saved_colors, irn, (void *) reg);
......
......@@ -513,7 +513,7 @@ static void gen_assure_different_pattern(ir_node *irn, ir_node *other_different,
irg = be_get_birg_irg(env->birg);
op_set = &env->op_set;
block = get_nodes_block(irn);
cls = arch_get_irn_reg_class(other_different, -1);
cls = arch_get_irn_reg_class_out(other_different);
/* Make a not spillable copy of the different node */
/* this is needed because the different irn could be */
......@@ -818,11 +818,11 @@ void assure_constraints(be_irg_t *birg) {
/* so we transform unnecessary ones into Keeps. */
foreach_ir_nodeset(&entry->copies, cp, iter) {
if (be_is_CopyKeep(cp) && get_irn_n_edges(cp) < 1) {
ir_node *keep;
int n = get_irn_arity(cp);
const arch_register_class_t *cls = arch_get_irn_reg_class_out(cp);
int n = get_irn_arity(cp);
ir_node *keep;
keep = be_new_Keep(arch_get_irn_reg_class(cp, -1),
irg, get_nodes_block(cp), n, get_irn_in(cp) + 1);
keep = be_new_Keep(cls, irg, get_nodes_block(cp), n, get_irn_in(cp) + 1);
sched_add_before(cp, keep);
/* Set all ins (including the block) of the CopyKeep BAD to keep the verifier happy. */
......@@ -865,19 +865,16 @@ static int push_through_perm(ir_node *perm, lower_env_t *env)
int n_moved;
int new_size;
ir_node *frontier = bl;
ir_node *irn;
int i, n;
const ir_edge_t *edge;
ir_node *one_proj = NULL, *irn;
const arch_register_class_t *cls = NULL;
DBG((dbg_permmove, LEVEL_1, "perm move %+F irg %+F\n", perm, irg));
/* get some Proj and find out the register class of that Proj. */
edge = get_irn_out_edge_first_kind(perm, EDGE_KIND_NORMAL);
one_proj = get_edge_src_irn(edge);
const ir_edge_t *edge = get_irn_out_edge_first_kind(perm, EDGE_KIND_NORMAL);
ir_node *one_proj = get_edge_src_irn(edge);
const arch_register_class_t *cls = arch_get_irn_reg_class_out(one_proj);
assert(is_Proj(one_proj));
cls = arch_get_irn_reg_class(one_proj, -1);
DBG((dbg_permmove, LEVEL_1, "perm move %+F irg %+F\n", perm, irg));
/* Find the point in the schedule after which the
* potentially movable nodes must be defined.
......
......@@ -466,13 +466,13 @@ void be_Perm_reduce(ir_node *perm, int new_size, int *map)
ir_node *be_new_MemPerm(const arch_env_t *arch_env, ir_graph *irg, ir_node *bl, int n, ir_node *in[])
{
int i;
ir_node *frame = get_irg_frame(irg);
const arch_register_class_t *cls_frame = arch_get_irn_reg_class(frame, -1);
ir_node *irn;
const arch_register_t *sp = arch_env->sp;
be_memperm_attr_t *attr;
ir_node **real_in;
ir_node *frame = get_irg_frame(irg);
const arch_register_class_t *cls_frame = arch_get_irn_reg_class_out(frame);
const arch_register_t *sp = arch_env->sp;
ir_node *irn;
be_memperm_attr_t *attr;
ir_node **real_in;
int i;
real_in = alloca((n+1) * sizeof(real_in[0]));
real_in[0] = frame;
......@@ -1033,8 +1033,8 @@ ir_node *be_spill(ir_node *block, ir_node *irn)
{
ir_graph *irg = get_irn_irg(block);
ir_node *frame = get_irg_frame(irg);
const arch_register_class_t *cls = arch_get_irn_reg_class(irn, -1);
const arch_register_class_t *cls_frame = arch_get_irn_reg_class(frame, -1);
const arch_register_class_t *cls = arch_get_irn_reg_class_out(irn);
const arch_register_class_t *cls_frame = arch_get_irn_reg_class_out(frame);
ir_node *spill;
spill = be_new_Spill(cls, cls_frame, irg, block, frame, irn);
......@@ -1047,7 +1047,7 @@ ir_node *be_reload(const arch_register_class_t *cls, ir_node *insert, ir_mode *m
ir_node *bl = is_Block(insert) ? insert : get_nodes_block(insert);
ir_graph *irg = get_irn_irg(bl);
ir_node *frame = get_irg_frame(irg);
const arch_register_class_t *cls_frame = arch_get_irn_reg_class(frame, -1);
const arch_register_class_t *cls_frame = arch_get_irn_reg_class_out(frame);
assert(be_is_Spill(spill) || (is_Phi(spill) && get_irn_mode(spill) == mode_M));
......
......@@ -646,7 +646,7 @@ static void collect_descendants(rss_t *rss, rss_irn_t *rirn, ir_node *irn, int *
}
if (is_Proj(user)) {
//if (arch_get_irn_reg_class(user, -1) == rss->cls)
//if (arch_get_irn_reg_class_out(user) == rss->cls)
collect_descendants(rss, rirn, user, got_sink, cur_desc_walk);
}
else {
......@@ -715,7 +715,7 @@ static void collect_consumer(rss_t *rss, rss_irn_t *rss_irn, ir_node *irn, int *
ir_node *consumer = get_edge_src_irn(edge);
if (is_Proj(consumer)) {
//if (arch_get_irn_reg_class(consumer, -1) == rss->cls)
//if (arch_get_irn_reg_class_out(consumer) == rss->cls)
collect_consumer(rss, rss_irn, consumer, got_sink);
}
else
......@@ -2111,7 +2111,7 @@ static void process_block(ir_node *block, void *env) {
continue;
if (!arch_irn_is(irn, ignore) &&
arch_get_irn_reg_class(irn, -1) == cls) {
arch_get_irn_reg_class_out(irn) == cls) {
plist_insert_back(rss->nodes, skip_Proj(irn));
}
//}
......
......@@ -3423,8 +3423,8 @@ static ir_node *be_spill2(ir_node *irn, ir_node *insert)
ir_node *frame = get_irg_frame(irg);
ir_node *spill;
ir_node *next;
const arch_register_class_t *cls = arch_get_irn_reg_class(irn, -1);
const arch_register_class_t *cls_frame = arch_get_irn_reg_class(frame, -1);
const arch_register_class_t *cls = arch_get_irn_reg_class_out(irn);
const arch_register_class_t *cls_frame = arch_get_irn_reg_class_out(frame);
spill = be_new_Spill(cls, cls_frame, irg, bl, frame, irn);
......
......@@ -824,7 +824,7 @@ static void collect_spills_walker(ir_node *node, void *data)
return;
mode = get_irn_mode(node);
cls = arch_get_irn_reg_class(node, -1);
cls = arch_get_irn_reg_class_out(node);
align = arch_env_get_reg_class_alignment(env->arch_env, cls);
be_node_needs_frame_entity(env, node, mode, align);
......
......@@ -160,7 +160,7 @@ static void values_to_vars(ir_node *irn, void *env) {
int nr, i, build_vals = 0;
ir_node **vals;
if (arch_get_irn_reg_class(irn, -1) == NULL)
if (arch_get_irn_reg_class_out(irn) == NULL)
return;
vals = get_phi_class(pc, irn);
......@@ -297,7 +297,7 @@ static void ssa_destr_simple_walker(ir_node *blk, void *env) {
if (arch_irn_is(phi, ignore))
continue;
cls = arch_get_irn_reg_class(phi, -1);
cls = arch_get_irn_reg_class_out(phi);
insert_copies(sde, cls, phi, pos, phi);
}
}
......
......@@ -697,7 +697,7 @@ static void check_register_constraints(ir_node *node)
int i, arity;
/* verify output register */
if (arch_get_irn_reg_class(node, -1) != NULL) {
if (arch_get_irn_reg_class_out(node) != NULL) {
reg = arch_get_irn_register(node);
if (reg == NULL) {
ir_fprintf(stderr, "Verify warning: Node %+F in block %+F(%s) should have a register assigned\n",
......@@ -766,7 +766,7 @@ static void value_used(ir_node *node) {
const arch_register_t *reg;
ir_node *reg_node;
if (arch_get_irn_reg_class(node, -1) != regclass)
if (arch_get_irn_reg_class_out(node) != regclass)
return;
reg = arch_get_irn_register(node);
......@@ -789,7 +789,7 @@ static void value_def(ir_node *node)
const arch_register_t *reg;
ir_node *reg_node;
if (arch_get_irn_reg_class(node, -1) != regclass)
if (arch_get_irn_reg_class_out(node) != regclass)
return;
reg = arch_get_irn_register(node);
......
......@@ -4370,7 +4370,7 @@ static ir_node *gen_Proj_be_Call(ir_node *node)
/* transform call modes */
if (mode_is_data(mode)) {
const arch_register_class_t *cls = arch_get_irn_reg_class(node, -1);
const arch_register_class_t *cls = arch_get_irn_reg_class_out(node);
mode = cls->mode;
}
......
......@@ -1715,15 +1715,12 @@ static int sim_Keep(x87_state *state, ir_node *node)
static void keep_float_node_alive(ir_node *node)
{
ir_graph *irg;
ir_node *block;
ir_graph *irg = get_irn_irg(node);
ir_node *block = get_nodes_block(node);
const arch_register_class_t *cls = arch_get_irn_reg_class_out(node);
ir_node *in[1];
ir_node *keep;
const arch_register_class_t *cls;
irg = get_irn_irg(node);
block = get_nodes_block(node);
cls = arch_get_irn_reg_class(node, -1);
in[0] = node;
keep = be_new_Keep(cls, irg, block, 1, in);
......@@ -1826,7 +1823,7 @@ static int sim_Copy(x87_state *state, ir_node *n)
int op1_idx, out_idx;
unsigned live;
cls = arch_get_irn_reg_class(n, -1);
cls = arch_get_irn_reg_class_out(n);
if (cls->regs != ia32_vfp_regs)
return 0;
......
......@@ -521,7 +521,7 @@ static void ppc32_transform_spill(ir_node *node, void *env)
ir_node *block = get_nodes_block(node);
ir_mode *mode = get_irn_mode(node);
const arch_register_class_t *regclass = arch_get_irn_reg_class(node, -1);
const arch_register_class_t *regclass = arch_get_irn_reg_class_out(node);
if (regclass == &ppc32_reg_classes[CLASS_ppc32_gp])
{
......
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