Commit 8f667f86 authored by Michael Beck's avatar Michael Beck
Browse files

- removed C99 stdbool.h from the "official" interface in be.h

[r20999]
parent 4038a683
......@@ -31,7 +31,6 @@ extern "C" {
#endif
#include <stdio.h>
#include <stdbool.h>
#include "irarch.h"
#include "archop.h"
#include "lowering.h"
......@@ -107,14 +106,14 @@ void be_main(FILE *output, const char *compilation_unit_name);
/**
* parse assembler constraint strings and returns flags (so the frontend knows
* which operands are inputs/outputs and wether memory is required)
* which operands are inputs/outputs and whether memory is required)
*/
asm_constraint_flags_t be_parse_asm_constraints(const char *constraints);
/**
* tests wether a string is a valid clobber in an asm instruction
* tests whether a string is a valid clobber in an ASM instruction
*/
bool be_is_valid_clobber(const char *clobber);
int be_is_valid_clobber(const char *clobber);
typedef struct be_main_env_t be_main_env_t;
typedef struct be_options_t be_options_t;
......
......@@ -1212,11 +1212,11 @@ static asm_constraint_flags_t arm_parse_asm_constraint(const void *self, const c
return ASM_CONSTRAINT_FLAG_INVALID;
}
static bool arm_is_valid_clobber(const void *self, const char *clobber)
static int arm_is_valid_clobber(const void *self, const char *clobber)
{
(void) self;
(void) clobber;
return false;
return 0;
}
/**
......
......@@ -534,7 +534,7 @@ struct arch_isa_if_t {
* returns true if the string is a valid clobbered (register) in this
* backend
*/
bool (*is_valid_clobber)(const void *self, const char *clobber);
int (*is_valid_clobber)(const void *self, const char *clobber);
};
#define arch_env_done(env) ((env)->impl->done(env))
......
......@@ -289,15 +289,15 @@ asm_constraint_flags_t be_parse_asm_constraints(const char *constraint)
return flags;
}
bool be_is_valid_clobber(const char *clobber)
int be_is_valid_clobber(const char *clobber)
{
/* memory is a valid clobber. (the frontend has to detect this case too,
* because it has to add memory edges to the asm) */
if (strcmp(clobber, "memory") == 0)
return true;
return 1;
/* cc (condition code) is always valid */
if (strcmp(clobber, "cc") == 0)
return true;
return 1;
return isa_if->is_valid_clobber(isa_if, clobber);
}
......
......@@ -2223,7 +2223,7 @@ static asm_constraint_flags_t ia32_parse_asm_constraint(const void *self, const
return ASM_CONSTRAINT_FLAG_INVALID;
}
static bool ia32_is_valid_clobber(const void *self, const char *clobber)
static int ia32_is_valid_clobber(const void *self, const char *clobber)
{
(void) self;
......
......@@ -81,33 +81,33 @@ static ir_node *get_prev_block_sched(const ir_node *block)
return get_irn_link(block);
}
static bool is_fallthrough(const ir_node *cfgpred)
static int is_fallthrough(const ir_node *cfgpred)
{
ir_node *pred;
if(!is_Proj(cfgpred))
return true;
return 1;
pred = get_Proj_pred(cfgpred);
if(is_ia32_SwitchJmp(pred))
return false;
return 0;
return true;
return 1;
}
static bool block_needs_label(const ir_node *block)
static int block_needs_label(const ir_node *block)
{
bool need_label = true;
int need_label = 1;
int n_cfgpreds = get_Block_n_cfgpreds(block);
if (n_cfgpreds == 0) {
need_label = false;
need_label = 0;
} else if (n_cfgpreds == 1) {
ir_node *cfgpred = get_Block_cfgpred(block, 0);
ir_node *cfgpred_block = get_nodes_block(cfgpred);
if (get_prev_block_sched(block) == cfgpred_block
&& is_fallthrough(cfgpred)) {
need_label = false;
need_label = 0;
}
}
......@@ -825,7 +825,7 @@ static ir_node *get_proj(const ir_node *node, long proj) {
return NULL;
}
static bool can_be_fallthrough(const ir_node *node)
static int can_be_fallthrough(const ir_node *node)
{
ir_node *target_block = get_cfop_target_block(node);
ir_node *block = get_nodes_block(node);
......@@ -2038,7 +2038,7 @@ static int should_align_block(const ir_node *block)
static void ia32_emit_block_header(ir_node *block)
{
ir_graph *irg = current_ir_graph;
bool need_label = block_needs_label(block);
int need_label = block_needs_label(block);
int i, arity;
ir_exec_freq *exec_freq = cg->birg->exec_freq;
......@@ -2055,13 +2055,13 @@ static void ia32_emit_block_header(ir_node *block)
} else {
/* if the predecessor block has no fall-through,
we can always align the label. */
int i;
bool has_fallthrough = false;
int i;
int has_fallthrough = 0;
for (i = get_Block_n_cfgpreds(block) - 1; i >= 0; --i) {
ir_node *cfg_pred = get_Block_cfgpred(block, i);
if (can_be_fallthrough(cfg_pred)) {
has_fallthrough = true;
has_fallthrough = 1;
break;
}
}
......
......@@ -3522,12 +3522,12 @@ static ir_node *gen_Conv(ir_node *node) {
return res;
}
static bool check_immediate_constraint(long val, char immediate_constraint_type)
static int check_immediate_constraint(long val, char immediate_constraint_type)
{
switch (immediate_constraint_type) {
case 0:
case 'i':
return true;
return 1;
case 'I':
return val >= 0 && val <= 32;
case 'J':
......@@ -3546,7 +3546,7 @@ static bool check_immediate_constraint(long val, char immediate_constraint_type)
break;
}
panic("Invalid immediate constraint found");
return false;
return 0;
}
static ir_node *try_create_Immediate(ir_node *node,
......@@ -3665,14 +3665,14 @@ static ir_node *create_immediate_or_transform(ir_node *node,
void parse_asm_constraints(constraint_t *constraint, const char *c,
bool is_output)
int is_output)
{
asm_constraint_flags_t flags = 0;
char immediate_type = '\0';
unsigned limited = 0;
const arch_register_class_t *cls = NULL;
bool memory_possible = false;
bool all_registers_allowed = false;
int memory_possible = 0;
int all_registers_allowed = 0;
int p;
int same_as = -1;
......@@ -3771,7 +3771,7 @@ void parse_asm_constraints(constraint_t *constraint, const char *c,
if (cls != NULL && cls != &ia32_reg_classes[CLASS_ia32_gp])
panic("multiple register classes not supported");
cls = &ia32_reg_classes[CLASS_ia32_gp];
all_registers_allowed = true;
all_registers_allowed = 1;
break;
case 'f':
......@@ -3781,7 +3781,7 @@ void parse_asm_constraints(constraint_t *constraint, const char *c,
if (cls != NULL && cls != &ia32_reg_classes[CLASS_ia32_vfp])
panic("multiple register classes not supported");
cls = &ia32_reg_classes[CLASS_ia32_vfp];
all_registers_allowed = true;
all_registers_allowed = 1;
break;
case 'Y':
......@@ -3789,7 +3789,7 @@ void parse_asm_constraints(constraint_t *constraint, const char *c,
if (cls != NULL && cls != &ia32_reg_classes[CLASS_ia32_xmm])
panic("multiple register classes not supproted");
cls = &ia32_reg_classes[CLASS_ia32_xmm];
all_registers_allowed = true;
all_registers_allowed = 1;
break;
case 'I':
......@@ -3824,8 +3824,8 @@ void parse_asm_constraints(constraint_t *constraint, const char *c,
panic("multiple immediate types not supported");
immediate_type = 'i';
cls = &ia32_reg_classes[CLASS_ia32_gp];
all_registers_allowed = true;
memory_possible = true;
all_registers_allowed = 1;
memory_possible = 1;
break;
case '0':
......@@ -3854,7 +3854,7 @@ void parse_asm_constraints(constraint_t *constraint, const char *c,
/* memory constraint no need to do anything in backend about it
* (the dependencies are already respected by the memory edge of
* the node) */
memory_possible = true;
memory_possible = 1;
break;
case 'E': /* no float consts yet */
......@@ -4028,13 +4028,13 @@ static ir_node *gen_ASM(ir_node *node)
const ir_asm_constraint *in_constraints;
const ir_asm_constraint *out_constraints;
ident **clobbers;
bool clobbers_flags = false;
int clobbers_flags = 0;
/* workaround for lots of buggy code out there as most people think volatile
* asm is enough for everything and forget the flags (linux kernel, etc.)
*/
if (get_irn_pinned(node) == op_pin_state_pinned) {
clobbers_flags = true;
clobbers_flags = 1;
}
arity = get_irn_arity(node);
......@@ -4048,7 +4048,7 @@ static ir_node *gen_ASM(ir_node *node)
if (strcmp(c, "memory") == 0)
continue;
if (strcmp(c, "cc") == 0) {
clobbers_flags = true;
clobbers_flags = 1;
continue;
}
n_clobbers++;
......@@ -4086,14 +4086,14 @@ static ir_node *gen_ASM(ir_node *node)
constraint_t parsed_constraint;
const arch_register_req_t *req;
parse_asm_constraints(&parsed_constraint, c, true);
parse_asm_constraints(&parsed_constraint, c, 1);
req = make_register_req(&parsed_constraint, n_out_constraints,
out_reg_reqs, out_idx);
out_reg_reqs[out_idx] = req;
register_map[pos].use_input = false;
register_map[pos].valid = true;
register_map[pos].memory = false;
register_map[pos].use_input = 0;
register_map[pos].valid = 1;
register_map[pos].memory = 0;
register_map[pos].inout_pos = out_idx;
register_map[pos].mode = constraint->mode;
}
......@@ -4106,12 +4106,12 @@ static ir_node *gen_ASM(ir_node *node)
ident *constr_id = constraint->constraint;
const char *c = get_id_str(constr_id);
unsigned pos = constraint->pos;
bool is_memory_op = false;
int is_memory_op = 0;
ir_node *input = NULL;
constraint_t parsed_constraint;
const arch_register_req_t *req;
parse_asm_constraints(&parsed_constraint, c, false);
parse_asm_constraints(&parsed_constraint, c, 0);
req = make_register_req(&parsed_constraint, n_out_constraints,
out_reg_reqs, i);
in_reg_reqs[i] = req;
......@@ -4127,15 +4127,15 @@ static ir_node *gen_ASM(ir_node *node)
if (parsed_constraint.cls == NULL
&& parsed_constraint.same_as < 0) {
is_memory_op = true;
is_memory_op = 1;
} else if(parsed_constraint.memory_possible) {
/* TODO: match Load or Load/Store if memory possible is set */
}
}
in[i] = input;
register_map[pos].use_input = true;
register_map[pos].valid = true;
register_map[pos].use_input = 1;
register_map[pos].valid = 1;
register_map[pos].memory = is_memory_op;
register_map[pos].inout_pos = i;
register_map[pos].mode = constraint->mode;
......
......@@ -69,8 +69,8 @@ typedef struct constraint_t constraint_t;
struct constraint_t {
const arch_register_class_t *cls;
unsigned allowed_registers;
bool all_registers_allowed;
bool memory_possible;
char all_registers_allowed;
char memory_possible;
char immediate_type;
int same_as;
};
......
......@@ -934,12 +934,12 @@ static asm_constraint_flags_t ppc32_parse_asm_constraint(const void *self, const
return ASM_CONSTRAINT_FLAG_INVALID;
}
static bool ppc32_is_valid_clobber(const void *self, const char *clobber)
static int ppc32_is_valid_clobber(const void *self, const char *clobber)
{
/* no asm support yet */
(void) self;
(void) clobber;
return false;
return 0;
}
const arch_isa_if_t ppc32_isa_if = {
......
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