Commit 9539cba0 authored by Matthias Braun's avatar Matthias Braun
Browse files

- first experimental approach of flag modeling in add/adc

- support SourceAM for convs
- allow Source/DestAM for 8/16bit modes where this is profitable

[r15770]
parent c865e5f8
...@@ -66,6 +66,7 @@ ...@@ -66,6 +66,7 @@
#include "../bemodule.h" #include "../bemodule.h"
#include "../begnuas.h" #include "../begnuas.h"
#include "../bestate.h" #include "../bestate.h"
#include "../beflags.h"
#include "bearch_ia32_t.h" #include "bearch_ia32_t.h"
...@@ -940,16 +941,102 @@ static void ia32_before_sched(void *self) { ...@@ -940,16 +941,102 @@ static void ia32_before_sched(void *self) {
(void) self; (void) self;
} }
static void turn_back_am(ir_node *node)
{
ir_graph *irg = current_ir_graph;
dbg_info *dbgi = get_irn_dbg_info(node);
ir_node *block = get_nodes_block(node);
ir_node *base = get_irn_n(node, 0);
ir_node *index = get_irn_n(node, 1);
ir_node *mem;
ir_node *load;
ir_node *load_res;
ir_node *mem_proj;
const ir_edge_t *edge;
ir_fprintf(stderr, "truning back AM in %+F\n", node);
if(get_ia32_am_arity(node) == ia32_am_unary) {
mem = get_irn_n(node, 3);
} else if(get_ia32_am_arity(node) == ia32_am_binary) {
mem = get_irn_n(node, 4);
} else {
assert(get_ia32_am_arity(node) == ia32_am_ternary);
mem = get_irn_n(node, 5);
}
load = new_rd_ia32_Load(dbgi, irg, block, base, index, mem);
load_res = new_rd_Proj(dbgi, irg, block, load, mode_Iu, pn_ia32_Load_res);
ia32_copy_am_attrs(load, node);
if(get_ia32_am_arity(node) == ia32_am_unary) {
set_irn_n(node, 2, load_res);
set_irn_n(node, 3, new_NoMem());
} else if(get_ia32_am_arity(node) == ia32_am_binary) {
set_irn_n(node, 3, load_res);
set_irn_n(node, 4, new_NoMem());
} else if(get_ia32_am_arity(node) == ia32_am_ternary) {
set_irn_n(node, 3, load_res);
set_irn_n(node, 4, new_NoMem());
}
/* rewire mem-proj */
if(get_irn_mode(node) == mode_T) {
mem_proj = NULL;
foreach_out_edge(node, edge) {
ir_node *out = get_edge_src_irn(edge);
if(get_Proj_proj(out) == pn_ia32_mem) {
mem_proj = out;
break;
}
}
if(mem_proj != NULL) {
set_Proj_pred(mem_proj, load);
set_Proj_proj(mem_proj, pn_ia32_Load_M);
}
}
set_ia32_op_type(node, ia32_Normal);
if(sched_is_scheduled(node))
sched_add_before(node, load);
}
static ir_node *flags_remat(ir_node *node, ir_node *after)
{
/* we should turn back source address mode when rematerializing nodes */
ia32_op_type_t type = get_ia32_op_type(node);
if(type == ia32_AddrModeS) {
turn_back_am(node);
} else if(type == ia32_AddrModeD) {
/* TODO implement this later... */
panic("found DestAM with flag user %+F this should not happen", node);
} else {
assert(type == ia32_Normal);
}
ir_node *copy = exact_copy(node);
sched_add_after(after, copy);
return copy;
}
/** /**
* Called before the register allocator. * Called before the register allocator.
* Calculate a block schedule here. We need it for the x87 * Calculate a block schedule here. We need it for the x87
* simulator and the emitter. * simulator and the emitter.
*/ */
static void ia32_before_ra(void *self) { static void ia32_before_ra(void *self) {
ia32_code_gen_t *cg = self; ia32_code_gen_t *cg = self;
/* setup fpu rounding modes */ /* setup fpu rounding modes */
ia32_setup_fpu_mode(cg); ia32_setup_fpu_mode(cg);
/* fixup flags */
be_sched_fix_flags(cg->birg, &ia32_reg_classes[CLASS_ia32_flags],
&flags_remat);
ia32_add_missing_keeps(cg);
} }
......
...@@ -612,16 +612,8 @@ static void fix_am_source(ir_node *irn, void *env) { ...@@ -612,16 +612,8 @@ static void fix_am_source(ir_node *irn, void *env) {
} }
/* copy address mode information to load */ /* copy address mode information to load */
set_ia32_ls_mode(load, get_ia32_ls_mode(irn));
set_ia32_op_type(load, ia32_AddrModeS); set_ia32_op_type(load, ia32_AddrModeS);
set_ia32_am_scale(load, get_ia32_am_scale(irn)); ia32_copy_am_attrs(load, irn);
set_ia32_am_sc(load, get_ia32_am_sc(irn));
if(is_ia32_am_sc_sign(irn))
set_ia32_am_sc_sign(load);
add_ia32_am_offs_int(load, get_ia32_am_offs_int(irn));
set_ia32_frame_ent(load, get_ia32_frame_ent(irn));
if (is_ia32_use_frame(irn))
set_ia32_use_frame(load);
/* insert the load into schedule */ /* insert the load into schedule */
sched_add_before(irn, load); sched_add_before(irn, load);
......
...@@ -85,17 +85,20 @@ static void resolve_call(ir_node *call, ir_node *l_res, ir_node *h_res, ir_graph ...@@ -85,17 +85,20 @@ static void resolve_call(ir_node *call, ir_node *l_res, ir_node *h_res, ir_graph
* Map an Add (a_l, a_h, b_l, b_h) * Map an Add (a_l, a_h, b_l, b_h)
*/ */
static int map_Add(ir_node *call, void *ctx) { static int map_Add(ir_node *call, void *ctx) {
ir_graph *irg = current_ir_graph; ir_graph *irg = current_ir_graph;
dbg_info *dbg = get_irn_dbg_info(call); dbg_info *dbg = get_irn_dbg_info(call);
ir_node *block = get_nodes_block(call); ir_node *block = get_nodes_block(call);
ir_node **params = get_Call_param_arr(call); ir_node **params = get_Call_param_arr(call);
ir_type *method = get_Call_type(call); ir_type *method = get_Call_type(call);
ir_node *a_l = params[BINOP_Left_Low]; ir_node *a_l = params[BINOP_Left_Low];
ir_node *a_h = params[BINOP_Left_High]; ir_node *a_h = params[BINOP_Left_High];
ir_node *b_l = params[BINOP_Right_Low]; ir_node *b_l = params[BINOP_Right_Low];
ir_node *b_h = params[BINOP_Right_High]; ir_node *b_h = params[BINOP_Right_High];
ir_mode *l_mode = get_type_mode(get_method_res_type(method, 0)); ir_mode *l_mode = get_type_mode(get_method_res_type(method, 0));
ir_node *l_res, *h_res, *add; ir_mode *h_mode = get_type_mode(get_method_res_type(method, 1));
ir_mode *mode_flags = ia32_reg_classes[CLASS_ia32_flags].mode;
ir_node *add_low, *add_high, *flags;
ir_node *l_res, *h_res;
(void) ctx; (void) ctx;
assert(l_mode == get_type_mode(get_method_res_type(method, 1)) && "64bit lowered into different modes"); assert(l_mode == get_type_mode(get_method_res_type(method, 1)) && "64bit lowered into different modes");
...@@ -103,9 +106,12 @@ static int map_Add(ir_node *call, void *ctx) { ...@@ -103,9 +106,12 @@ static int map_Add(ir_node *call, void *ctx) {
/* l_res = a_l + b_l */ /* l_res = a_l + b_l */
/* h_res = a_h + b_h + carry */ /* h_res = a_h + b_h + carry */
add = new_rd_ia32_Add64Bit(dbg, irg, block, a_l, a_h, b_l, b_h); add_low = new_rd_ia32_l_Add(dbg, irg, block, a_l, b_l, mode_T);
l_res = new_r_Proj(irg, block, add, l_mode, pn_ia32_Add64Bit_low_res); flags = new_r_Proj(irg, block, add_low, mode_flags, pn_ia32_flags);
h_res = new_r_Proj(irg, block, add, l_mode, pn_ia32_Add64Bit_high_res); add_high = new_rd_ia32_l_Adc(dbg, irg, block, a_h, b_h, flags, h_mode);
l_res = new_r_Proj(irg, block, add_low, l_mode, pn_ia32_res);
h_res = add_high;
resolve_call(call, l_res, h_res, irg, block); resolve_call(call, l_res, h_res, irg, block);
return 1; return 1;
......
...@@ -88,6 +88,7 @@ typedef struct ia32_attr_t ia32_attr_t; ...@@ -88,6 +88,7 @@ typedef struct ia32_attr_t ia32_attr_t;
struct ia32_attr_t { struct ia32_attr_t {
except_attr exc; /**< the exception attribute. MUST be the first one. */ except_attr exc; /**< the exception attribute. MUST be the first one. */
struct ia32_attr_data_bitfield { struct ia32_attr_data_bitfield {
unsigned flags:5; /**< Indicating if spillable, rematerializeable, stack modifying and/or ignore. */
unsigned tp:3; /**< ia32 node type. */ unsigned tp:3; /**< ia32 node type. */
unsigned am_support:2; /**< Indicates the address mode type supported by this node. */ unsigned am_support:2; /**< Indicates the address mode type supported by this node. */
unsigned am_arity : 2; unsigned am_arity : 2;
...@@ -99,8 +100,6 @@ struct ia32_attr_t { ...@@ -99,8 +100,6 @@ struct ia32_attr_t {
ia32_op_flavour_t op_flav:2;/**< Flavour of an op (flavour_Div/Mod/DivMod). */ ia32_op_flavour_t op_flav:2;/**< Flavour of an op (flavour_Div/Mod/DivMod). */
unsigned flags:4; /**< Indicating if spillable, rematerializeable, stack modifying and/or ignore. */
unsigned is_commutative:1; /**< Indicates whether op is commutative or not. */ unsigned is_commutative:1; /**< Indicates whether op is commutative or not. */
unsigned got_lea:1; /**< Indicates whether or not this node already consumed a LEA. */ unsigned got_lea:1; /**< Indicates whether or not this node already consumed a LEA. */
......
...@@ -309,7 +309,7 @@ sub ia32_custom_init_attr { ...@@ -309,7 +309,7 @@ sub ia32_custom_init_attr {
my $name = shift; my $name = shift;
my $res = ""; my $res = "";
if(defined($node->{modified_flags})) { if(defined($node->{modified_flags})) {
$res .= "\t/*attr->data.flags |= arch_irn_flags_modify_flags;*/\n"; $res .= "\tset_ia32_flags(res, get_ia32_flags(res) | arch_irn_flags_modify_flags);\n";
} }
if(defined($node->{am})) { if(defined($node->{am})) {
my $am = $node->{am}; my $am = $node->{am};
...@@ -415,7 +415,7 @@ ProduceVal => { ...@@ -415,7 +415,7 @@ ProduceVal => {
Add => { Add => {
irn_flags => "R", irn_flags => "R",
reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4" ] }, reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4", "none", "flags" ] },
ins => [ "base", "index", "mem", "left", "right" ], ins => [ "base", "index", "mem", "left", "right" ],
emit => '. add%M %binop', emit => '. add%M %binop',
am => "full,binary", am => "full,binary",
...@@ -444,6 +444,17 @@ Adc => { ...@@ -444,6 +444,17 @@ Adc => {
modified_flags => $status_flags modified_flags => $status_flags
}, },
l_Add => {
op_flags => "C",
reg_req => { in => [ "none", "none" ], out => [ "none" ] },
ins => [ "left", "right" ],
},
l_Adc => {
reg_req => { in => [ "none", "none", "none" ], out => [ "none" ] },
ins => [ "left", "right", "eflags" ],
},
Add64Bit => { Add64Bit => {
irn_flags => "R", irn_flags => "R",
arity => 4, arity => 4,
...@@ -927,7 +938,6 @@ Not => { ...@@ -927,7 +938,6 @@ Not => {
emit => '. not %S0', emit => '. not %S0',
units => [ "GP" ], units => [ "GP" ],
mode => $mode_gp, mode => $mode_gp,
modified_flags => []
}, },
NotMem => { NotMem => {
...@@ -937,7 +947,6 @@ NotMem => { ...@@ -937,7 +947,6 @@ NotMem => {
emit => '. not%M %AM', emit => '. not%M %AM',
units => [ "GP" ], units => [ "GP" ],
mode => "mode_M", mode => "mode_M",
modified_flags => [],
}, },
# other operations # other operations
...@@ -1010,7 +1019,6 @@ IJmp => { ...@@ -1010,7 +1019,6 @@ IJmp => {
emit => '. jmp *%S0', emit => '. jmp *%S0',
units => [ "BRANCH" ], units => [ "BRANCH" ],
mode => "mode_X", mode => "mode_X",
modified_flags => []
}, },
Const => { Const => {
...@@ -1190,7 +1198,6 @@ Lea => { ...@@ -1190,7 +1198,6 @@ Lea => {
latency => 2, latency => 2,
units => [ "GP" ], units => [ "GP" ],
mode => $mode_gp, mode => $mode_gp,
modified_flags => [],
}, },
Push => { Push => {
...@@ -1201,7 +1208,6 @@ Push => { ...@@ -1201,7 +1208,6 @@ Push => {
am => "source,binary", am => "source,binary",
latency => 2, latency => 2,
units => [ "GP" ], units => [ "GP" ],
modified_flags => [],
}, },
Pop => { Pop => {
...@@ -1212,7 +1218,6 @@ Pop => { ...@@ -1212,7 +1218,6 @@ Pop => {
am => "dest,unary", am => "dest,unary",
latency => 3, # Pop is more expensive than Push on Athlon latency => 3, # Pop is more expensive than Push on Athlon
units => [ "GP" ], units => [ "GP" ],
modified_flags => [],
}, },
Enter => { Enter => {
...@@ -1494,7 +1499,8 @@ CopyB => { ...@@ -1494,7 +1499,8 @@ CopyB => {
reg_req => { in => [ "edi", "esi", "ecx", "none" ], out => [ "edi", "esi", "ecx", "none" ] }, reg_req => { in => [ "edi", "esi", "ecx", "none" ], out => [ "edi", "esi", "ecx", "none" ] },
outs => [ "DST", "SRC", "CNT", "M" ], outs => [ "DST", "SRC", "CNT", "M" ],
units => [ "GP" ], units => [ "GP" ],
modified_flags => [ "DF" ] # we don't care about this flag, so no need to mark this node
# modified_flags => [ "DF" ]
}, },
CopyB_i => { CopyB_i => {
...@@ -1503,7 +1509,8 @@ CopyB_i => { ...@@ -1503,7 +1509,8 @@ CopyB_i => {
reg_req => { in => [ "edi", "esi", "none" ], out => [ "edi", "esi", "none" ] }, reg_req => { in => [ "edi", "esi", "none" ], out => [ "edi", "esi", "none" ] },
outs => [ "DST", "SRC", "M" ], outs => [ "DST", "SRC", "M" ],
units => [ "GP" ], units => [ "GP" ],
modified_flags => [ "DF" ] # we don't care about this flag, so no need to mark this node
# modified_flags => [ "DF" ]
}, },
# Conversions # Conversions
......
...@@ -136,8 +136,8 @@ static ir_node *create_immediate_or_transform(ir_node *node, ...@@ -136,8 +136,8 @@ static ir_node *create_immediate_or_transform(ir_node *node,
char immediate_constraint_type); char immediate_constraint_type);
static ir_node *create_I2I_Conv(ir_mode *src_mode, ir_mode *tgt_mode, static ir_node *create_I2I_Conv(ir_mode *src_mode, ir_mode *tgt_mode,
dbg_info *dbgi, ir_node *new_block, dbg_info *dbgi, ir_node *block,
ir_node *new_op); ir_node *op, ir_node *orig_node);
/** /**
* Return true if a mode can be stored in the GP register set * Return true if a mode can be stored in the GP register set
...@@ -482,7 +482,13 @@ static int use_source_address_mode(ir_node *block, ir_node *node, ...@@ -482,7 +482,13 @@ static int use_source_address_mode(ir_node *block, ir_node *node,
mode = get_irn_mode(node); mode = get_irn_mode(node);
if(!mode_needs_gp_reg(mode)) if(!mode_needs_gp_reg(mode))
return 0; return 0;
if(get_mode_size_bits(mode) != 32) /*
* Matze: the unresolved question here is wether 8/16bit operations
* are a good idea if they define registers (as writing to an 8/16
* bit reg is bad on modern cpu as it confuses the dependency calculation
* for the full reg)
*/
if(other != NULL && get_Load_mode(load) != get_irn_mode(other))
return 0; return 0;
/* don't do AM if other node inputs depend on the load (via mem-proj) */ /* don't do AM if other node inputs depend on the load (via mem-proj) */
...@@ -564,7 +570,8 @@ static void set_am_attributes(ir_node *node, ia32_address_mode_t *am) ...@@ -564,7 +570,8 @@ static void set_am_attributes(ir_node *node, ia32_address_mode_t *am)
static void match_arguments(ia32_address_mode_t *am, ir_node *block, static void match_arguments(ia32_address_mode_t *am, ir_node *block,
ir_node *op1, ir_node *op2, int commutative, ir_node *op1, ir_node *op2, int commutative,
int use_am_and_immediates, int use_am) int use_am_and_immediates, int use_am,
int use_8_16_bit_am)
{ {
ia32_address_t *addr = &am->addr; ia32_address_t *addr = &am->addr;
ir_node *noreg_gp = ia32_new_NoReg_gp(env_cg); ir_node *noreg_gp = ia32_new_NoReg_gp(env_cg);
...@@ -573,6 +580,9 @@ static void match_arguments(ia32_address_mode_t *am, ir_node *block, ...@@ -573,6 +580,9 @@ static void match_arguments(ia32_address_mode_t *am, ir_node *block,
memset(am, 0, sizeof(am[0])); memset(am, 0, sizeof(am[0]));
if(!use_8_16_bit_am && get_mode_size_bits(get_irn_mode(op1)) < 32)
use_am = 0;
new_op2 = try_create_Immediate(op2, 0); new_op2 = try_create_Immediate(op2, 0);
if(new_op2 == NULL && use_am && use_source_address_mode(block, op2, op1)) { if(new_op2 == NULL && use_am && use_source_address_mode(block, op2, op1)) {
build_address(am, op2); build_address(am, op2);
...@@ -626,7 +636,7 @@ static ir_node *fix_mem_proj(ir_node *node, ia32_address_mode_t *am) ...@@ -626,7 +636,7 @@ static ir_node *fix_mem_proj(ir_node *node, ia32_address_mode_t *am)
if(mode != mode_T) { if(mode != mode_T) {
set_irn_mode(node, mode_T); set_irn_mode(node, mode_T);
return new_rd_Proj(NULL, irg, get_nodes_block(node), node, mode, 0); return new_rd_Proj(NULL, irg, get_nodes_block(node), node, mode, pn_ia32_res);
} else { } else {
return node; return node;
} }
...@@ -651,7 +661,7 @@ static ir_node *gen_binop(ir_node *node, ir_node *op1, ir_node *op2, ...@@ -651,7 +661,7 @@ static ir_node *gen_binop(ir_node *node, ir_node *op1, ir_node *op2,
ia32_address_mode_t am; ia32_address_mode_t am;
ia32_address_t *addr = &am.addr; ia32_address_t *addr = &am.addr;
match_arguments(&am, src_block, op1, op2, commutative, 0, 1); match_arguments(&am, src_block, op1, op2, commutative, 0, 1, 0);
new_node = func(dbgi, irg, block, addr->base, addr->index, addr->mem, new_node = func(dbgi, irg, block, addr->base, addr->index, addr->mem,
am.new_op1, am.new_op2); am.new_op1, am.new_op2);
...@@ -1010,8 +1020,7 @@ static ir_node *gen_And(ir_node *node) { ...@@ -1010,8 +1020,7 @@ static ir_node *gen_And(ir_node *node) {
if (v == 0xFF || v == 0xFFFF) { if (v == 0xFF || v == 0xFFFF) {
dbg_info *dbgi = get_irn_dbg_info(node); dbg_info *dbgi = get_irn_dbg_info(node);
ir_node *block = be_transform_node(get_nodes_block(node)); ir_node *block = get_nodes_block(node);
ir_node *new_op = be_transform_node(op1);
ir_mode *src_mode; ir_mode *src_mode;
ir_node *res; ir_node *res;
...@@ -1021,8 +1030,7 @@ static ir_node *gen_And(ir_node *node) { ...@@ -1021,8 +1030,7 @@ static ir_node *gen_And(ir_node *node) {
assert(v == 0xFFFF); assert(v == 0xFFFF);
src_mode = mode_Hu; src_mode = mode_Hu;
} }
res = create_I2I_Conv(src_mode, mode_Iu, dbgi, block, new_op); res = create_I2I_Conv(src_mode, mode_Iu, dbgi, block, op1, node);
SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(env_cg, node));
return res; return res;
} }
...@@ -1309,8 +1317,7 @@ static ir_node *gen_Shrs(ir_node *node) { ...@@ -1309,8 +1317,7 @@ static ir_node *gen_Shrs(ir_node *node) {
long val = get_tarval_long(tv1); long val = get_tarval_long(tv1);
if(val == 16 || val == 24) { if(val == 16 || val == 24) {
dbg_info *dbgi = get_irn_dbg_info(node); dbg_info *dbgi = get_irn_dbg_info(node);
ir_node *block = be_transform_node(get_nodes_block(node)); ir_node *block = get_nodes_block(node);
ir_node *new_op = be_transform_node(shl_left);
ir_mode *src_mode; ir_mode *src_mode;
ir_node *res; ir_node *res;
...@@ -1321,9 +1328,7 @@ static ir_node *gen_Shrs(ir_node *node) { ...@@ -1321,9 +1328,7 @@ static ir_node *gen_Shrs(ir_node *node) {
src_mode = mode_Hs; src_mode = mode_Hs;
} }
res = create_I2I_Conv(src_mode, mode_Is, dbgi, block, res = create_I2I_Conv(src_mode, mode_Is, dbgi, block,
new_op); shl_left, node);
SET_IA32_ORIG_NODE(res,
ia32_get_old_node_name(env_cg, node));
return res; return res;
} }
...@@ -1770,8 +1775,6 @@ static ir_node *try_create_dest_am(ir_node *node) { ...@@ -1770,8 +1775,6 @@ static ir_node *try_create_dest_am(ir_node *node) {
/* handle only GP modes for now... */ /* handle only GP modes for now... */
if(!mode_needs_gp_reg(mode)) if(!mode_needs_gp_reg(mode))
return NULL; return NULL;
if(get_mode_size_bits(mode) != 32)
return NULL;
/* store must be the only user of the val node */ /* store must be the only user of the val node */
if(get_irn_n_edges(val) > 1) if(get_irn_n_edges(val) > 1)
...@@ -1967,7 +1970,7 @@ static ir_node *try_create_TestJmp(ir_node *block, dbg_info *dbgi, long pnc, ...@@ -1967,7 +1970,7 @@ static ir_node *try_create_TestJmp(ir_node *block, dbg_info *dbgi, long pnc,
mode = mode_Iu; mode = mode_Iu;
assert(get_mode_size_bits(mode) <= 32); assert(get_mode_size_bits(mode) <= 32);
match_arguments(&am, block, arg_left, arg_right, 1, 1, use_am); match_arguments(&am, block, arg_left, arg_right, 1, 1, use_am, 1);
if(am.flipped) if(am.flipped)
pnc = get_inversed_pnc(pnc); pnc = get_inversed_pnc(pnc);
...@@ -2099,7 +2102,7 @@ static ir_node *gen_Cond(ir_node *node) { ...@@ -2099,7 +2102,7 @@ static ir_node *gen_Cond(ir_node *node) {
} else { } else {
ia32_address_mode_t am; ia32_address_mode_t am;
ia32_address_t *addr = &am.addr; ia32_address_t *addr = &am.addr;
match_arguments(&am, src_block, cmp_a, cmp_b, 1, 1, use_am); match_arguments(&am, src_block, cmp_a, cmp_b, 1, 1, use_am, 1);
if(am.flipped) if(am.flipped)
pnc = get_inversed_pnc(pnc); pnc = get_inversed_pnc(pnc);
...@@ -2212,7 +2215,7 @@ static ir_node *create_set(long pnc, ir_node *cmp_left, ir_node *cmp_right, ...@@ -2212,7 +2215,7 @@ static ir_node *create_set(long pnc, ir_node *cmp_left, ir_node *cmp_right,
assert(get_mode_size_bits(mode) <= 32); assert(get_mode_size_bits(mode) <= 32);
match_arguments(&am, block, arg_left, arg_right, 1, 1, use_am); match_arguments(&am, block, arg_left, arg_right, 1, 1, use_am, 1);
if(am.flipped) if(am.flipped)
pnc = get_inversed_pnc(pnc); pnc = get_inversed_pnc(pnc);
...@@ -2238,7 +2241,7 @@ static ir_node *create_set(long pnc, ir_node *cmp_left, ir_node *cmp_right, ...@@ -2238,7 +2241,7 @@ static ir_node *create_set(long pnc, ir_node *cmp_left, ir_node *cmp_right,
mode = get_irn_mode(cmp_left); mode = get_irn_mode(cmp_left);
assert(get_mode_size_bits(mode) <= 32); assert(get_mode_size_bits(mode) <= 32);
match_arguments(&am, block, cmp_left, cmp_right, 1, 1, use_am); match_arguments(&am, block, cmp_left, cmp_right, 1, 1, use_am, 1);
if(am.flipped) if(am.flipped)
pnc = get_inversed_pnc(pnc); pnc = get_inversed_pnc(pnc);
...@@ -2564,17 +2567,20 @@ static ir_node *gen_x87_gp_to_fp(ir_node *node, ir_mode *src_mode) { ...@@ -2564,17 +2567,20 @@ static ir_node *gen_x87_gp_to_fp(ir_node *node, ir_mode *src_mode) {
* Crete a conversion from one integer mode into another one * Crete a conversion from one integer mode into another one
*/ */
static ir_node *create_I2I_Conv(ir_mode *src_mode, ir_mode *tgt_mode, static ir_node *create_I2I_Conv(ir_mode *src_mode, ir_mode *tgt_mode,
dbg_info *dbgi, ir_node *new_block, dbg_info *dbgi, ir_node *block, ir_node *op,