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Zwinkau
libfirm
Commits
979cade5
Commit
979cade5
authored
Aug 15, 2014
by
Tobias Rapp
Browse files
amd64: floating point spills
parent
c686387f
Changes
3
Hide whitespace changes
Inline
Side-by-side
ir/be/amd64/amd64_spec.pl
View file @
979cade5
...
@@ -544,7 +544,7 @@ xSubs => {
...
@@ -544,7 +544,7 @@ xSubs => {
arity
=>
"
variable
",
arity
=>
"
variable
",
attr_type
=>
"
amd64_binop_addr_attr_t
",
attr_type
=>
"
amd64_binop_addr_attr_t
",
attr
=>
"
const amd64_binop_addr_attr_t *attr_init
",
attr
=>
"
const amd64_binop_addr_attr_t *attr_init
",
emit
=>
"
subs%MX %
S1, %D0
",
emit
=>
"
subs%MX %
AM
",
},
},
xUcomis
=>
{
xUcomis
=>
{
...
...
ir/be/amd64/amd64_transform.c
View file @
979cade5
...
@@ -741,7 +741,7 @@ static ir_node *gen_binop_am(ir_node *node, ir_node *op1, ir_node *op2,
...
@@ -741,7 +741,7 @@ static ir_node *gen_binop_am(ir_node *node, ir_node *op1, ir_node *op2,
if
(
mode_is_float
(
mode
))
{
if
(
mode_is_float
(
mode
))
{
arch_set_irn_register_req_out
(
new_node
,
0
,
arch_set_irn_register_req_out
(
new_node
,
0
,
&
amd64_requirement_xmm_same_0
);
&
amd64_requirement_xmm_same_0
);
return
new_r_Proj
(
new_node
,
mode_D
,
pn_amd64_x
Add
s_res
);
return
new_r_Proj
(
new_node
,
mode_D
,
pn_amd64_x
Sub
s_res
);
}
else
{
}
else
{
arch_set_irn_register_req_out
(
new_node
,
0
,
arch_set_irn_register_req_out
(
new_node
,
0
,
&
amd64_requirement_gp_same_0
);
&
amd64_requirement_gp_same_0
);
...
@@ -2243,8 +2243,15 @@ ir_node *amd64_new_reload(ir_node *value, ir_node *spill, ir_node *before)
...
@@ -2243,8 +2243,15 @@ ir_node *amd64_new_reload(ir_node *value, ir_node *spill, ir_node *before)
addr
.
index_input
=
NO_INPUT
;
addr
.
index_input
=
NO_INPUT
;
ir_node
*
in
[]
=
{
frame
,
spill
};
ir_node
*
in
[]
=
{
frame
,
spill
};
ir_node
*
load
=
new_bd_amd64_Mov
(
NULL
,
block
,
ARRAY_SIZE
(
in
),
in
,
INSN_MODE_64
,
AMD64_OP_ADDR
,
addr
);
ir_node
*
load
;
if
(
mode_is_float
(
mode
))
{
load
=
new_bd_amd64_xMovs
(
NULL
,
block
,
ARRAY_SIZE
(
in
),
in
,
INSN_MODE_64
,
AMD64_OP_ADDR
,
addr
);
}
else
{
load
=
new_bd_amd64_Mov
(
NULL
,
block
,
ARRAY_SIZE
(
in
),
in
,
INSN_MODE_64
,
AMD64_OP_ADDR
,
addr
);
}
arch_set_irn_register_reqs_in
(
load
,
reg_mem_reqs
);
arch_set_irn_register_reqs_in
(
load
,
reg_mem_reqs
);
arch_add_irn_flags
(
load
,
arch_irn_flag_reload
);
arch_add_irn_flags
(
load
,
arch_irn_flag_reload
);
sched_add_before
(
before
,
load
);
sched_add_before
(
before
,
load
);
...
...
ir/be/amd64/bearch_amd64.c
View file @
979cade5
...
@@ -487,14 +487,15 @@ static void amd64_set_frame_entity(ir_node *node, ir_entity *entity,
...
@@ -487,14 +487,15 @@ static void amd64_set_frame_entity(ir_node *node, ir_entity *entity,
{
{
(
void
)
type
;
(
void
)
type
;
assert
(
is_amd64_Store
(
node
)
||
is_amd64_Mov
(
node
)
assert
(
is_amd64_Store
(
node
)
||
is_amd64_Mov
(
node
)
||
is_amd64_Movs
(
node
));
||
is_amd64_Movs
(
node
)
||
is_amd64_xMovs
(
node
)
||
is_amd64_xStores
(
node
));
amd64_addr_attr_t
*
attr
=
get_amd64_addr_attr
(
node
);
amd64_addr_attr_t
*
attr
=
get_amd64_addr_attr
(
node
);
attr
->
addr
.
immediate
.
entity
=
entity
;
attr
->
addr
.
immediate
.
entity
=
entity
;
}
}
static
bool
is_frame_load
(
const
ir_node
*
node
)
static
bool
is_frame_load
(
const
ir_node
*
node
)
{
{
return
is_amd64_Mov
(
node
)
||
is_amd64_Movs
(
node
);
return
is_amd64_Mov
(
node
)
||
is_amd64_Movs
(
node
)
||
is_amd64_xMovs
(
node
)
;
}
}
/**
/**
...
...
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