Commit a8583be0 authored by sebastian.buchwald1's avatar sebastian.buchwald1
Browse files

Fix indentation

parent 52e16f28
......@@ -178,13 +178,13 @@ static char *make_fmt(char *buf, size_t len, const lc_arg_occ_t *occ)
}
#endif
snprintf(buf, len, "%%%s%s%s%s%s%s%s%s%c",
occ->flag_space ? "#" : "",
occ->flag_hash ? "#" : "",
occ->flag_plus ? "+" : "",
occ->flag_minus ? "-" : "",
occ->flag_zero ? "0" : "",
width, prec,
mod, occ->conversion);
occ->flag_space ? "#" : "",
occ->flag_hash ? "#" : "",
occ->flag_plus ? "+" : "",
occ->flag_minus ? "-" : "",
occ->flag_zero ? "0" : "",
width, prec,
mod, occ->conversion);
return buf;
}
......
......@@ -842,7 +842,7 @@ static void transform_return(ir_node *ret, size_t n_ret_com, wlk_env *env)
/* copy-return optimization is impossible, do the copy. */
bool is_volatile = is_partly_volatile(pred);
mem = new_r_CopyB(block, mem, arg, pred, type,
is_volatile ? cons_volatile : cons_none);
is_volatile ? cons_volatile : cons_none);
}
}
/* replace the in of the Return */
......
......@@ -780,7 +780,7 @@ static void lower_shr_helper(ir_node *node, ir_mode *mode,
/* this version is optimized for modulo shift architectures
* (and can't handle anything else) */
if (modulo_shift != get_mode_size_bits(shr_mode)
|| modulo_shift2<<1 != modulo_shift) {
|| modulo_shift2 << 1 != modulo_shift) {
panic("Shr lowering only implemented for modulo shift shr operations");
}
if (!is_po2_or_zero(modulo_shift) || !is_po2_or_zero(modulo_shift2)) {
......@@ -1194,8 +1194,8 @@ static void lower_Cond(ir_node *node, ir_mode *high_mode)
dstF = get_cfop_destination(projF);
ir_node *irn = new_rd_Cmp(dbg, block, lentry->high_word,
rentry->high_word,
relation & ~ir_relation_equal);
rentry->high_word,
relation & ~ir_relation_equal);
dbg = get_irn_dbg_info(node);
irn = new_rd_Cond(dbg, block, irn);
......@@ -1208,7 +1208,7 @@ static void lower_Cond(ir_node *node, ir_mode *high_mode)
newbl_eq = new_r_Block(irg, 1, &projHF);
irn = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
ir_relation_equal);
ir_relation_equal);
irn = new_rd_Cond(dbg, newbl_eq, irn);
projEqF = new_r_Proj(irn, mode_X, pn_Cond_false);
......@@ -1221,7 +1221,7 @@ static void lower_Cond(ir_node *node, ir_mode *high_mode)
dbg = get_irn_dbg_info(sel);
irn = new_rd_Cmp(dbg, newbl_l, lentry->low_word, rentry->low_word,
relation);
relation);
dbg = get_irn_dbg_info(node);
irn = new_rd_Cond(dbg, newbl_l, irn);
......@@ -1380,12 +1380,12 @@ static void lower_Cmp(ir_node *cmp, ir_mode *m)
/* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
ir_node *high1 = new_rd_Cmp(dbg, block, lentry->high_word,
rentry->high_word,
relation & ~ir_relation_equal);
rentry->high_word,
relation & ~ir_relation_equal);
ir_node *low = new_rd_Cmp(dbg, block, lentry->low_word,
rentry->low_word, relation);
rentry->low_word, relation);
ir_node *high = new_rd_Cmp(dbg, block, lentry->high_word,
rentry->high_word, ir_relation_equal);
rentry->high_word, ir_relation_equal);
ir_node *t = new_rd_And(dbg, block, low, high, mode_b);
ir_node *res = new_rd_Or(dbg, block, high1, t, mode_b);
exchange(cmp, res);
......@@ -2054,8 +2054,8 @@ static void lower_ASM(ir_node *asmn, ir_mode *mode)
new_ins[i] = get_ASM_input(asmn, i);
new_asm = new_rd_ASM(dbgi, block, mem, n_inputs, new_ins, input_constraints,
new_n_outs, new_outputs, n_clobber, clobbers,
asm_text);
new_n_outs, new_outputs, n_clobber, clobbers,
asm_text);
foreach_out_edge_safe(asmn, edge) {
ir_node *proj = get_edge_src_irn(edge);
......
......@@ -255,8 +255,8 @@ static ir_node *create_softfloat_address(const ir_node *n, const char *name)
} else if (mode == mode_D) {
result = double_types > 0 ? "" : "df";
double_types++;
} else if (mode == mode_Iu || mode == mode_Hu || mode == mode_Bu
|| mode == mode_Is || mode == mode_Hs || mode == mode_Bs)
} else if (mode == mode_Iu || mode == mode_Hu || mode == mode_Bu ||
mode == mode_Is || mode == mode_Hs || mode == mode_Bs)
result = "si";
else if (mode == mode_Lu || mode == mode_Ls)
result = "di";
......
......@@ -55,8 +55,8 @@ lpp_t *lpp_new(const char *name, lpp_opt_t opt_type)
}
lpp_t *lpp_new_userdef(const char *name, lpp_opt_t opt_type,
int estimated_vars, int estimated_csts,
double grow_factor)
int estimated_vars, int estimated_csts,
double grow_factor)
{
lpp_t *lpp;
int idx;
......@@ -338,11 +338,11 @@ void lpp_check_startvals(lpp_t *lpp)
int var_idx;
for (var_idx = 1; var_idx < lpp->var_next; ++var_idx) {
if (lpp->vars[var_idx]->value_kind != lpp_value_start)
goto next;
if (lpp->vars[var_idx]->value_kind != lpp_value_start)
goto next;
sum += lpp->vars[var_idx]->value *
matrix_get(lpp->m, cst_idx, var_idx);
sum += lpp->vars[var_idx]->value *
matrix_get(lpp->m, cst_idx, var_idx);
}
switch (cst->type.cst_type) {
case lpp_equal:
......@@ -417,7 +417,7 @@ void lpp_dump_plain(lpp_t *lpp, FILE *f)
}
fprintf(f, "%3s %+4.1f\n",
lpp_cst_op_to_str(cst->type.cst_type), matrix_get(lpp->m, cst->nr, 0));
lpp_cst_op_to_str(cst->type.cst_type), matrix_get(lpp->m, cst->nr, 0));
}
fprintf(f, "Binary\n");
......
......@@ -139,11 +139,11 @@ static void cpx_construct(cpx_t *cpx)
}
cpx->status = CPXcopylpwnames(cpx->env, cpx->prob,
numcols, numrows, objsen,
obj, rhs, sense,
matbeg, matcnt, matind, matval,
lb, ub, NULL,
colname, rowname);
numcols, numrows, objsen,
obj, rhs, sense,
matbeg, matcnt, matind, matval,
lb, ub, NULL,
colname, rowname);
chk_cpx_err(cpx);
cpx->status = CPXcopyctype(cpx->env, cpx->prob, vartype);
......@@ -196,7 +196,7 @@ static void cpx_solve(cpx_t *cpx)
*/
if(lpp->set_bound) {
CPXsetdblparam(cpx->env, (lpp->opt_type == lpp_minimize
? CPX_PARAM_OBJLLIM : CPX_PARAM_OBJULIM), lpp->bound);
? CPX_PARAM_OBJLLIM : CPX_PARAM_OBJULIM), lpp->bound);
}
/* turn on the fancy messages :) */
......
......@@ -109,7 +109,7 @@ static int get_conv_costs(const ir_node *const node, ir_mode *const dest_mode)
case iro_Conv:
if (is_downconv(mode, dest_mode) &&
get_irn_mode(get_Conv_op(node)) == dest_mode) {
get_irn_mode(get_Conv_op(node)) == dest_mode) {
return -1;
}
break;
......@@ -187,7 +187,7 @@ static ir_node *conv_transform(ir_node *node, ir_mode *dest_mode)
case iro_Conv:
if (is_downconv(mode, dest_mode) &&
get_irn_mode(get_Conv_op(node)) == dest_mode) {
get_irn_mode(get_Conv_op(node)) == dest_mode) {
return get_Conv_op(node);
}
break;
......
......@@ -3601,9 +3601,9 @@ static ir_node *transform_node_Sub(ir_node *n)
ir_mode *const offset_mode
= get_reference_offset_mode(ref_mode);
ir_node *const conv_b = new_r_Conv(block, b,
offset_mode);
offset_mode);
ir_node *const new_sub = new_rd_Sub(dbgi, block, conv_op,
conv_b, ref_mode);
conv_b, ref_mode);
ir_node *const conv = new_r_Conv(block, new_sub, mode);
return conv;
}
......@@ -3827,7 +3827,7 @@ static ir_node *transform_node_Mul(ir_node *n)
if (is_Const(a)) {
const ir_tarval *tv = get_Const_tarval(a);
if (tarval_get_exponent(tv) == 1 && tarval_zero_mantissa(tv)
&& !tarval_is_negative(tv)) {
&& !tarval_is_negative(tv)) {
/* 2.0 * b = b + b */
n = new_rd_Add(get_irn_dbg_info(n), get_nodes_block(n), b, b, mode);
DBG_OPT_ALGSIM1(oldn, a, b, n);
......@@ -3836,7 +3836,7 @@ static ir_node *transform_node_Mul(ir_node *n)
} else if (is_Const(b)) {
const ir_tarval *tv = get_Const_tarval(b);
if (tarval_get_exponent(tv) == 1 && tarval_zero_mantissa(tv)
&& !tarval_is_negative(tv)) {
&& !tarval_is_negative(tv)) {
/* a * 2.0 = a + a */
n = new_rd_Add(get_irn_dbg_info(n), get_nodes_block(n), a, a, mode);
DBG_OPT_ALGSIM1(oldn, a, b, n);
......@@ -4969,7 +4969,7 @@ static bool is_single_bit(const ir_node *node)
int modulo = get_mode_modulo_shift(mode);
/* this works if we shift a 1 and we have modulo shift */
if (is_Const(shl_l) && is_Const_one(shl_l)
&& 0 < modulo && modulo <= (int)get_mode_size_bits(mode)) {
&& 0 < modulo && modulo <= (int)get_mode_size_bits(mode)) {
return true;
}
} else if (is_Const(node)) {
......@@ -5877,8 +5877,8 @@ static ir_node *transform_node_Phi(ir_node *phi)
pred = get_irn_n(phi, i);
if (is_Confirm(pred) &&
get_Confirm_bound(pred) == bound &&
get_Confirm_relation(pred) == relation) {
get_Confirm_bound(pred) == bound &&
get_Confirm_relation(pred) == relation) {
in[i] = get_Confirm_value(pred);
has_confirm = true;
} else if (is_Bad(pred)) {
......
......@@ -276,7 +276,7 @@ count:
if (!is_in_loop(cfgpred)) {
DB((dbg, LEVEL_5, "potential head %+F because inloop and pred %+F not inloop\n",
node, pred));
node, pred));
/* another head? We do not touch this. */
if (loop_head && loop_head != node) {
loop_head_valid = false;
......@@ -389,7 +389,7 @@ static ir_node *search_def_and_create_phis(ir_node *const block, ir_mode *const
static void construct_ssa(ir_node *const orig_block, ir_node *const orig_val, ir_node *const second_block, ir_node *const second_val)
{
assert(orig_block && orig_val && second_block && second_val &&
"no parameter of construct_ssa may be NULL");
"no parameter of construct_ssa may be NULL");
if (orig_val == second_val)
return;
......@@ -628,7 +628,7 @@ static void copy_walk(ir_node *const node, walker_condition *const walk_conditio
copy_walk(pred, walk_condition, set_loop);
cpin[i] = get_inversion_copy(pred);
DB((dbg, LEVEL_5, "copy of %N gets new in %N which is copy of %N\n",
node, get_inversion_copy(pred), pred));
node, get_inversion_copy(pred), pred));
} else {
cpin[i] = pred;
}
......@@ -743,7 +743,7 @@ static void unmark_not_allowed_cc_blocks(void)
set_Block_mark(block, 0);
--inversion_blocks_in_cc;
DB((dbg, LEVEL_5, "Removed %N from cc (blocks in cc %d)\n",
block, inversion_blocks_in_cc));
block, inversion_blocks_in_cc));
break;
}
......@@ -797,7 +797,7 @@ static void get_head_outs(ir_node *const node, void *const env)
entry_edge const entry = { .node = node, .pos = i, .pred = pred };
ARR_APP1(entry_edge, head_df_loop, entry);
DB((dbg, LEVEL_5, "Found incc assignment node %N @%d is pred %N, graph %N %N\n",
node, i, entry.pred, get_irn_irg(node), get_irg_start_block(get_irn_irg(node))));
node, i, entry.pred, get_irn_irg(node), get_irg_start_block(get_irn_irg(node))));
}
}
}
......@@ -1106,7 +1106,7 @@ static void loop_inversion(ir_graph *const irg)
unsigned const max_loop_nodes_adapted = get_max_nodes_adapted(loop_depth);
DB((dbg, LEVEL_1, "max_nodes: %d\nmax_nodes_adapted %d at depth of %d (adaption %d)\n",
max_loop_nodes, max_loop_nodes_adapted, loop_depth, opt_params.depth_adaption));
max_loop_nodes, max_loop_nodes_adapted, loop_depth, opt_params.depth_adaption));
if (loop_info.nodes == 0)
return;
......@@ -1711,9 +1711,9 @@ static unsigned get_const_pred(ir_node *const node, ir_node **const const_pred,
static unsigned simulate_next(ir_tarval **const count_tar, ir_tarval *const stepped, ir_tarval *const step_tar, ir_tarval *const end_tar, ir_relation const norm_proj)
{
DB((dbg, LEVEL_4, "Loop taken if (stepped)%ld %s (end)%ld ",
get_tarval_long(stepped),
get_relation_string((norm_proj)),
get_tarval_long(end_tar)));
get_tarval_long(stepped),
get_relation_string((norm_proj)),
get_tarval_long(end_tar)));
DB((dbg, LEVEL_4, "comparing latest value %d\n", loop_info.latest_value));
/* If current iv does not stay in the loop,
......@@ -1722,9 +1722,9 @@ static unsigned simulate_next(ir_tarval **const count_tar, ir_tarval *const step
return 1;
DB((dbg, LEVEL_4, "Result: (stepped)%ld IS %s (end)%ld\n",
get_tarval_long(stepped),
get_relation_string(tarval_cmp(stepped, end_tar)),
get_tarval_long(end_tar)));
get_tarval_long(stepped),
get_relation_string(tarval_cmp(stepped, end_tar)),
get_tarval_long(end_tar)));
/* next step */
ir_tarval *const next = is_Add(loop_info.add) ?
......@@ -1732,9 +1732,9 @@ static unsigned simulate_next(ir_tarval **const count_tar, ir_tarval *const step
tarval_sub(stepped, step_tar);
DB((dbg, LEVEL_4, "Loop taken if %ld %s %ld ",
get_tarval_long(next),
get_relation_string(norm_proj),
get_tarval_long(end_tar)));
get_tarval_long(next),
get_relation_string(norm_proj),
get_tarval_long(end_tar)));
DB((dbg, LEVEL_4, "comparing latest value %d\n", loop_info.latest_value));
/* Increase steps. */
......@@ -1900,7 +1900,7 @@ static unsigned get_unroll_decision_invariant(ir_graph *const irg)
}
DB((dbg, LEVEL_4, "start %N, end %N, step %N\n",
loop_info.start_val, loop_info.end_val, loop_info.step));
loop_info.start_val, loop_info.end_val, loop_info.step));
ir_mode *const mode = get_irn_mode(loop_info.end_val);
if (mode != mode_Is && mode != mode_Iu)
......
......@@ -95,5 +95,5 @@ void occult_consts(ir_graph *irg)
constbits_clear(irg);
confirm_irg_properties(irg,
env.changed ? IR_GRAPH_PROPERTIES_NONE : IR_GRAPH_PROPERTIES_ALL);
env.changed ? IR_GRAPH_PROPERTIES_NONE : IR_GRAPH_PROPERTIES_ALL);
}
......@@ -48,13 +48,13 @@ static void parallelize_load(parallelize_info *pi, ir_node *irn)
if (is_Proj(irn)) {
ir_node *pred = get_Proj_pred(irn);
if (is_Load(pred) &&
get_Load_volatility(pred) == volatility_non_volatile) {
get_Load_volatility(pred) == volatility_non_volatile) {
ir_node *mem = get_Load_mem(pred);
ir_nodeset_insert(&pi->user_mem, irn);
parallelize_load(pi, mem);
return;
} else if (is_Store(pred) &&
get_Store_volatility(pred) == volatility_non_volatile) {
get_Store_volatility(pred) == volatility_non_volatile) {
ir_type *org_type = pi->origin_type;
unsigned org_size = pi->origin_size;
ir_node *org_ptr = pi->origin_ptr;
......
......@@ -55,8 +55,8 @@ void remove_tuples(ir_graph *irg)
}
confirm_irg_properties(irg, changed
? IR_GRAPH_PROPERTIES_CONTROL_FLOW | IR_GRAPH_PROPERTY_ONE_RETURN
| IR_GRAPH_PROPERTY_MANY_RETURNS | IR_GRAPH_PROPERTY_NO_BADS
: IR_GRAPH_PROPERTIES_ALL);
? IR_GRAPH_PROPERTIES_CONTROL_FLOW | IR_GRAPH_PROPERTY_ONE_RETURN
| IR_GRAPH_PROPERTY_MANY_RETURNS | IR_GRAPH_PROPERTY_NO_BADS
: IR_GRAPH_PROPERTIES_ALL);
add_irg_properties(irg, IR_GRAPH_PROPERTY_NO_TUPLES);
}
......@@ -366,12 +366,12 @@ static bool verify_info_member(ir_type const *const segment,
ident *const ld_ident = get_entity_ld_ident(entity);
if (ld_ident[0] != '\0') {
report_error("entity %+F in %s segment must not have an ld_name",
entity, get_id_str(get_segment_ident(segment)));
entity, get_id_str(get_segment_ident(segment)));
fine = false;
}
if ((get_entity_linkage(entity) & IR_LINKAGE_HIDDEN_USER) == 0) {
report_error("entity %+F in segment %s without LINKAGE_HIDDEN_USER",
entity, get_id_str(get_segment_ident(segment)));
entity, get_id_str(get_segment_ident(segment)));
fine = false;
}
return fine;
......
......@@ -761,7 +761,7 @@ void fc_cast(const fp_value *value, const float_descriptor_t *dest,
int exp_offset = res_bias - val_bias;
exp_offset += dest->mantissa_size - dest->explicit_one
- (desc->mantissa_size - desc->explicit_one);
- (desc->mantissa_size - desc->explicit_one);
sc_word *temp = ALLOCAN(sc_word, value_size);
sc_val_from_long(exp_offset, temp);
sc_add(_exp(value), temp, _exp(result));
......@@ -875,7 +875,7 @@ void fc_get_inf(const float_descriptor_t *desc, fp_value *result, bool sign)
sc_zero(_mant(result));
// set the explicit one
sc_set_bit_at(_mant(result),
(desc->mantissa_size - desc->explicit_one)+ROUNDING_BITS);
(desc->mantissa_size - desc->explicit_one)+ROUNDING_BITS);
}
ir_relation fc_comp(fp_value const *const val_a, fp_value const *const val_b)
......@@ -1125,7 +1125,7 @@ flt2int_result_t fc_flt2int(const fp_value *a, sc_word *result,
return FLT2INT_OK;
case FC_INF:
return a->sign ? FLT2INT_NEGATIVE_OVERFLOW
: FLT2INT_POSITIVE_OVERFLOW;
: FLT2INT_POSITIVE_OVERFLOW;
case FC_SUBNORMAL:
case FC_NORMAL:
if (a->sign && !result_signed)
......@@ -1143,7 +1143,7 @@ flt2int_result_t fc_flt2int(const fp_value *a, sc_word *result,
sc_get_highest_set_bit(_mant(a))
!= sc_get_lowest_set_bit(_mant(a))))) {
return a->sign ? FLT2INT_NEGATIVE_OVERFLOW
: FLT2INT_POSITIVE_OVERFLOW;
: FLT2INT_POSITIVE_OVERFLOW;
}
unsigned mantissa_size = a->desc.mantissa_size + ROUNDING_BITS;
int shift = exp_val - (mantissa_size-a->desc.explicit_one);
......
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