Remove the very thin wrapper function arch_register_get_class().

ir/be/amd64/amd64_emitter.c

@@ -376,15 +376,12 @@ static void emit_be_Copy(const ir_node *irn)
 static void emit_be_Perm(const ir_node *node)
 {
 	const arch_register_t *in0, *in1;
-	const arch_register_class_t *cls0, *cls1;
 
 	in0 = arch_get_irn_register(get_irn_n(node, 0));
 	in1 = arch_get_irn_register(get_irn_n(node, 1));
 
-	cls0 = arch_register_get_class(in0);
-	cls1 = arch_register_get_class(in1);
-
-	assert(cls0 == cls1 && "Register class mismatch at Perm");
+	arch_register_class_t const* const cls0 = in0->reg_class;
+	assert(cls0 == in1->reg_class && "Register class mismatch at Perm");
 
 	amd64_emitf(node, "xchg %R, %R", in0, in1);
 

ir/be/beabi.c

@@ -705,7 +705,7 @@ static ir_node *adjust_call(be_abi_irg_t *env, ir_node *irn, ir_node *curr_sp)
 		keep = be_new_Keep(bl, n, in);
 		for (i = 0; i < n; ++i) {
 			const arch_register_t *reg = (const arch_register_t*)get_irn_link(in[i]);
-			be_node_set_reg_class_in(keep, i, arch_register_get_class(reg));
+			be_node_set_reg_class_in(keep, i, reg->reg_class);
 		}
 	}
 

ir/be/bearch.c

@@ -249,11 +249,11 @@ bool arch_reg_is_allocatable(const arch_register_req_t *req,
 	if (req->type == arch_register_req_type_none)
 		return false;
 	if (req->type & arch_register_req_type_limited) {
-		if (arch_register_get_class(reg) != req->cls)
+		if (reg->reg_class != req->cls)
 			return false;
 		return rbitset_is_set(req->limited, reg->index);
 	}
-	return req->cls == arch_register_get_class(reg);
+	return req->cls == reg->reg_class;
 }
 
 void arch_dump_register_req(FILE *F, const arch_register_req_t *req,

ir/be/bearch.h

@@ -239,12 +239,6 @@ struct arch_register_t {
 	unsigned short               dwarf_number;
 };
 
-static inline const arch_register_class_t *arch_register_get_class(
-		const arch_register_t *reg)
-{
-	return reg->reg_class;
-}
-
 /**
  * A class of registers.
  * Like general purpose or floating point.

ir/be/benode.c

@@ -830,7 +830,7 @@ const arch_register_req_t *be_create_reg_req(struct obstack *obst,
 		const arch_register_t *reg, arch_register_req_type_t additional_types)
 {
 	arch_register_req_t         *req = OALLOC(obst, arch_register_req_t);
-	const arch_register_class_t *cls = arch_register_get_class(reg);
+	const arch_register_class_t *cls = reg->reg_class;
 	unsigned                    *limited_bitset;
 
 	limited_bitset = rbitset_obstack_alloc(obst, arch_register_class_n_regs(cls));
@@ -987,7 +987,7 @@ static int get_start_reg_index(ir_graph *irg, const arch_register_t *reg)
 			= arch_get_irn_register_req_out(start, i);
 		if (! (out_req->type & arch_register_req_type_limited))
 			continue;
-		if (out_req->cls != arch_register_get_class(reg))
+		if (out_req->cls != reg->reg_class)
 			continue;
 		if (!rbitset_is_set(out_req->limited, reg->index))
 			continue;
@@ -1000,7 +1000,7 @@ ir_node *be_get_initial_reg_value(ir_graph *irg, const arch_register_t *reg)
 {
 	int      i     = get_start_reg_index(irg, reg);
 	ir_node *start = get_irg_start(irg);
-	ir_mode *mode  = arch_register_class_mode(arch_register_get_class(reg));
+	ir_mode *mode  = arch_register_class_mode(reg->reg_class);
 
 	foreach_out_edge(start, edge) {
 		ir_node *proj = get_edge_src_irn(edge);
@@ -1022,7 +1022,7 @@ int be_find_return_reg_input(ir_node *ret, const arch_register_t *reg)
 		const arch_register_req_t *req = arch_get_irn_register_req_in(ret, i);
 		if (! (req->type & arch_register_req_type_limited))
 			continue;
-		if (req->cls != arch_register_get_class(reg))
+		if (req->cls != reg->reg_class)
 			continue;
 		if (!rbitset_is_set(req->limited, reg->index))
 			continue;

ir/be/bestack.c

@@ -313,7 +313,7 @@ void be_abi_fix_stack_nodes(ir_graph *irg)
 		new_sp_req        = OALLOCZ(obst, arch_register_req_t);
 		new_sp_req->type  = arch_register_req_type_limited
 		                  | arch_register_req_type_produces_sp;
-		new_sp_req->cls   = arch_register_get_class(arch_env->sp);
+		new_sp_req->cls   = arch_env->sp->reg_class;
 		new_sp_req->width = 1;
 
 		limited_bitset = rbitset_obstack_alloc(obst, new_sp_req->cls->n_regs);

ir/be/ia32/ia32_common_transform.c

@@ -840,7 +840,7 @@ const arch_register_req_t *ia32_parse_clobber(const char *clobber)
 
 	req          = OALLOCZ(obst, arch_register_req_t);
 	req->type    = arch_register_req_type_limited;
-	req->cls     = arch_register_get_class(reg);
+	req->cls     = reg->reg_class;
 	req->limited = limited;
 	req->width   = 1;
 

ir/be/ia32/ia32_emitter.c

@@ -1246,7 +1246,7 @@ static void Copy_emitter(const ir_node *node, const ir_node *op)
 		return;
 	}
 	/* copies of vf nodes aren't real... */
-	if (arch_register_get_class(in) == &ia32_reg_classes[CLASS_ia32_vfp])
+	if (in->reg_class == &ia32_reg_classes[CLASS_ia32_vfp])
 		return;
 
 	ia32_emitf(node, "movl %R, %R", in, out);
@@ -1268,15 +1268,12 @@ static void emit_be_CopyKeep(const ir_node *node)
 static void emit_be_Perm(const ir_node *node)
 {
 	const arch_register_t *in0, *in1;
-	const arch_register_class_t *cls0, *cls1;
 
 	in0 = arch_get_irn_register(get_irn_n(node, 0));
 	in1 = arch_get_irn_register(get_irn_n(node, 1));
 
-	cls0 = arch_register_get_class(in0);
-	cls1 = arch_register_get_class(in1);
-
-	assert(cls0 == cls1 && "Register class mismatch at Perm");
+	arch_register_class_t const *const cls0 = in0->reg_class;
+	assert(cls0 == in1->reg_class && "Register class mismatch at Perm");
 
 	if (cls0 == &ia32_reg_classes[CLASS_ia32_gp]) {
 		ia32_emitf(node, "xchg %R, %R", in1, in0);
@@ -2239,10 +2236,10 @@ static void bemit_copy(const ir_node *copy)
 	if (in == out)
 		return;
 	/* copies of vf nodes aren't real... */
-	if (arch_register_get_class(in) == &ia32_reg_classes[CLASS_ia32_vfp])
+	if (in->reg_class == &ia32_reg_classes[CLASS_ia32_vfp])
 		return;
 
-	assert(arch_register_get_class(in) == &ia32_reg_classes[CLASS_ia32_gp]);
+	assert(in->reg_class == &ia32_reg_classes[CLASS_ia32_gp]);
 	bemit8(0x8B);
 	bemit_modrr(in, out);
 }
@@ -2251,9 +2248,9 @@ static void bemit_perm(const ir_node *node)
 {
 	const arch_register_t       *in0  = arch_get_irn_register(get_irn_n(node, 0));
 	const arch_register_t       *in1  = arch_get_irn_register(get_irn_n(node, 1));
-	const arch_register_class_t *cls0 = arch_register_get_class(in0);
+	const arch_register_class_t *cls0 = in0->reg_class;
 
-	assert(cls0 == arch_register_get_class(in1) && "Register class mismatch at Perm");
+	assert(cls0 == in1->reg_class && "Register class mismatch at Perm");
 
 	if (cls0 == &ia32_reg_classes[CLASS_ia32_gp]) {
 		if (in0->index == REG_GP_EAX) {

ir/be/ia32/ia32_finish.c

@@ -256,7 +256,6 @@ static void assure_should_be_same_requirements(ir_node *node)
 		int                          same_pos;
 		ir_node                     *uses_out_reg;
 		const arch_register_req_t   *req = arch_get_irn_register_req_out(node, i);
-		const arch_register_class_t *cls;
 		int                         uses_out_reg_pos;
 
 		if (!arch_register_req_is(req, should_be_same))
@@ -272,8 +271,7 @@ static void assure_should_be_same_requirements(ir_node *node)
 		/* requirement already fulfilled? */
 		if (in_reg == out_reg)
 			continue;
-		cls = arch_register_get_class(in_reg);
-		assert(cls == arch_register_get_class(out_reg));
+		assert(in_reg->reg_class == out_reg->reg_class);
 
 		/* check if any other input operands uses the out register */
 		arity = get_irn_arity(node);

ir/be/ia32/ia32_x87.c

@@ -1447,7 +1447,7 @@ static int sim_Keep(x87_state *state, ir_node *node)
 	for (i = 0; i < arity; ++i) {
 		op      = get_irn_n(node, i);
 		op_reg  = arch_get_irn_register(op);
-		if (arch_register_get_class(op_reg) != &ia32_reg_classes[CLASS_ia32_vfp])
+		if (op_reg->reg_class != &ia32_reg_classes[CLASS_ia32_vfp])
 			continue;
 
 		reg_id = op_reg->index;