Commit ac50d904 authored by Christoph Mallon's avatar Christoph Mallon
Browse files

be: Remove flag 'aligned' from register requirements.

It is the default for width != 1 now.
Work on this never was finished, so it probably does not work anyway.
parent e093e484
......@@ -225,8 +225,6 @@ struct arch_register_req_t {
unsigned char width;
/** ignore this input/output while allocating registers */
bool ignore : 1;
/** The registernumber should be aligned (in case of multiregister values)*/
bool aligned : 1;
/** The instructions modifies the value in the register in an unknown way,
* the value has to be copied if it is needed afterwards. */
bool kills_value : 1;
......@@ -242,7 +240,6 @@ static inline bool reg_reqs_equal(const arch_register_req_t *req1,
req1->should_be_same != req2->should_be_same ||
req1->must_be_different != req2->must_be_different ||
req1->ignore != req2->ignore ||
req1->aligned != req2->aligned ||
(req1->limited != NULL) != (req2->limited != NULL))
return false;
......@@ -256,7 +253,7 @@ static inline bool reg_reqs_equal(const arch_register_req_t *req1,
static inline bool reg_req_has_constraint(const arch_register_req_t *req)
{
return req->limited || req->must_be_different != 0 || req->ignore || req->aligned;
return req->limited || req->must_be_different != 0 || req->ignore || req->width != 1;
}
/**
......
......@@ -49,10 +49,7 @@ typedef struct local_env_t {
static unsigned check_alignment_constraints(ir_node *node)
{
const arch_register_req_t *req = arch_get_irn_register_req(node);
// For larger than 1 variables, support only aligned constraints
assert((req->aligned || req->width == 1) &&
"Unaligned large (width > 1) variables not supported");
return req->aligned && req->width > 1;
return req->width != 1;
}
static void make_color_var_name(char *buf, size_t buf_size,
......
......@@ -163,8 +163,6 @@ static void dump_register_req(FILE *const F, arch_register_req_t const *const re
if (req->width > 1)
fprintf(F, " width:%d", req->width);
if (req->aligned)
fputs(" aligned", F);
if (req->ignore)
fputs(" ignore", F);
if (req->kills_value)
......
......@@ -163,9 +163,8 @@ ir_node *be_new_Perm(arch_register_class_t const *const cls,
arch_set_irn_register_req_out(irn, i, cls->class_req);
} else {
arch_register_req_t *const new_req = allocate_reg_req(irg);
new_req->cls = cls;
new_req->width = req->width;
new_req->aligned = req->aligned;
new_req->cls = cls;
new_req->width = req->width;
be_node_set_register_req_in(irn, i, new_req);
arch_set_irn_register_req_out(irn, i, new_req);
}
......@@ -206,7 +205,6 @@ static void set_copy_info(ir_node *const irn, ir_graph *const irg, ir_node *cons
arch_register_req_t *const out_req = allocate_reg_req(irg);
out_req->cls = cls;
out_req->should_be_same = 1U << 0;
out_req->aligned = op_req->aligned;
out_req->width = op_req->width;
arch_set_irn_register_req_out(irn, 0, out_req);
}
......
......@@ -690,7 +690,7 @@ static void assign_reg(ir_node const *const block, ir_node *const node, arch_reg
continue;
/* alignment constraint? */
if (width > 1) {
if (req->aligned && (final_reg_index % width) != 0)
if (final_reg_index % width != 0)
continue;
bool fine = true;
for (unsigned r0 = r+1; r0 < r+width; ++r0) {
......@@ -1104,13 +1104,14 @@ static void enforce_constraints(ir_nodeset_t *live_nodes, ir_node *node,
bool good = true;
be_foreach_use(node, cls, req, op, op_req,
/* are there any limitations for the i'th operand? */
if (req->width > 1)
double_width = true;
const arch_register_t *reg = arch_get_irn_register(op);
unsigned reg_index = reg->index;
if (req->aligned && !is_aligned(reg_index, req->width)) {
good = false;
continue;
if (req->width != 1) {
double_width = true;
if (!is_aligned(reg_index, req->width)) {
good = false;
continue;
}
}
if (req->limited == NULL)
continue;
......@@ -1515,9 +1516,8 @@ static void allocate_coalesce_block(ir_node *block, void *data)
const arch_register_req_t *phi_req = cls->class_req;
if (req->width > 1) {
arch_register_req_t *new_req = allocate_reg_req(irg);
new_req->cls = cls;
new_req->width = req->width;
new_req->aligned = req->aligned;
new_req->cls = cls;
new_req->width = req->width;
phi_req = new_req;
}
ir_node *phi = be_new_Phi(block, n_preds, phi_ins, mode,
......
......@@ -403,10 +403,9 @@ static void determine_phi_req(be_ssa_construction_env_t *env, ir_node *value)
ir_graph *irg = get_irn_irg(value);
struct obstack *obst = be_get_be_obst(irg);
arch_register_req_t *new_req = OALLOCZ(obst, arch_register_req_t);
new_req->cls = req->cls;
new_req->width = req->width;
new_req->aligned = req->aligned;
env->phi_req = new_req;
new_req->cls = req->cls;
new_req->width = req->width;
env->phi_req = new_req;
}
}
......
......@@ -885,8 +885,6 @@ sub generate_requirements
$extra .= "\n\t.ignore = true,";
} elsif ($f eq "K") {
$extra .= "\n\t.kills_value = true,";
} elsif ($f eq "a") {
$extra .= "\n\t.aligned = true,";
} elsif ($f eq "2" or $f eq "4" or $f eq "8") {
$width = int($f);
} else {
......
......@@ -355,13 +355,11 @@ void sparc_cconv_init(void)
for (size_t i = 0; i < ARRAY_SIZE(float_result_reqs_double); i += 2) {
arch_register_req_t *req = &float_result_reqs_double[i];
*req = *float_result_regs[i]->single_req;
req->width = 2;
req->aligned = true;
req->width = 2;
}
for (size_t i = 0; i < ARRAY_SIZE(float_result_reqs_quad); i += 4) {
arch_register_req_t *req = &float_result_reqs_quad[i];
*req = *float_result_regs[i]->single_req;
req->width = 4;
req->aligned = true;
req->width = 4;
}
}
......@@ -217,13 +217,13 @@ my $float_binop = {
out_reqs => [ "cls-fp" ],
},
d => {
in_reqs => [ "cls-fp:a|2", "cls-fp:a|2" ],
out_reqs => [ "cls-fp:a|2" ],
in_reqs => [ "cls-fp:2", "cls-fp:2" ],
out_reqs => [ "cls-fp:2" ],
mode => $mode_fp2,
},
q => {
in_reqs => [ "cls-fp:a|4", "cls-fp:a|4" ],
out_reqs => [ "cls-fp:a|4" ],
in_reqs => [ "cls-fp:4", "cls-fp:4" ],
out_reqs => [ "cls-fp:4" ],
mode => $mode_fp4,
}
},
......@@ -240,13 +240,13 @@ my $float_unop = {
out_reqs => [ "cls-fp" ],
},
d => {
in_reqs => [ "cls-fp:a|2" ],
out_reqs => [ "cls-fp:a|2" ],
in_reqs => [ "cls-fp:2" ],
out_reqs => [ "cls-fp:2" ],
mode => $mode_fp2,
},
q => {
in_reqs => [ "cls-fp:a|4" ],
out_reqs => [ "cls-fp:a|4" ],
in_reqs => [ "cls-fp:4" ],
out_reqs => [ "cls-fp:4" ],
mode => $mode_fp4,
}
},
......@@ -684,9 +684,9 @@ fcmp => {
attr => "ir_mode *fp_mode",
out_reqs => [ "fpflags" ],
constructors => {
s => { in_reqs => [ "cls-fp", "cls-fp" ] },
d => { in_reqs => [ "cls-fp:a|2", "cls-fp:a|2" ] },
q => { in_reqs => [ "cls-fp:a|4", "cls-fp:a|4" ] },
s => { in_reqs => [ "cls-fp", "cls-fp" ] },
d => { in_reqs => [ "cls-fp:2", "cls-fp:2" ] },
q => { in_reqs => [ "cls-fp:4", "cls-fp:4" ] },
},
},
......@@ -713,9 +713,9 @@ fdiv => {
ins => [ "left", "right" ],
outs => [ "res", "M" ],
constructors => {
s => { in_reqs => [ "cls-fp", "cls-fp" ], out_reqs => [ "cls-fp", "mem" ] },
d => { in_reqs => [ "cls-fp:a|2", "cls-fp:a|2" ], out_reqs => [ "cls-fp:a|2", "mem" ] },
q => { in_reqs => [ "cls-fp:a|4", "cls-fp:a|4" ], out_reqs => [ "cls-fp:a|4", "mem" ] }
s => { in_reqs => [ "cls-fp", "cls-fp" ], out_reqs => [ "cls-fp", "mem" ] },
d => { in_reqs => [ "cls-fp:2", "cls-fp:2" ], out_reqs => [ "cls-fp:2", "mem" ] },
q => { in_reqs => [ "cls-fp:4", "cls-fp:4" ], out_reqs => [ "cls-fp:4", "mem" ] }
},
},
......@@ -737,12 +737,12 @@ fftof => {
attr_type => "sparc_fp_conv_attr_t",
attr => "ir_mode *src_mode, ir_mode *dest_mode",
constructors => {
s_d => { in_reqs => [ "cls-fp" ], out_reqs => [ "cls-fp:a|2" ], mode => $mode_fp2, },
s_q => { in_reqs => [ "cls-fp" ], out_reqs => [ "cls-fp:a|2" ], mode => $mode_fp4, },
d_s => { in_reqs => [ "cls-fp:a|2" ], out_reqs => [ "cls-fp" ] },
d_q => { in_reqs => [ "cls-fp:a|2" ], out_reqs => [ "cls-fp:a|4" ], mode => $mode_fp4, },
q_s => { in_reqs => [ "cls-fp:a|4" ], out_reqs => [ "cls-fp" ] },
q_d => { in_reqs => [ "cls-fp:a|4" ], out_reqs => [ "cls-fp:a|2" ], mode => $mode_fp2, },
s_d => { in_reqs => [ "cls-fp" ], out_reqs => [ "cls-fp:2" ], mode => $mode_fp2, },
s_q => { in_reqs => [ "cls-fp" ], out_reqs => [ "cls-fp:2" ], mode => $mode_fp4, },
d_s => { in_reqs => [ "cls-fp:2" ], out_reqs => [ "cls-fp" ] },
d_q => { in_reqs => [ "cls-fp:2" ], out_reqs => [ "cls-fp:4" ], mode => $mode_fp4, },
q_s => { in_reqs => [ "cls-fp:4" ], out_reqs => [ "cls-fp" ] },
q_d => { in_reqs => [ "cls-fp:4" ], out_reqs => [ "cls-fp:2" ], mode => $mode_fp2, },
},
},
......@@ -753,9 +753,9 @@ fitof => {
attr => "ir_mode *fp_mode",
in_reqs => [ "cls-fp" ],
constructors => {
s => { out_reqs => [ "cls-fp" ] },
d => { out_reqs => [ "cls-fp:a|2" ], mode => $mode_fp2, },
q => { out_reqs => [ "cls-fp:a|4" ], mode => $mode_fp4, },
s => { out_reqs => [ "cls-fp" ] },
d => { out_reqs => [ "cls-fp:2" ], mode => $mode_fp2, },
q => { out_reqs => [ "cls-fp:4" ], mode => $mode_fp4, },
},
},
......@@ -766,9 +766,9 @@ fftoi => {
attr => "ir_mode *fp_mode",
out_reqs => [ "cls-fp" ],
constructors => {
s => { in_reqs => [ "cls-fp" ] },
d => { in_reqs => [ "cls-fp:a|2" ] },
q => { in_reqs => [ "cls-fp:a|4" ] },
s => { in_reqs => [ "cls-fp" ] },
d => { in_reqs => [ "cls-fp:2" ] },
q => { in_reqs => [ "cls-fp:4" ] },
},
},
......@@ -776,9 +776,9 @@ Ldf => {
op_flags => [ "uses_memory" ],
state => "exc_pinned",
constructors => {
s => { out_reqs => [ "cls-fp", "mem" ] },
d => { out_reqs => [ "cls-fp:a|2", "mem" ] },
q => { out_reqs => [ "cls-fp:a|4", "mem" ] },
s => { out_reqs => [ "cls-fp", "mem" ] },
d => { out_reqs => [ "cls-fp:2", "mem" ] },
q => { out_reqs => [ "cls-fp:4", "mem" ] },
},
in_reqs => [ "gp", "mem" ],
ins => [ "ptr", "mem" ],
......@@ -793,9 +793,9 @@ Stf => {
op_flags => [ "uses_memory" ],
state => "exc_pinned",
constructors => {
s => { in_reqs => [ "cls-fp", "gp", "mem" ] },
d => { in_reqs => [ "cls-fp:a|2", "gp", "mem" ] },
q => { in_reqs => [ "cls-fp:a|4", "gp", "mem" ] },
s => { in_reqs => [ "cls-fp", "gp", "mem" ] },
d => { in_reqs => [ "cls-fp:2", "gp", "mem" ] },
q => { in_reqs => [ "cls-fp:4", "gp", "mem" ] },
},
out_reqs => [ "mem" ],
ins => [ "val", "ptr", "mem" ],
......
......@@ -1917,14 +1917,12 @@ static const arch_register_req_t float1_req = {
.width = 1,
};
static const arch_register_req_t float2_req = {
.cls = &sparc_reg_classes[CLASS_sparc_fp],
.width = 2,
.aligned = true,
.cls = &sparc_reg_classes[CLASS_sparc_fp],
.width = 2,
};
static const arch_register_req_t float4_req = {
.cls = &sparc_reg_classes[CLASS_sparc_fp],
.width = 4,
.aligned = true,
.cls = &sparc_reg_classes[CLASS_sparc_fp],
.width = 4,
};
static const arch_register_req_t *get_float_req(ir_mode *mode)
......
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